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197 lines
7.5 KiB
Diff
197 lines
7.5 KiB
Diff
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From 44d8022a2ff1e71bffba431877949ecf827ea9f2 Mon Sep 17 00:00:00 2001
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From: Dan Ziemba <zman0900@gmail.com>
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Date: Mon, 13 Jun 2016 18:09:36 -0400
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Subject: [PATCH] Updated i915 vga arbiter patch for 4.6.2
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This is an updated version of Alex Williamson's patch from:
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https://lkml.org/lkml/2014/5/9/517
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I don't have i915 graphics, so this is completely untested.
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Original commit message follows:
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---
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Commit 81b5c7bc found that the current VGA arbiter support in i915
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only works for ancient GMCH-based IGD devices and attempted to update
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support for newer HD devices. Unfortunately newer devices cannot
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completely opt-out of VGA arbitration like the old devices could.
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The VGA I/O space cannot be disabled internally. The only way to
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route VGA I/O elsewhere is by disabling I/O at the device PCI command
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register. This means that with commit 81b5c7bc and multiple VGA
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adapters, the VGA arbiter will report that multiple VGA devices are
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participating in arbitration, Xorg will notice this and disable DRI.
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Therefore, 81b5c7bc was reverted because DRI is more important than
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being correct.
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There is however an actual need for i915 to correctly participate in
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VGA arbitration; VGA device assignment. If we want to use VFIO to
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assign a VGA device to a virtual machine, we need to be able to
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access the VGA resources of that device. By adding an i915 module
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option we can allow i915 to continue with its charade by default, but
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also allow an easy path for users who require working VGA arbitration.
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Hopefully Xorg can someday be taught to behave better with multiple
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VGA devices.
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This also rolls in reverted commit 6e1b4fda, which corrected an
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ordering issue with 81b5c7bc by delaying the disabling of VGA memory
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until after vgacon->fbcon handoff.
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Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
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Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
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Cc: Dave Airlie <airlied@redhat.com>
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---
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drivers/gpu/drm/i915/i915_dma.c | 22 +++++++++++++++++++---
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drivers/gpu/drm/i915/i915_params.c | 5 +++++
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drivers/gpu/drm/i915/i915_params.h | 1 +
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drivers/gpu/drm/i915/intel_display.c | 30 ++++++++++++++++++++++++++++++
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drivers/gpu/drm/i915/intel_drv.h | 2 ++
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5 files changed, 57 insertions(+), 3 deletions(-)
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diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
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index 1c6d227..43bce33 100644
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--- a/drivers/gpu/drm/i915/i915_dma.c
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+++ b/drivers/gpu/drm/i915/i915_dma.c
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@@ -380,10 +380,20 @@ static int i915_load_modeset_init(struct drm_device *dev)
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* If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
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* then we do not take part in VGA arbitration and the
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* vga_client_register() fails with -ENODEV.
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+ *
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+ * NB. The set_decode callback here actually only works on GMCH
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+ * devices, on newer HD devices we can only disable VGA MMIO space.
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+ * Disabling VGA I/O space requires disabling I/O in the PCI command
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+ * register. Nonetheless, we like to pretend that we participate in
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+ * VGA arbitration and can dynamically disable VGA I/O space because
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+ * this makes X happy, even though it's a complete lie.
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*/
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- ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
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- if (ret && ret != -ENODEV)
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- goto out;
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+ if (!i915.enable_hd_vgaarb || !HAS_PCH_SPLIT(dev)) {
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+ ret = vga_client_register(dev->pdev, dev, NULL,
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+ i915_vga_set_decode);
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+ if (ret && ret != -ENODEV)
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+ goto out;
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+ }
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intel_register_dsm_handler();
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@@ -423,6 +433,12 @@ static int i915_load_modeset_init(struct drm_device *dev)
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if (ret)
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goto cleanup_gem;
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+ /*
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+ * Must do this after fbcon init so that
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+ * vgacon_save_screen() works during the handover.
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+ */
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+ i915_disable_vga_mem(dev);
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+
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/* Only enable hotplug handling once the fbdev is fully set up. */
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intel_hpd_init(dev_priv);
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diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
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index 278c9c4..e0a3e08 100644
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--- a/drivers/gpu/drm/i915/i915_params.c
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+++ b/drivers/gpu/drm/i915/i915_params.c
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@@ -49,6 +49,7 @@ struct i915_params i915 __read_mostly = {
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.invert_brightness = 0,
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.disable_display = 0,
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.enable_cmd_parser = 1,
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+ .enable_hd_vgaarb = false,
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.use_mmio_flip = 0,
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.mmio_debug = 0,
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.verbose_state_checks = 1,
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@@ -171,6 +172,10 @@ module_param_named_unsafe(enable_cmd_parser, i915.enable_cmd_parser, int, 0600);
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MODULE_PARM_DESC(enable_cmd_parser,
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"Enable command parsing (1=enabled [default], 0=disabled)");
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+module_param_named(enable_hd_vgaarb, i915.enable_hd_vgaarb, bool, 0444);
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+MODULE_PARM_DESC(enable_hd_vgaarb,
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+ "Enable support for VGA arbitration on Intel HD IGD. (default: false)");
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+
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module_param_named_unsafe(use_mmio_flip, i915.use_mmio_flip, int, 0600);
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MODULE_PARM_DESC(use_mmio_flip,
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"use MMIO flips (-1=never, 0=driver discretion [default], 1=always)");
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diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
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index bd5026b..f7c9769 100644
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--- a/drivers/gpu/drm/i915/i915_params.h
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+++ b/drivers/gpu/drm/i915/i915_params.h
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@@ -56,6 +56,7 @@ struct i915_params {
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bool load_detect_test;
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bool reset;
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bool disable_display;
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+ bool enable_hd_vgaarb;
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bool enable_guc_submission;
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bool verbose_state_checks;
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bool nuclear_pageflip;
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diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
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index 7741efb..ddb94bb 100644
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--- a/drivers/gpu/drm/i915/intel_display.c
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+++ b/drivers/gpu/drm/i915/intel_display.c
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@@ -15252,6 +15252,33 @@ static void i915_disable_vga(struct drm_device *dev)
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POSTING_READ(vga_reg);
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}
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+static void i915_enable_vga_mem(struct drm_device *dev)
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+{
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+ /* Enable VGA memory on Intel HD */
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+ if (i915.enable_hd_vgaarb && HAS_PCH_SPLIT(dev)) {
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+ vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
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+ outb(inb(VGA_MSR_READ) | VGA_MSR_MEM_EN, VGA_MSR_WRITE);
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+ vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
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+ VGA_RSRC_LEGACY_MEM |
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+ VGA_RSRC_NORMAL_IO |
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+ VGA_RSRC_NORMAL_MEM);
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+ vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
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+ }
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+}
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+
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+void i915_disable_vga_mem(struct drm_device *dev)
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+{
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+ /* Disable VGA memory on Intel HD */
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+ if (i915.enable_hd_vgaarb && HAS_PCH_SPLIT(dev)) {
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+ vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
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+ outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
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+ vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
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+ VGA_RSRC_NORMAL_IO |
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+ VGA_RSRC_NORMAL_MEM);
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+ vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
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+ }
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+}
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+
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void intel_modeset_init_hw(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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@@ -15689,6 +15716,7 @@ void i915_redisable_vga_power_on(struct drm_device *dev)
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if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
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DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
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i915_disable_vga(dev);
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+ i915_disable_vga_mem(dev);
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}
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}
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@@ -16074,6 +16102,8 @@ void intel_modeset_cleanup(struct drm_device *dev)
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_connector *connector;
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+ i915_enable_vga_mem(dev);
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+
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intel_disable_gt_powersave(dev);
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intel_backlight_unregister(dev);
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diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
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index 3a30b37..7723927 100644
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--- a/drivers/gpu/drm/i915/intel_drv.h
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+++ b/drivers/gpu/drm/i915/intel_drv.h
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@@ -1623,4 +1623,6 @@ void intel_plane_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state);
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extern const struct drm_plane_helper_funcs intel_plane_helper_funcs;
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+extern void i915_disable_vga_mem(struct drm_device *dev);
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+
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#endif /* __INTEL_DRV_H__ */
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--
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2.8.3
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