mirror of
https://aur.archlinux.org/linux-vfio.git
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73 lines
2.9 KiB
Diff
73 lines
2.9 KiB
Diff
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From fb08717dc5ecf3ada73f93663b528d9d4ce4380b Mon Sep 17 00:00:00 2001
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Message-Id: <fb08717dc5ecf3ada73f93663b528d9d4ce4380b.1524129246.git.jan.steffens@gmail.com>
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In-Reply-To: <ff9d06de19e83c0c5a00a4d46376b4d1032c4f99.1524129246.git.jan.steffens@gmail.com>
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References: <ff9d06de19e83c0c5a00a4d46376b4d1032c4f99.1524129246.git.jan.steffens@gmail.com>
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From: Igor Russkikh <igor.russkikh@aquantia.com>
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Date: Wed, 11 Apr 2018 15:23:24 +0300
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Subject: [PATCH 6/6] net: aquantia: Regression on reset with 1.x firmware
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On ASUS XG-C100C with 1.5.44 firmware a special mode called "dirty wake"
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is active. With this mode when motherboard gets powered (but no poweron
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happens yet), NIC automatically enables powersave link and watches
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for WOL packet.
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This normally allows to powerup the PC after AC power failures.
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Not all motherboards or bios settings gives power to PCI slots,
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so this mode is not enabled on all the hardware.
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4.16 linux driver introduced full hardware reset sequence
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This is required since before that we had no NIC hardware
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reset implemented and there were side effects of "not clean start".
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But this full reset is incompatible with "dirty wake" WOL feature
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it keeps the PHY link in a special mode forever. As a consequence,
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driver sees no link and no traffic.
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To fix this we forcibly change FW state to idle state before doing
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the full reset. This makes FW to restore link state.
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Fixes: c8c82eb net: aquantia: Introduce global AQC hardware reset sequence
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Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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.../aquantia/atlantic/hw_atl/hw_atl_utils.c | 16 ++++++++++++++++
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1 file changed, 16 insertions(+)
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diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c
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index d3b847ec7465..c58b2c227260 100644
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--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c
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+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c
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@@ -48,6 +48,8 @@
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#define FORCE_FLASHLESS 0
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static int hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual);
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+static int hw_atl_utils_mpi_set_state(struct aq_hw_s *self,
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+ enum hal_atl_utils_fw_state_e state);
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int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops)
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{
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@@ -247,6 +249,20 @@ int hw_atl_utils_soft_reset(struct aq_hw_s *self)
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self->rbl_enabled = (boot_exit_code != 0);
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+ /* FW 1.x may bootup in an invalid POWER state (WOL feature).
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+ * We should work around this by forcing its state back to DEINIT
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+ */
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+ if (!hw_atl_utils_ver_match(HW_ATL_FW_VER_1X,
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+ aq_hw_read_reg(self,
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+ HW_ATL_MPI_FW_VERSION))) {
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+ int err = 0;
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+
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+ hw_atl_utils_mpi_set_state(self, MPI_DEINIT);
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+ AQ_HW_WAIT_FOR((aq_hw_read_reg(self, HW_ATL_MPI_STATE_ADR) &
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+ HW_ATL_MPI_STATE_MSK) == MPI_DEINIT,
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+ 10, 1000U);
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+ }
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+
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if (self->rbl_enabled)
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return hw_atl_utils_soft_reset_rbl(self);
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else
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--
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2.17.0
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