2022-09-29 18:45:39 +00:00
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From 07af9476bf0b340df883f558a5c5c1ecad05b406 Mon Sep 17 00:00:00 2001
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From: Mark King <mweiman@merit.edu>
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Date: Thu, 29 Sep 2022 10:30:20 -0400
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2018-12-12 16:29:25 +00:00
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Subject: [PATCH] i915: Add module option to support VGA arbiter on HD devices
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2022-09-29 18:45:39 +00:00
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(5.19)
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2016-06-13 22:43:18 +00:00
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2017-07-30 02:53:43 +00:00
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This is an updated version of Alex Williamson's patch from:
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https://lkml.org/lkml/2014/5/9/517
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2021-01-29 18:03:19 +00:00
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2017-07-30 02:53:43 +00:00
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I don't have i915 graphics, so this is completely untested.
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Original commit message follows:
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---
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Commit 81b5c7bc found that the current VGA arbiter support in i915
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only works for ancient GMCH-based IGD devices and attempted to update
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support for newer HD devices. Unfortunately newer devices cannot
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completely opt-out of VGA arbitration like the old devices could.
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The VGA I/O space cannot be disabled internally. The only way to
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route VGA I/O elsewhere is by disabling I/O at the device PCI command
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register. This means that with commit 81b5c7bc and multiple VGA
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adapters, the VGA arbiter will report that multiple VGA devices are
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participating in arbitration, Xorg will notice this and disable DRI.
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Therefore, 81b5c7bc was reverted because DRI is more important than
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being correct.
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There is however an actual need for i915 to correctly participate in
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VGA arbitration; VGA device assignment. If we want to use VFIO to
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assign a VGA device to a virtual machine, we need to be able to
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access the VGA resources of that device. By adding an i915 module
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option we can allow i915 to continue with its charade by default, but
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also allow an easy path for users who require working VGA arbitration.
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Hopefully Xorg can someday be taught to behave better with multiple
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VGA devices.
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This also rolls in reverted commit 6e1b4fda, which corrected an
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ordering issue with 81b5c7bc by delaying the disabling of VGA memory
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until after vgacon->fbcon handoff.
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2016-06-13 22:43:18 +00:00
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---
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2022-09-29 18:45:39 +00:00
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drivers/gpu/drm/i915/display/intel_display.c | 15 ++++++++--
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2021-01-29 18:03:19 +00:00
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drivers/gpu/drm/i915/display/intel_display.h | 1 +
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2022-09-29 18:45:39 +00:00
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drivers/gpu/drm/i915/display/intel_vga.c | 31 ++++++++++++++++++++
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2021-01-29 18:03:19 +00:00
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drivers/gpu/drm/i915/display/intel_vga.h | 4 +++
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drivers/gpu/drm/i915/i915_params.c | 3 ++
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drivers/gpu/drm/i915/i915_params.h | 1 +
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2022-09-29 18:45:39 +00:00
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6 files changed, 52 insertions(+), 3 deletions(-)
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2016-06-13 22:43:18 +00:00
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2019-10-08 22:51:27 +00:00
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diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
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2022-09-29 18:45:39 +00:00
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index 806d50b302ab..8b07e45c9693 100644
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2019-10-08 22:51:27 +00:00
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--- a/drivers/gpu/drm/i915/display/intel_display.c
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+++ b/drivers/gpu/drm/i915/display/intel_display.c
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2022-09-29 18:45:39 +00:00
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@@ -9581,9 +9581,11 @@ int intel_modeset_init_noirq(struct drm_i915_private *i915)
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intel_bios_init(i915);
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2020-12-31 07:44:46 +00:00
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- ret = intel_vga_register(i915);
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- if (ret)
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2022-09-29 18:45:39 +00:00
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- goto cleanup_bios;
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+ if (!i915_modparams.enable_hd_vgaarb || !HAS_PCH_SPLIT(i915)) {
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+ ret = intel_vga_register(i915);
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+ if (ret)
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+ goto cleanup_bios;
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+ }
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/* FIXME: completely on the wrong abstraction layer */
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intel_power_domains_init_hw(i915, false);
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@@ -9734,6 +9736,12 @@ int intel_modeset_init(struct drm_i915_private *i915)
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if (ret)
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return ret;
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+ /*
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+ * Must do this after fbcon init so that
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+ * vgacon_save_screen() works during the handover.
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+ */
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+ intel_vga_disable_mem(i915);
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2020-12-31 07:44:46 +00:00
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+
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2022-09-29 18:45:39 +00:00
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/* Only enable hotplug handling once the fbdev is fully set up. */
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intel_hpd_init(i915);
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intel_hpd_poll_disable(i915);
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@@ -10467,6 +10475,7 @@ void intel_modeset_driver_remove(struct drm_i915_private *i915)
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if (!HAS_DISPLAY(i915))
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return;
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+ intel_vga_enable_mem(i915);
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flush_workqueue(i915->flip_wq);
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flush_workqueue(i915->modeset_wq);
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2020-02-16 03:17:31 +00:00
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2020-06-14 01:17:39 +00:00
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diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
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index 187910d94ec6..82b17d7fee91 100644
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2020-06-14 01:17:39 +00:00
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--- a/drivers/gpu/drm/i915/display/intel_display.h
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+++ b/drivers/gpu/drm/i915/display/intel_display.h
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2022-09-29 18:45:39 +00:00
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@@ -568,6 +568,7 @@ void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
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int vlv_get_hpll_vco(struct drm_i915_private *dev_priv);
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int vlv_get_cck_clock(struct drm_i915_private *dev_priv,
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2022-03-29 23:56:01 +00:00
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const char *name, u32 reg, int ref_freq);
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2022-09-29 18:45:39 +00:00
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+extern void intel_vga_disable_mem(struct drm_i915_private *dev_priv);
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2022-03-29 23:56:01 +00:00
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int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv,
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const char *name, u32 reg);
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2020-06-14 01:17:39 +00:00
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void intel_init_display_hooks(struct drm_i915_private *dev_priv);
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2020-02-16 03:17:31 +00:00
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diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
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2022-09-29 18:45:39 +00:00
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index b5d058404c14..ad23732a9f21 100644
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2020-02-16 03:17:31 +00:00
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--- a/drivers/gpu/drm/i915/display/intel_vga.c
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+++ b/drivers/gpu/drm/i915/display/intel_vga.c
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2022-09-29 18:45:39 +00:00
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@@ -45,6 +45,36 @@ void intel_vga_disable(struct drm_i915_private *dev_priv)
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2020-06-14 01:17:39 +00:00
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intel_de_posting_read(dev_priv, vga_reg);
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2019-10-08 22:51:27 +00:00
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}
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2020-02-16 03:17:31 +00:00
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+void intel_vga_enable_mem(struct drm_i915_private *dev_priv)
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2019-10-08 22:51:27 +00:00
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+{
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2021-09-11 06:11:16 +00:00
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+ struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
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2019-10-08 22:51:27 +00:00
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+
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+ /* Enable VGA memory on Intel HD */
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+ if (i915_modparams.enable_hd_vgaarb && HAS_PCH_SPLIT(dev_priv)) {
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+ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
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+ outb(inb(VGA_MIS_R) | (1 << 1), VGA_MIS_W);
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2019-10-08 22:51:27 +00:00
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+ vga_set_legacy_decoding(pdev, VGA_RSRC_LEGACY_IO |
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+ VGA_RSRC_LEGACY_MEM |
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+ VGA_RSRC_NORMAL_IO |
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+ VGA_RSRC_NORMAL_MEM);
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+ vga_put(pdev, VGA_RSRC_LEGACY_IO);
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+ }
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+}
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+
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2020-02-16 03:17:31 +00:00
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+void intel_vga_disable_mem(struct drm_i915_private *dev_priv)
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2019-10-08 22:51:27 +00:00
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+{
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+ struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
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2019-10-08 22:51:27 +00:00
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+ /* Disable VGA memory on Intel HD */
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+ if (i915_modparams.enable_hd_vgaarb && HAS_PCH_SPLIT(dev_priv)) {
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+ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
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2022-09-29 18:45:39 +00:00
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+ outb(inb(VGA_MIS_R) & ~(1 << 1), VGA_MIS_W);
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2019-10-08 22:51:27 +00:00
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+ vga_set_legacy_decoding(pdev, VGA_RSRC_LEGACY_IO |
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+ VGA_RSRC_NORMAL_IO |
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+ VGA_RSRC_NORMAL_MEM);
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+ vga_put(pdev, VGA_RSRC_LEGACY_IO);
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+ }
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+}
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+
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void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
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2019-10-08 22:51:27 +00:00
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{
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2020-06-14 01:17:39 +00:00
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i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
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2022-09-29 18:45:39 +00:00
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@@ -53,6 +83,7 @@ void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
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2020-06-14 01:17:39 +00:00
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drm_dbg_kms(&dev_priv->drm,
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2020-08-15 23:38:16 +00:00
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"Something enabled VGA plane, disabling it\n");
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2020-02-16 03:17:31 +00:00
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intel_vga_disable(dev_priv);
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+ intel_vga_disable_mem(dev_priv);
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2019-10-08 22:51:27 +00:00
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}
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}
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2020-02-16 03:17:31 +00:00
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diff --git a/drivers/gpu/drm/i915/display/intel_vga.h b/drivers/gpu/drm/i915/display/intel_vga.h
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2020-06-14 01:17:39 +00:00
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index ba5b55b917f0..7e2af7924e99 100644
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2020-02-16 03:17:31 +00:00
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--- a/drivers/gpu/drm/i915/display/intel_vga.h
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+++ b/drivers/gpu/drm/i915/display/intel_vga.h
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@@ -15,4 +15,8 @@ void intel_vga_redisable_power_on(struct drm_i915_private *i915);
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int intel_vga_register(struct drm_i915_private *i915);
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void intel_vga_unregister(struct drm_i915_private *i915);
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2019-10-08 22:51:27 +00:00
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2020-02-16 03:17:31 +00:00
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+/* i915 vga arb patch */
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+void intel_vga_enable_mem(struct drm_i915_private *i915);
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+void intel_vga_disable_mem(struct drm_i915_private *i915);
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2019-10-08 22:51:27 +00:00
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+
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2020-02-16 03:17:31 +00:00
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#endif /* __INTEL_VGA_H__ */
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2016-06-13 22:43:18 +00:00
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diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
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2022-09-29 18:45:39 +00:00
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index 701fbc98afa0..4c3701e18a4a 100644
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2016-06-13 22:43:18 +00:00
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--- a/drivers/gpu/drm/i915/i915_params.c
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+++ b/drivers/gpu/drm/i915/i915_params.c
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2022-09-29 18:45:39 +00:00
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@@ -142,6 +142,9 @@ i915_param_named_unsafe(invert_brightness, int, 0400,
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2018-12-12 16:29:25 +00:00
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i915_param_named(disable_display, bool, 0400,
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2020-12-31 07:44:46 +00:00
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"Disable display (default: false)");
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2016-06-13 22:43:18 +00:00
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2018-02-08 03:41:21 +00:00
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+i915_param_named(enable_hd_vgaarb, bool, 0444,
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2022-09-29 18:45:39 +00:00
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+ "Enable support for VGA arbitration on Intel HD IGD. (default: false)");
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2016-06-13 22:43:18 +00:00
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+
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2022-09-29 18:45:39 +00:00
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i915_param_named(memtest, bool, 0400,
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"Perform a read/write test of all device memory on module load (default: off)");
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2016-06-13 22:43:18 +00:00
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diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
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2022-09-29 18:45:39 +00:00
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index b5e7ea45d191..82d0a75da970 100644
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2016-06-13 22:43:18 +00:00
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--- a/drivers/gpu/drm/i915/i915_params.h
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+++ b/drivers/gpu/drm/i915/i915_params.h
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2022-09-29 18:45:39 +00:00
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@@ -75,6 +75,7 @@ struct drm_printer;
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param(unsigned int, request_timeout_ms, CONFIG_DRM_I915_REQUEST_TIMEOUT, CONFIG_DRM_I915_REQUEST_TIMEOUT ? 0600 : 0) \
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param(unsigned int, lmem_size, 0, 0400) \
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2018-02-08 03:41:21 +00:00
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/* leave bools at the end to not create holes */ \
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2020-06-14 01:17:39 +00:00
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+ param(bool, enable_hd_vgaarb, false, 0600) \
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param(bool, enable_hangcheck, true, 0600) \
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param(bool, load_detect_test, false, 0600) \
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param(bool, force_reset_modeset_test, false, 0600) \
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2021-01-29 18:03:19 +00:00
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--
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2022-09-29 18:45:39 +00:00
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2.37.3
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2021-01-29 18:03:19 +00:00
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