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187 lines
7.5 KiB
Diff
187 lines
7.5 KiB
Diff
From 7209b38ae2b81e6d79aecb77263580f8840e459a Mon Sep 17 00:00:00 2001
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From: Mark Weiman <mark.weiman@markzz.com>
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Date: Wed, 7 Feb 2018 19:50:27 -0500
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Subject: [PATCH] i915: Add module option to support VGA arbiter on HD devices
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(4.15)
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This is an updated version of Alex Williamson's patch from:
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https://lkml.org/lkml/2014/5/9/517
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I don't have i915 graphics, so this is completely untested.
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Original commit message follows:
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---
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Commit 81b5c7bc found that the current VGA arbiter support in i915
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only works for ancient GMCH-based IGD devices and attempted to update
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support for newer HD devices. Unfortunately newer devices cannot
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completely opt-out of VGA arbitration like the old devices could.
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The VGA I/O space cannot be disabled internally. The only way to
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route VGA I/O elsewhere is by disabling I/O at the device PCI command
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register. This means that with commit 81b5c7bc and multiple VGA
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adapters, the VGA arbiter will report that multiple VGA devices are
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participating in arbitration, Xorg will notice this and disable DRI.
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Therefore, 81b5c7bc was reverted because DRI is more important than
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being correct.
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There is however an actual need for i915 to correctly participate in
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VGA arbitration; VGA device assignment. If we want to use VFIO to
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assign a VGA device to a virtual machine, we need to be able to
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access the VGA resources of that device. By adding an i915 module
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option we can allow i915 to continue with its charade by default, but
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also allow an easy path for users who require working VGA arbitration.
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Hopefully Xorg can someday be taught to behave better with multiple
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VGA devices.
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This also rolls in reverted commit 6e1b4fda, which corrected an
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ordering issue with 81b5c7bc by delaying the disabling of VGA memory
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until after vgacon->fbcon handoff.
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Signed-off-by: Mark Weiman <mark.weiman@markzz.com>
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---
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drivers/gpu/drm/i915/i915_drv.c | 22 +++++++++++++++++++---
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drivers/gpu/drm/i915/i915_params.c | 3 +++
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drivers/gpu/drm/i915/i915_params.h | 1 +
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drivers/gpu/drm/i915/intel_display.c | 33 +++++++++++++++++++++++++++++++++
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drivers/gpu/drm/i915/intel_drv.h | 1 +
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5 files changed, 57 insertions(+), 3 deletions(-)
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diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
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index 2cf10d17acfb..794590a2dcf3 100644
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--- a/drivers/gpu/drm/i915/i915_drv.c
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+++ b/drivers/gpu/drm/i915/i915_drv.c
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@@ -641,10 +641,20 @@ static int i915_load_modeset_init(struct drm_device *dev)
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* If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
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* then we do not take part in VGA arbitration and the
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* vga_client_register() fails with -ENODEV.
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+ *
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+ * NB. The set_decode callback here actually works on GMCH
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+ * devices, on newer HD devices we can only disable VGA MMIO space.
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+ * Disabling VGA I/O space requires disabling I/O in the PCI command
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+ * register. Nonetheless, we like to pretend that we participate in
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+ * VGA arbitration and can dynamically disable VGA I/O space because
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+ * this makes X happy, even though it's a complete lie.
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*/
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- ret = vga_client_register(pdev, dev_priv, NULL, i915_vga_set_decode);
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- if (ret && ret != -ENODEV)
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- goto out;
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+ if (!i915_modparams.enable_hd_vgaarb || !HAS_PCH_SPLIT(dev_priv)) {
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+ ret = vga_client_register(pdev, dev, NULL,
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+ i915_vga_set_decode);
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+ if (ret && ret != -ENODEV)
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+ goto out;
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+ }
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intel_register_dsm_handler();
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@@ -686,6 +696,12 @@ static int i915_load_modeset_init(struct drm_device *dev)
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if (ret)
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goto cleanup_gem;
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+ /*
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+ * Must do this after fbcon init so that
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+ * vgacon_save_screen() works during the handover.
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+ */
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+ i915_disable_vga_mem(dev_priv);
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+
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/* Only enable hotplug handling once the fbdev is fully set up. */
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intel_hpd_init(dev_priv);
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diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
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index b4faeb6aa2bd..fdf2ce69b34d 100644
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--- a/drivers/gpu/drm/i915/i915_params.c
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+++ b/drivers/gpu/drm/i915/i915_params.c
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@@ -146,6 +146,9 @@ i915_param_named(disable_display, bool, 0400,
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i915_param_named_unsafe(enable_cmd_parser, bool, 0400,
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"Enable command parsing (true=enabled [default], false=disabled)");
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+i915_param_named(enable_hd_vgaarb, bool, 0444,
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+ "Enable support for VGA arbitration on Intel HD IGD. (default: false)");
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+
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i915_param_named(mmio_debug, int, 0600,
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"Enable the MMIO debug code for the first N failures (default: off). "
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"This may negatively affect performance.");
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diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
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index c7292268ed43..75577d34b0c8 100644
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--- a/drivers/gpu/drm/i915/i915_params.h
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+++ b/drivers/gpu/drm/i915/i915_params.h
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@@ -56,6 +56,7 @@
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/* leave bools at the end to not create holes */ \
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param(bool, alpha_support, IS_ENABLED(CONFIG_DRM_I915_ALPHA_SUPPORT)) \
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param(bool, enable_cmd_parser, true) \
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+ param(bool, enable_hd_vgaarb, false) \
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param(bool, enable_hangcheck, true) \
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param(bool, fastboot, false) \
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param(bool, prefault_disable, false) \
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diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
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index 50f8443641b8..06aebb05f23c 100644
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--- a/drivers/gpu/drm/i915/intel_display.c
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+++ b/drivers/gpu/drm/i915/intel_display.c
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@@ -14379,6 +14379,36 @@ static void i915_disable_vga(struct drm_i915_private *dev_priv)
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POSTING_READ(vga_reg);
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}
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+static void i915_enable_vga_mem(struct drm_i915_private *dev_priv)
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+{
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+ struct pci_dev *pdev = dev_priv->drm.pdev;
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+
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+ /* Enable VGA memory on Intel HD */
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+ if (i915_modparams.enable_hd_vgaarb && HAS_PCH_SPLIT(dev_priv)) {
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+ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
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+ outb(inb(VGA_MSR_READ) | VGA_MSR_MEM_EN, VGA_MSR_WRITE);
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+ vga_set_legacy_decoding(pdev, VGA_RSRC_LEGACY_IO |
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+ VGA_RSRC_LEGACY_MEM |
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+ VGA_RSRC_NORMAL_IO |
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+ VGA_RSRC_NORMAL_MEM);
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+ vga_put(pdev, VGA_RSRC_LEGACY_IO);
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+ }
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+}
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+
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+void i915_disable_vga_mem(struct drm_i915_private *dev_priv)
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+{
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+ struct pci_dev *pdev = dev_priv->drm.pdev;
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+ /* Disable VGA memory on Intel HD */
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+ if (i915_modparams.enable_hd_vgaarb && HAS_PCH_SPLIT(dev_priv)) {
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+ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
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+ outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
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+ vga_set_legacy_decoding(pdev, VGA_RSRC_LEGACY_IO |
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+ VGA_RSRC_NORMAL_IO |
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+ VGA_RSRC_NORMAL_MEM);
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+ vga_put(pdev, VGA_RSRC_LEGACY_IO);
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+ }
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+}
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+
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void intel_modeset_init_hw(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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@@ -14877,6 +14907,7 @@ void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
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if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
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DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
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i915_disable_vga(dev_priv);
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+ i915_disable_vga_mem(dev_priv);
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}
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}
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@@ -15252,6 +15283,8 @@ void intel_modeset_cleanup(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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+ i915_enable_vga_mem(dev_priv);
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+
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flush_work(&dev_priv->atomic_helper.free_work);
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WARN_ON(!llist_empty(&dev_priv->atomic_helper.free_list));
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diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
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index 5d77f75a9f9c..982fff761e9d 100644
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--- a/drivers/gpu/drm/i915/intel_drv.h
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+++ b/drivers/gpu/drm/i915/intel_drv.h
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@@ -1340,6 +1340,7 @@ int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv,
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const char *name, u32 reg);
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void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv);
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void lpt_disable_iclkip(struct drm_i915_private *dev_priv);
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+extern void i915_disable_vga_mem(struct drm_i915_private *dev_priv);
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void intel_init_display_hooks(struct drm_i915_private *dev_priv);
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unsigned int intel_fb_xy_to_linear(int x, int y,
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const struct intel_plane_state *state,
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--
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2.16.1
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