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https://aur.archlinux.org/linux-vfio.git
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153 lines
4.1 KiB
Diff
153 lines
4.1 KiB
Diff
From 10155f0a9e245f4fb6dd68785a59c83722d436d7 Mon Sep 17 00:00:00 2001
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From: xiota <>
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Date: Wed, 13 Mar 2024 02:36:37 +0000
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Subject: [PATCH] add-acs-overrides
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---
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.../admin-guide/kernel-parameters.txt | 8 ++
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drivers/pci/quirks.c | 102 ++++++++++++++++++
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2 files changed, 110 insertions(+)
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diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
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index fb8752b42..f652c063a 100644
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--- a/Documentation/admin-guide/kernel-parameters.txt
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+++ b/Documentation/admin-guide/kernel-parameters.txt
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@@ -4642,6 +4642,14 @@
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nomsi [MSI] If the PCI_MSI kernel config parameter is
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enabled, this kernel boot option can be used to
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disable the use of MSI interrupts system-wide.
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+ pci_acs_override [PCIE] Override missing PCIe ACS support for:
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+ downstream
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+ All downstream ports - full ACS capabilities
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+ multifunction
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+ Add multifunction devices - multifunction ACS subset
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+ id:nnnn:nnnn
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+ Specific device - full ACS capabilities
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+ Specified as vid:did (vendor/device ID) in hex
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noioapicquirk [APIC] Disable all boot interrupt quirks.
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Safety option to keep boot IRQs enabled. This
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should never be necessary.
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diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
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index 82b21e34c..b9cc12277 100644
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--- a/drivers/pci/quirks.c
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+++ b/drivers/pci/quirks.c
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@@ -5018,6 +5018,106 @@ static int pci_quirk_wangxun_nic_acs(struct pci_dev *dev, u16 acs_flags)
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return false;
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}
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+static bool acs_on_downstream;
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+static bool acs_on_multifunction;
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+
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+#define NUM_ACS_IDS 16
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+struct acs_on_id {
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+ unsigned short vendor;
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+ unsigned short device;
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+};
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+static struct acs_on_id acs_on_ids[NUM_ACS_IDS];
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+static u8 max_acs_id;
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+
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+static __init int pcie_acs_override_setup(char *p)
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+{
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+ if (!p)
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+ return -EINVAL;
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+
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+ while (*p) {
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+ if (!strncmp(p, "downstream", 10))
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+ acs_on_downstream = true;
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+ if (!strncmp(p, "multifunction", 13))
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+ acs_on_multifunction = true;
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+ if (!strncmp(p, "id:", 3)) {
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+ char opt[5];
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+ int ret;
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+ long val;
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+
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+ if (max_acs_id >= NUM_ACS_IDS - 1) {
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+ pr_warn("Out of PCIe ACS override slots (%d)\n",
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+ NUM_ACS_IDS);
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+ goto next;
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+ }
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+
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+ p += 3;
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+ snprintf(opt, 5, "%s", p);
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+ ret = kstrtol(opt, 16, &val);
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+ if (ret) {
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+ pr_warn("PCIe ACS ID parse error %d\n", ret);
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+ goto next;
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+ }
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+ acs_on_ids[max_acs_id].vendor = val;
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+ p += strcspn(p, ":");
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+ if (*p != ':') {
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+ pr_warn("PCIe ACS invalid ID\n");
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+ goto next;
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+ }
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+
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+ p++;
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+ snprintf(opt, 5, "%s", p);
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+ ret = kstrtol(opt, 16, &val);
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+ if (ret) {
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+ pr_warn("PCIe ACS ID parse error %d\n", ret);
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+ goto next;
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+ }
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+ acs_on_ids[max_acs_id].device = val;
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+ max_acs_id++;
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+ }
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+next:
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+ p += strcspn(p, ",");
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+ if (*p == ',')
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+ p++;
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+ }
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+
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+ if (acs_on_downstream || acs_on_multifunction || max_acs_id)
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+ pr_warn("Warning: PCIe ACS overrides enabled; This may allow non-IOMMU protected peer-to-peer DMA\n");
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+
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+ return 0;
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+}
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+early_param("pcie_acs_override", pcie_acs_override_setup);
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+
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+static int pcie_acs_overrides(struct pci_dev *dev, u16 acs_flags)
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+{
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+ int i;
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+
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+ /* Never override ACS for legacy devices or devices with ACS caps */
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+ if (!pci_is_pcie(dev) ||
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+ pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS))
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+ return -ENOTTY;
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+
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+ for (i = 0; i < max_acs_id; i++)
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+ if (acs_on_ids[i].vendor == dev->vendor &&
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+ acs_on_ids[i].device == dev->device)
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+ return 1;
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+
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+switch (pci_pcie_type(dev)) {
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+ case PCI_EXP_TYPE_DOWNSTREAM:
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+ case PCI_EXP_TYPE_ROOT_PORT:
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+ if (acs_on_downstream)
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+ return 1;
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+ break;
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+ case PCI_EXP_TYPE_ENDPOINT:
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+ case PCI_EXP_TYPE_UPSTREAM:
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+ case PCI_EXP_TYPE_LEG_END:
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+ case PCI_EXP_TYPE_RC_END:
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+ if (acs_on_multifunction && dev->multifunction)
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+ return 1;
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+ }
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+
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+ return -ENOTTY;
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+}
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+
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static const struct pci_dev_acs_enabled {
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u16 vendor;
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u16 device;
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@@ -5171,6 +5271,8 @@ static const struct pci_dev_acs_enabled {
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{ PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs },
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/* Wangxun nics */
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{ PCI_VENDOR_ID_WANGXUN, PCI_ANY_ID, pci_quirk_wangxun_nic_acs },
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+ /* allow acs for any */
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+ { PCI_ANY_ID, PCI_ANY_ID, pcie_acs_overrides },
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{ 0 }
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};
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--
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2.49.0
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