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Initial Commit
This commit is contained in:
Sajid
433
thirdparty/capstone/arch/SystemZ/SystemZInstPrinter.c
vendored
Normal file
433
thirdparty/capstone/arch/SystemZ/SystemZInstPrinter.c
vendored
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@@ -0,0 +1,433 @@
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//===-- SystemZInstPrinter.cpp - Convert SystemZ MCInst to assembly syntax --------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an SystemZ MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
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#ifdef CAPSTONE_HAS_SYSZ
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <capstone/platform.h>
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#include "SystemZInstPrinter.h"
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#include "../../MCInst.h"
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#include "../../utils.h"
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#include "../../SStream.h"
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#include "../../MCRegisterInfo.h"
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#include "../../MathExtras.h"
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#include "SystemZMapping.h"
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static const char *getRegisterName(unsigned RegNo);
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void SystemZ_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci)
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{
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/*
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if (((cs_struct *)ud)->detail != CS_OPT_ON)
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return;
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*/
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}
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static void printAddress(MCInst *MI, unsigned Base, int64_t Disp, unsigned Index, SStream *O)
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{
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printInt64(O, Disp);
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if (Base) {
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SStream_concat0(O, "(");
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if (Index)
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SStream_concat(O, "%%%s, ", getRegisterName(Index));
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SStream_concat(O, "%%%s)", getRegisterName(Base));
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base);
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.index = (uint8_t)SystemZ_map_register(Index);
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = Disp;
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MI->flat_insn->detail->sysz.op_count++;
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}
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} else if (!Index) {
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Disp;
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MI->flat_insn->detail->sysz.op_count++;
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}
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} else {
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SStream_concat(O, "(%%%s)", getRegisterName(Index));
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base);
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.index = (uint8_t)SystemZ_map_register(Index);
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = Disp;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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}
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static void _printOperand(MCInst *MI, MCOperand *MO, SStream *O)
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{
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if (MCOperand_isReg(MO)) {
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unsigned reg;
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reg = MCOperand_getReg(MO);
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SStream_concat(O, "%%%s", getRegisterName(reg));
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reg = SystemZ_map_register(reg);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_REG;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].reg = reg;
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MI->flat_insn->detail->sysz.op_count++;
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}
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} else if (MCOperand_isImm(MO)) {
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int64_t Imm = MCOperand_getImm(MO);
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printInt64(O, Imm);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Imm;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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}
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static void printU1ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<1>(Value) && "Invalid u1imm argument");
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printInt64(O, Value);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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static void printU2ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<2>(Value) && "Invalid u2imm argument");
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printInt64(O, Value);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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static void printU3ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<3>(Value) && "Invalid u4imm argument");
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printInt64(O, Value);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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static void printU4ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<4>(Value) && "Invalid u4imm argument");
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printInt64(O, Value);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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static void printU6ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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uint32_t Value = (uint32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<6>(Value) && "Invalid u6imm argument");
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printUInt32(O, Value);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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static void printS8ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int8_t Value = (int8_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isInt<8>(Value) && "Invalid s8imm argument");
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if (Value >= 0) {
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if (Value > HEX_THRESHOLD)
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SStream_concat(O, "0x%x", Value);
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else
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SStream_concat(O, "%u", Value);
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} else {
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if (Value < -HEX_THRESHOLD)
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SStream_concat(O, "-0x%x", -Value);
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else
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SStream_concat(O, "-%u", -Value);
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}
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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static void printU8ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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uint8_t Value = (uint8_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<8>(Value) && "Invalid u8imm argument");
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if (Value > HEX_THRESHOLD)
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SStream_concat(O, "0x%x", Value);
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else
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SStream_concat(O, "%u", Value);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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static void printU12ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<12>(Value) && "Invalid u12imm argument");
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printInt64(O, Value);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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static void printS16ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int16_t Value = (int16_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isInt<16>(Value) && "Invalid s16imm argument");
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if (Value >= 0) {
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if (Value > HEX_THRESHOLD)
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SStream_concat(O, "0x%x", Value);
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else
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SStream_concat(O, "%u", Value);
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} else {
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if (Value < -HEX_THRESHOLD)
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SStream_concat(O, "-0x%x", -Value);
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else
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SStream_concat(O, "-%u", -Value);
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}
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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static void printU16ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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uint16_t Value = (uint16_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<16>(Value) && "Invalid u16imm argument");
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if (Value > HEX_THRESHOLD)
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SStream_concat(O, "0x%x", Value);
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else
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SStream_concat(O, "%u", Value);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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static void printS32ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int32_t Value = (int32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isInt<32>(Value) && "Invalid s32imm argument");
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printInt32(O, Value);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
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}
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static void printU32ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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uint32_t Value = (uint32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<32>(Value) && "Invalid u32imm argument");
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printUInt32(O, Value);
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if (MI->csh->detail_opt) {
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
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MI->flat_insn->detail->sysz.op_count++;
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}
|
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}
|
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|
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static void printU48ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
|
||||
// assert(isUInt<48>(Value) && "Invalid u48imm argument");
|
||||
printInt64(O, Value);
|
||||
|
||||
if (MI->csh->detail_opt) {
|
||||
MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
|
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MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
|
||||
MI->flat_insn->detail->sysz.op_count++;
|
||||
}
|
||||
}
|
||||
|
||||
static void printPCRelOperand(MCInst *MI, int OpNum, SStream *O)
|
||||
{
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
|
||||
if (MCOperand_isImm(MO)) {
|
||||
int64_t imm = (int64_t)MCOperand_getImm(MO);
|
||||
|
||||
printInt64(O, imm);
|
||||
|
||||
if (MI->csh->detail_opt) {
|
||||
MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
|
||||
MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = imm;
|
||||
MI->flat_insn->detail->sysz.op_count++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void printPCRelTLSOperand(MCInst *MI, int OpNum, SStream *O)
|
||||
{
|
||||
// Output the PC-relative operand.
|
||||
printPCRelOperand(MI, OpNum, O);
|
||||
}
|
||||
|
||||
static void printOperand(MCInst *MI, int OpNum, SStream *O)
|
||||
{
|
||||
_printOperand(MI, MCInst_getOperand(MI, OpNum), O);
|
||||
}
|
||||
|
||||
static void printBDAddrOperand(MCInst *MI, int OpNum, SStream *O)
|
||||
{
|
||||
printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)),
|
||||
MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)), 0, O);
|
||||
}
|
||||
|
||||
static void printBDXAddrOperand(MCInst *MI, int OpNum, SStream *O)
|
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{
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printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)),
|
||||
MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)),
|
||||
MCOperand_getReg(MCInst_getOperand(MI, OpNum + 2)), O);
|
||||
}
|
||||
|
||||
static void printBDLAddrOperand(MCInst *MI, int OpNum, SStream *O)
|
||||
{
|
||||
unsigned Base = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
|
||||
uint64_t Disp = (uint64_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1));
|
||||
uint64_t Length = (uint64_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 2));
|
||||
|
||||
if (Disp > HEX_THRESHOLD)
|
||||
SStream_concat(O, "0x%"PRIx64, Disp);
|
||||
else
|
||||
SStream_concat(O, "%"PRIu64, Disp);
|
||||
|
||||
if (Length > HEX_THRESHOLD)
|
||||
SStream_concat(O, "(0x%"PRIx64, Length);
|
||||
else
|
||||
SStream_concat(O, "(%"PRIu64, Length);
|
||||
|
||||
if (Base)
|
||||
SStream_concat(O, ", %%%s", getRegisterName(Base));
|
||||
SStream_concat0(O, ")");
|
||||
|
||||
if (MI->csh->detail_opt) {
|
||||
MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM;
|
||||
MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base);
|
||||
MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.length = Length;
|
||||
MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = (int64_t)Disp;
|
||||
MI->flat_insn->detail->sysz.op_count++;
|
||||
}
|
||||
}
|
||||
|
||||
static void printBDRAddrOperand(MCInst *MI, int OpNum, SStream *O)
|
||||
{
|
||||
unsigned Base = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
|
||||
uint64_t Disp = (uint64_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1));
|
||||
uint64_t Length = MCOperand_getReg(MCInst_getOperand(MI, OpNum + 2));
|
||||
|
||||
if (Disp > HEX_THRESHOLD)
|
||||
SStream_concat(O, "0x%"PRIx64, Disp);
|
||||
else
|
||||
SStream_concat(O, "%"PRIu64, Disp);
|
||||
|
||||
SStream_concat0(O, "(");
|
||||
SStream_concat(O, "%%%s", getRegisterName(Length));
|
||||
|
||||
if (Base)
|
||||
SStream_concat(O, ", %%%s", getRegisterName(Base));
|
||||
SStream_concat0(O, ")");
|
||||
|
||||
if (MI->csh->detail_opt) {
|
||||
MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM;
|
||||
MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base);
|
||||
MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.length = (uint8_t)SystemZ_map_register(Length);
|
||||
MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = (int64_t)Disp;
|
||||
MI->flat_insn->detail->sysz.op_count++;
|
||||
}
|
||||
}
|
||||
|
||||
static void printBDVAddrOperand(MCInst *MI, int OpNum, SStream *O)
|
||||
{
|
||||
printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)),
|
||||
MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)),
|
||||
MCOperand_getReg(MCInst_getOperand(MI, OpNum + 2)), O);
|
||||
}
|
||||
|
||||
static void printCond4Operand(MCInst *MI, int OpNum, SStream *O)
|
||||
{
|
||||
static const char *const CondNames[] = {
|
||||
"o", "h", "nle", "l", "nhe", "lh", "ne",
|
||||
"e", "nlh", "he", "nl", "le", "nh", "no"
|
||||
};
|
||||
|
||||
uint64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
|
||||
// assert(Imm > 0 && Imm < 15 && "Invalid condition");
|
||||
SStream_concat0(O, CondNames[Imm - 1]);
|
||||
|
||||
if (MI->csh->detail_opt)
|
||||
MI->flat_insn->detail->sysz.cc = (sysz_cc)Imm;
|
||||
}
|
||||
|
||||
#define PRINT_ALIAS_INSTR
|
||||
#include "SystemZGenAsmWriter.inc"
|
||||
|
||||
void SystemZ_printInst(MCInst *MI, SStream *O, void *Info)
|
||||
{
|
||||
printInstruction(MI, O, Info);
|
||||
}
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user