Initial Commit

thirdparty/capstone/bindings/README

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+This directory contains bindings & test code for Python, Java & OCaml.
+See <language>/README for how to compile & install each binding.
+
+More bindings created & maintained by the community are available as followings.
+
+- Gapstone: Go binding (by Scott Knight).
+
+	https://github.com/knightsc/gapstone
+
+- Crabstone: Ruby binding for Capstone 3+ (by david942j).
+
+	https://github.com/david942j/crabstone
+
+- Crabstone: Ruby binding (by Ben Nagy).
+
+	https://github.com/bnagy/crabstone
+
+- Capstone-Vala: Vala binding (by Pancake).
+
+	https://github.com/radare/capstone-vala
+
+- Node-Capstone: NodeJS binding (by Jason Oster).
+
+	https://github.com/parasyte/node-capstone
+
+- CCcapstone: C++ binding (by Peter Hlavaty).
+
+	https://github.com/zer0mem/cccapstone
+
+- LuaCapstone: Lua binding (by Antonio Davide).
+
+	https://github.com/Dax89/LuaCapstone
+
+- Capstone-RS: Rust binding (by Richo Healey).
+
+	https://github.com/capstone-rust/capstone-rs
+
+- Capstone.NET: .NET framework binding (by Ahmed Garhy).
+
+	https://github.com/9ee1/Capstone.NET
+
+- CapstoneJ: High level Java wrapper for Capstone-java (by Keve Müller).
+
+	https://github.com/kevemueller/capstonej
+
+- Hapstone: Haskell binding (by ibabushkin)
+
+    https://github.com/ibabushkin/hapstone
+
+- CL-Capstone: Common Lisp bindings (by GrammaTech).
+
+    https://github.com/GrammaTech/cl-capstone
+
+- Emacs-capstone: Emacs (elisp) binding (by Bas Alberts)
+
+    https://github.com/collarchoke/emacs-capstone
+
+- C# binding (by Matt Graeber). Note: this is only for Capstone v2.0.
+
+	https://github.com/mattifestation/capstone
+
+- PowerShell binding (by Ruben Boonen).
+
+	https://github.com/aquynh/capstone/tree/master/bindings/powershell
+
+- PHP binding (by Fadhil Mandaga).
+
+	https://github.com/firodj/php-capstone
+	
+- capstone-d: D binding (by Dimitri Bohlender)
+
+	https://github.com/bohlender/capstone-d
+
+- Swift binding (by Jesús A. Álvarez)
+
+	https://github.com/zydeco/capstone-swift

thirdparty/capstone/bindings/const_generator.py

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+# Capstone Disassembler Engine
+# By Dang Hoang Vu, 2013
+from __future__ import print_function
+import sys
+import re
+
+INCL_DIR = '../include/capstone/'
+
+include = [ 'arm.h', 'aarch64.h', 'm68k.h', 'mips.h', 'x86.h', 'ppc.h', 'sparc.h', 'systemz.h', 'xcore.h', 'tms320c64x.h', 'm680x.h', 'evm.h', 'mos65xx.h', 'wasm.h', 'bpf.h' ,'riscv.h', 'sh.h', 'tricore.h', 'alpha.h', 'hppa.h', 'loongarch.h' ]
+
+template = {
+    'java': {
+            'header': "// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT\npackage capstone;\n\npublic class %s_const {\n",
+            'footer': "}",
+            'line_format': '\tpublic static final int %s = %s;\n',
+            'out_file': './java/capstone/%s_const.java',
+            # prefixes for constant filenames of all archs - case sensitive
+            'arm.h': 'Arm',
+            'm68k.h': 'M68k',
+            'mips.h': 'Mips',
+            'x86.h': 'X86',
+            'ppc.h': 'Ppc',
+            'sparc.h': 'Sparc',
+            'systemz.h': 'Sysz',
+            'xcore.h': 'Xcore',
+            'tms320c64x.h': 'TMS320C64x',
+            'm680x.h': 'M680x',
+            'evm.h': 'Evm',
+            'wasm.h': 'Wasm',
+            'comment_open': '\t//',
+            'comment_close': '',
+        },
+    'python': {
+            'header': "from . import CS_OP_INVALID, CS_OP_REG, CS_OP_IMM, CS_OP_FP, CS_OP_PRED, CS_OP_SPECIAL, CS_OP_MEM, CS_OP_MEM_REG, CS_OP_MEM_IMM, UINT16_MAX\n"
+                      "# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.py]\n",
+            'footer': "",
+            'line_format': '%s = %s\n',
+            'out_file': './python/capstone/%s_const.py',
+            # prefixes for constant filenames of all archs - case sensitive
+            'arm.h': 'arm',
+            'aarch64.h': ['AArch64', 'AARCH64'],
+            'm68k.h': 'm68k',
+            'mips.h': 'mips',
+            'x86.h': 'x86',
+            'ppc.h': 'ppc',
+            'sparc.h': 'sparc',
+            'systemz.h': 'sysz',
+            'xcore.h': 'xcore',
+            'tms320c64x.h': 'tms320c64x',
+            'm680x.h': 'm680x',
+            'evm.h': 'evm',
+            'wasm.h': 'wasm',
+            'mos65xx.h': 'mos65xx',
+            'bpf.h': 'bpf',
+            'riscv.h': 'riscv',
+            'sh.h': 'sh',
+            'tricore.h': ['TRICORE', 'TriCore'],
+            'alpha.h': ['ALPHA', 'Alpha'],
+            'hppa.h': 'hppa',
+            'loongarch.h': 'loongarch',
+            'comment_open': '#',
+            'comment_close': '',
+        },
+    'ocaml': {
+            'header': "(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.ml] *)\n",
+            'footer': "",
+            'line_format': 'let _%s = %s;;\n',
+            'out_file': './ocaml/%s_const.ml',
+            # prefixes for constant filenames of all archs - case sensitive
+            'arm.h': 'arm',
+            'mips.h': 'mips',
+            'm68k.h': 'm68k',
+            'x86.h': 'x86',
+            'ppc.h': 'ppc',
+            'sparc.h': 'sparc',
+            'systemz.h': 'sysz',
+            'xcore.h': 'xcore',
+            'tms320c64x.h': 'tms320c64x',
+            'm680x.h': 'm680x',
+            'evm.h': 'evm',
+            'wasm.h': 'wasm',
+            'comment_open': '(*',
+            'comment_close': ' *)',
+        },
+}
+
+excluded_prefixes = {
+    'arm.h': ["ARMCC_CondCodes", "ARMVCC_VPTCodes"],
+    'aarch64.h': ["AArch64CC_CondCode", "AArch64Layout_VectorLayout"],
+}
+
+# markup for comments to be added to autogen files
+MARKUP = '//>'
+
+def camelize(name):
+    parts = name.split('_')
+    return parts[0].lower() + ''.join(map(str.capitalize, parts[1:]))
+
+def pascalize(name):
+    parts = name.split('_')
+    return ''.join(map(str.capitalize, parts))
+
+def pascalize_const(name):
+    parts = name.split('_',2)
+    match = re.match('^(CC|DISP|MOD|DIR|BCAST|RM|FLAGS|SIZE|BR_DISP_SIZE)_', parts[2])
+    if match:
+        parts = name.split('_', 2 + match.group(0).count('_'))
+    item = camelize(parts[-1])
+    if item[0].isdigit():
+        item = parts[-2].lower() + item
+    return (pascalize('_'.join(parts[0:-1])), item)
+
+def enum_type(name, templ):
+    for enum_type, pattern in templ['enum_types'].items():
+        if re.match(pattern, name):
+            return enum_type
+    return templ['enum_default_type']
+
+def write_enum_extra_options(outfile, templ, enum, enum_values):
+    if 'enum_extra_options' in templ and enum in templ['enum_extra_options']:
+        for name, value in templ['enum_extra_options'][enum].items():
+            if type(value) is str:
+                # evaluate within existing enum
+                value = eval(value, None, enum_values)
+            outfile.write((templ['line_format'] %(name, value)).encode("utf-8"))
+
+def gen(lang):
+    global include, INCL_DIR
+    print('Generating bindings for', lang)
+    templ = template[lang]
+    print('Generating bindings for', lang)
+    for target in include:
+        if target not in templ:
+            print("Warning: No binding found for %s" % target)
+            continue
+        prefix = templ[target]
+        prefixs = []
+        if isinstance(prefix, list):
+            prefixs = prefix
+            prefix = prefix[0].lower()
+
+        outfile = open(templ['out_file'] %(prefix), 'wb')   # open as binary prevents windows newlines
+        outfile.write((templ['header'] % (prefix)).encode("utf-8"))
+
+        lines = open(INCL_DIR + target).readlines()
+        enums = {}
+        values = {}
+        doc_lines = []
+        rhs = ""
+
+        count = 0
+        for line in lines:
+            line = line.strip()
+
+            if line.startswith(MARKUP):  # markup for comments
+                outfile.write(("\n%s%s%s\n" %(templ['comment_open'], \
+                                              line.replace(MARKUP, ''), \
+                                              templ['comment_close']) ).encode("utf-8"))
+                continue
+
+            if line.startswith('/// ') and 'enum_doc' in templ:
+                doc_lines.append(line[4: ])
+                continue
+            elif line.startswith('}') or line.startswith('#'):
+                doc_lines = []
+                pass
+            elif re.search(r"^(\s*typedef\s+)?enum", line):
+                # First new enum value should be 0.
+                # Because `rhs` is incremented later, it must be set to -1 here.
+                # Everything about this code is so broken -.-
+                rhs = "-1"
+
+            if line == '' or line.startswith('//'):
+                continue
+
+            if line.startswith('#define '):
+                line = line[8:]     #cut off define
+                xline = re.split('\s+', line, 1)     #split to at most 2 express
+                if len(xline) != 2:
+                    continue
+                if '(' in xline[0] or ')' in xline[0]:      #does it look like a function
+                    continue
+                xline.insert(1, '=')            # insert an = so the expression below can parse it
+                line = ' '.join(xline)
+
+            def has_special_arch_prefix(x):
+                if target in excluded_prefixes and any(x.startswith(excl_pre) for excl_pre in excluded_prefixes[target]):
+                    return False
+                if prefixs:
+                    return any(x.startswith(pre) for pre in prefixs)
+                else:
+                    return x.startswith(prefix.upper())
+
+            if not has_special_arch_prefix(line):
+                continue
+
+            tmp = line.strip().split(',')
+            for t in tmp:
+                t = t.strip()
+                if not t or t.startswith('//'): continue
+                # hacky: remove type cast (uint64_t)
+                t = t.replace('(uint64_t)', '')
+                t = re.sub(r'\((\d+)ULL << (\d+)\)', r'\1 << \2', t)    # (1ULL<<1) to 1 << 1
+                f = re.split('\s+', t)
+
+                if not has_special_arch_prefix(f[0]):
+                    continue
+
+                if len(f) > 1 and f[1] not in ('//', '///<', '='):
+                    print("Error: Unable to convert %s" % f)
+                    continue
+                elif len(f) > 1 and f[1] == '=':
+                    rhs = ''.join(f[2:])
+                else:
+                    # Dirty fix: This line is reached for enum values which
+                    # have no value assigned (as in `ARCH_SOMETHING,`).
+                    # Because the binding constants require a fixed value,
+                    # `count` was used (as it is now the `except` case).
+                    # Which is of course incorrect,
+                    # because it doesn't match the actual value in the C code.
+                    # So we just test here if the previous `rhs` was an actual number,
+                    # and set `rhs = rhs + 1`. If it wasn't a number, we just continue the incorrect design and
+                    # set it to `str(count)`.
+                    try:
+                        if "0x" in rhs:
+                            prev_val = int(rhs, 16)
+                        else:
+                            prev_val = int(rhs)
+                        prev_val += 1
+                        rhs = str(prev_val)
+                    except ValueError:
+                        rhs = str(count)
+                        count += 1
+
+                try:
+                    count = int(rhs) + 1
+                    if (count == 1):
+                        outfile.write(("\n").encode("utf-8"))
+                except ValueError:
+                    if lang == 'ocaml':
+                        # ocaml uses lsl for '<<', lor for '|'
+                        rhs = rhs.replace('<<', ' lsl ')
+                        rhs = rhs.replace('|', ' lor ')
+                        # ocaml variable has _ as prefix
+                        if rhs[0].isalpha():
+                            rhs = '_' + rhs
+
+                if lang == 'swift':
+                    value = eval(rhs, None, values)
+                    exec('%s = %d' %(f[0].strip(), value), None, values)
+                else:
+                    value = rhs
+
+                name = f[0].strip()
+
+                if 'rename' in templ:
+                    # constant renaming
+                    for pattern, replacement in templ['rename'].items():
+                        if re.match(pattern, name):
+                            name = re.sub(pattern, replacement, name)
+                            break
+
+
+                if 'enum_header' in templ:
+                    # separate constants by enums based on name
+                    enum, name = pascalize_const(name)
+                    if enum not in enums:
+                        if len(enums) > 0:
+                            write_enum_extra_options(outfile, templ, last_enum, enums[last_enum])
+                            outfile.write((templ['enum_footer']).encode("utf-8"))
+                        last_enum = enum
+
+                        if 'enum_doc' in templ:
+                            for doc_line in doc_lines:
+                                outfile.write((templ['enum_doc'] %(doc_line)).encode("utf-8"))
+                            doc_lines = []
+
+                        if 'option_sets' in templ and enum in templ['option_sets']:
+                            outfile.write((templ['option_set_header'] %(enum, templ['option_sets'][enum])).encode("utf-8"))
+                        else:
+                            outfile.write((templ['enum_header'] %(enum, enum_type(enum, templ))).encode("utf-8"))
+                        enums[enum] = {}
+
+                    if 'option_sets' in templ and enum in templ['option_sets']:
+                        # option set format
+                        line_format = templ['option_format'].format(option='%s',type=enum,value='%s')
+                        if value == 0:
+                            continue # skip empty option
+                        # option set values need not be literals
+                        value = rhs
+                    elif 'dup_line_format' in templ and value in enums[enum].values():
+                        # different format for duplicate values?
+                        line_format = templ['dup_line_format']
+                    else:
+                        line_format = templ['line_format']
+                    enums[enum][name] = value
+
+                    # escape reserved words
+                    if 'reserved_words' in templ and name in templ['reserved_words']:
+                        name = templ['reserved_word_format'] %(name)
+
+                    # print documentation?
+                    if 'doc_line_format' in templ and '///<' in line:
+                        doc = line.split('///<')[1].strip()
+                        outfile.write((templ['doc_line_format'] %(doc)).encode("utf-8"))
+                else:
+                    line_format = templ['line_format']
+
+                outfile.write((line_format %(name, value)).encode("utf-8"))
+
+        if 'enum_footer' in templ:
+            write_enum_extra_options(outfile, templ, enum, enums[enum])
+            outfile.write((templ['enum_footer']).encode("utf-8"))
+        outfile.write((templ['footer']).encode("utf-8"))
+        outfile.close()
+
+def main():
+    try:
+        if sys.argv[1] == 'all':
+            for key in template.keys():
+                gen(key)
+        else:
+            gen(sys.argv[1])
+    except:
+        raise RuntimeError("Unsupported binding %s" % sys.argv[1])
+
+if __name__ == "__main__":
+    if len(sys.argv) < 2:
+        print("Usage:", sys.argv[0], " <bindings: java|python|ocaml|all>")
+        sys.exit(1)
+    main()

thirdparty/capstone/bindings/java/.gitignore

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+*.class
+tags

thirdparty/capstone/bindings/java/Makefile

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+# Capstone Disassembler Engine
+# By Nguyen Anh Quynh <aquynh@gmail.com>, 2013>
+
+ifndef BUILDDIR
+BLDIR = .
+OBJDIR = .
+else
+BLDIR = $(abspath $(BUILDDIR))/bindings/java
+OBJDIR = $(abspath $(BUILDDIR))/obj/bindings/java
+endif
+
+JNA = /usr/share/java/jna/jna.jar
+
+ifneq ($(wildcard $(JNA)),)
+else
+  ifneq ($(wildcard /usr/share/java/jna.jar),)
+    JNA = /usr/share/java/jna.jar
+  else
+    JNA =
+  endif
+endif
+
+PYTHON2 ?= python
+
+CAPSTONE_JAVA = Capstone.java Arm_const.java Arm64_const.java Mips_const.java \
+				X86_const.java Xcore_const.java Ppc_const.java Sparc_const.java\
+				Sysz_const.java M680x_const.java \
+				Arm.java Arm64.java Mips.java X86.java Xcore.java Ppc.java\
+				Sparc.java Systemz.java M680x.java
+
+all: gen_const capstone tests
+
+capstone: capstone_class
+	@mkdir -p $(BLDIR)
+	cd $(OBJDIR) && jar cf $(BLDIR)/capstone.jar capstone/*.class
+
+capstone_class: jna
+ifdef BUILDDIR
+	@mkdir -p $(OBJDIR)
+	cd capstone && javac -d $(OBJDIR) -classpath $(JNA) $(CAPSTONE_JAVA)
+else
+	cd capstone && javac -classpath $(JNA) $(CAPSTONE_JAVA)
+endif
+
+tests: capstone_class jna
+	@mkdir -p $(OBJDIR)
+	javac -d $(OBJDIR) -classpath "$(JNA):$(BLDIR)/capstone.jar" TestBasic.java\
+		TestArm.java TestArm64.java TestMips.java TestX86.java TestXcore.java\
+		TestPpc.java TestSparc.java TestSystemz.java TestM680x.java
+
+gen_const:
+	cd ../ && $(PYTHON2) const_generator.py java
+
+jna:
+	@if [ ! $(JNA) ]; then echo "*** Unable to find JNA ***"; exit 1; fi
+
+clean:
+	rm -rf $(OBJDIR)/capstone/*.class
+	rm -rf $(OBJDIR)/*.class $(OBJDIR)/*.log $(BLDIR)/*.jar
+ifdef BUILDDIR
+	rm -rf $(BLDIR)
+	rm -rf $(OBJDIR)
+endif
+
+TESTS = testbasic arm arm64 m680x mips ppc sparc systemz x86 xcore
+check:
+	@for t in $(TESTS); do \
+		echo Check $$t ... ; \
+		./run.sh $$t > /dev/null && echo OK || echo FAILED; \
+	done
+

thirdparty/capstone/bindings/java/README

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+This has been tested with OpenJDK version 6 & 7 on Ubuntu-12.04 and
+Arch Linux-3.11, 64-bit.
+
+- OpenJDK is required to compile and run this test code.
+  For example, install OpenJDK 6 with:
+
+       $ sudo apt-get install openjdk-6-jre-headless openjdk-6-jdk
+
+- Java Native Access is required to run the code, you can install it with:
+
+       $ sudo apt-get install libjna-java
+
+- To compile and run this Java test code:
+
+       $ make
+       $ ./run.sh
+
+
+This directory contains some test code to show how to use Capstone API.
+
+- TestBasic.java
+  This code shows the most simple form of API where we only want to get basic
+  information out of disassembled instruction, such as address, mnemonic and
+  operand string.
+
+- Test<arch>.java
+  These code show how to retrieve architecture-specific information for each
+  architecture.

thirdparty/capstone/bindings/java/TestArm.java

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+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+import capstone.Capstone;
+import capstone.Arm;
+
+import static capstone.Arm_const.*;
+
+public class TestArm {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String ARM_CODE = "EDFFFFEB04e02de500000000e08322e5f102030e0000a0e30230c1e7000053e3000201f10540d0e8";
+  static final String ARM_CODE2 = "d1e800f0f02404071f3cf2c000004ff00001466c";
+  static final String THUMB_CODE2 = "4ff00001bde80088d1e800f018bfadbff3ff0b0c86f3008980f3008c4ffa99f6d0ffa201";
+  static final String THUMB_CODE  = "7047eb4683b0c9681fb130bfaff32084";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Arm.OpInfo operands = (Arm.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Arm.Operand i = (Arm.Operand) operands.op[c];
+        String imm = hex(i.value.imm);
+        if (i.type == ARM_OP_SYSREG)
+          System.out.printf("\t\toperands[%d].type: SYSREG = %d\n", c, i.value.reg);
+        if (i.type == ARM_OP_REG)
+          System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == ARM_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == ARM_OP_PIMM)
+          System.out.printf("\t\toperands[%d].type: P-IMM = %d\n", c, i.value.imm);
+        if (i.type == ARM_OP_CIMM)
+          System.out.printf("\t\toperands[%d].type: C-IMM = %d\n", c, i.value.imm);
+        if (i.type == ARM_OP_SETEND)
+  				System.out.printf("\t\toperands[%d].type: SETEND = %s\n", c, i.value.setend == ARM_SETEND_BE? "be" : "le");
+        if (i.type == ARM_OP_FP)
+          System.out.printf("\t\toperands[%d].type: FP = %f\n", c, i.value.fp);
+        if (i.type == ARM_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n",c);
+          String base = ins.regName(i.value.mem.base);
+          String index = ins.regName(i.value.mem.index);
+          if (base != null)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
+          if (index != null)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, index);
+          if (i.value.mem.scale != 1)
+            System.out.printf("\t\t\toperands[%d].mem.scale: %d\n", c, (i.value.mem.scale));
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, (i.value.mem.disp));
+          if (i.value.mem.lshift != 0)
+            System.out.printf("\t\t\toperands[%d].mem.lshift: 0x%x\n", c, (i.value.mem.lshift));
+        }
+        if (i.vector_index > 0)
+          System.out.printf("\t\t\toperands[%d].vector_index = %d\n", c, (i.vector_index));
+        if (i.shift.type != ARM_SFT_INVALID && i.shift.value > 0)
+          System.out.printf("\t\t\tShift: %d = %d\n", i.shift.type, i.shift.value);
+        if (i.subtracted)
+          System.out.printf("\t\t\toperands[%d].subtracted = True\n", c);
+      }
+    }
+    if (operands.writeback)
+      System.out.println("\tWrite-back: True");
+
+    if (operands.updateFlags)
+      System.out.println("\tUpdate-flags: True");
+
+    if (operands.cc != ARM_CC_AL && operands.cc != ARM_CC_INVALID)
+      System.out.printf("\tCode condition: %d\n",  operands.cc);
+
+    if (operands.cpsMode > 0)
+      System.out.printf("\tCPSI-mode: %d\n", operands.cpsMode);
+
+    if (operands.cpsFlag > 0)
+      System.out.printf("\tCPSI-flag: %d\n", operands.cpsFlag);
+
+    if (operands.vectorData > 0)
+      System.out.printf("\tVector-data: %d\n", operands.vectorData);
+
+    if (operands.vectorSize > 0)
+      System.out.printf("\tVector-size: %d\n", operands.vectorSize);
+
+    if (operands.usermode)
+      System.out.printf("\tUser-mode: True\n");
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_ARM, hexString2Byte(ARM_CODE), "ARM"),
+      new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, hexString2Byte(THUMB_CODE), "Thumb"),
+      new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, hexString2Byte(ARM_CODE2), "Thumb-mixed"),
+      new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, Capstone.CS_OPT_SYNTAX_NOREGNAME, hexString2Byte(THUMB_CODE2), "Thumb-2 & register named with numbers"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      if (test.syntax != 0)
+        cs.setSyntax(test.syntax);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+      System.out.printf("0x%x:\n\n", (all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size));
+
+      // Close when done
+	  cs.close();
+    }
+  }
+
+}

thirdparty/capstone/bindings/java/TestArm64.java

@@ -0,0 +1,124 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+import capstone.Capstone;
+import capstone.Arm64;
+
+import static capstone.Arm64_const.*;
+
+public class TestArm64 {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String ARM64_CODE = "090038d5bf4000d50c0513d52050020e20e43d0f0018a05fa200ae9e9f3703d5bf3303d5df3f03d5217c029b217c00530040214be10b40b9200481da2008028b105be83c";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Arm64.OpInfo operands = (Arm64.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Arm64.Operand i = (Arm64.Operand) operands.op[c];
+        String imm = hex(i.value.imm);
+        if (i.type == ARM64_OP_REG)
+          System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == ARM64_OP_REG_MRS)
+          System.out.printf("\t\toperands[%d].type: REG_MRS = 0x%x\n", c, i.value.reg);
+        if (i.type == ARM64_OP_REG_MSR)
+          System.out.printf("\t\toperands[%d].type: REG_MSR = 0x%x\n", c, i.value.reg);
+        if (i.type == ARM64_OP_PSTATE)
+          System.out.printf("\t\toperands[%d].type: PSTATE = 0x%x\n", c, i.value.imm);
+			  if (i.type == ARM64_OP_BARRIER)
+  				System.out.printf("\t\toperands[%d].type: BARRIER = 0x%x\n", c, i.value.imm);
+
+        if (i.type == ARM64_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == ARM64_OP_CIMM)
+          System.out.printf("\t\toperands[%d].type: C-IMM = %d\n", c, i.value.imm);
+        if (i.type == ARM64_OP_FP)
+          System.out.printf("\t\toperands[%d].type: FP = %f\n", c, i.value.fp);
+        if (i.type == ARM64_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n",c);
+          String base = ins.regName(i.value.mem.base);
+          String index = ins.regName(i.value.mem.index);
+          if (base != null)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
+          if (index != null)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, index);
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+        }
+        if (i.shift.type != ARM64_SFT_INVALID && i.shift.value > 0)
+          System.out.printf("\t\t\tShift: type = %d, value = %d\n", i.shift.type, i.shift.value);
+        if (i.ext != ARM64_EXT_INVALID)
+          System.out.printf("\t\t\tExt: %d\n", i.ext);
+        if (i.vas != ARM64_VAS_INVALID)
+          System.out.printf("\t\t\tVector Arrangement Specifier: 0x%x\n", i.vas);
+        if (i.vector_index != -1)
+          System.out.printf("\t\t\tVector Index: %d\n", i.vector_index);
+
+      }
+    }
+
+    if (operands.writeback)
+      System.out.println("\tWrite-back: True");
+
+    if (operands.updateFlags)
+      System.out.println("\tUpdate-flags: True");
+
+    if (operands.cc != ARM64_CC_AL && operands.cc != ARM64_CC_INVALID)
+      System.out.printf("\tCode-condition: %d\n",  operands.cc);
+
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_ARM64, Capstone.CS_MODE_ARM, hexString2Byte(ARM64_CODE), "ARM-64"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x2c);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+
+      System.out.printf("0x%x: \n\n", all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size);
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}

thirdparty/capstone/bindings/java/TestBasic.java

@@ -0,0 +1,178 @@
+/* Capstone Disassembler Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
+
+import capstone.Capstone;
+
+public class TestBasic {
+  public static class platform {
+    public int arch;
+    public int mode;
+    public int syntax;
+    public byte[] code;
+    public String comment;
+
+    public platform(int a, int m, int syt, byte[] c, String s) {
+      arch = a;
+      mode = m;
+      code = c;
+      comment = s;
+      syntax = syt;
+    }
+
+    public platform(int a, int m, byte[] c, String s) {
+      arch = a;
+      mode = m;
+      code = c;
+      comment = s;
+    }
+  };
+
+  static public String stringToHex(byte[] code) {
+    StringBuilder buf = new StringBuilder(200);
+    for (byte ch: code) {
+      if (buf.length() > 0)
+        buf.append(' ');
+      buf.append(String.format("0x%02x", ch));
+    }
+    return buf.toString();
+  }
+
+  public static final byte[] PPC_CODE = new byte[] {(byte)0x80, (byte)0x20, (byte)0x00, (byte)0x00, (byte)0x80, (byte)0x3f, (byte)0x00, (byte)0x00, (byte)0x10, (byte)0x43, (byte)0x23, (byte)0x0e, (byte)0xd0, (byte)0x44, (byte)0x00, (byte)0x80, (byte)0x4c, (byte)0x43, (byte)0x22, (byte)0x02, (byte)0x2d, (byte)0x03, (byte)0x00, (byte)0x80, (byte)0x7c, (byte)0x43, (byte)0x20, (byte)0x14, (byte)0x7c, (byte)0x43, (byte)0x20, (byte)0x93, (byte)0x4f, (byte)0x20, (byte)0x00, (byte)0x21, (byte)0x4c, (byte)0xc8, (byte)0x00, (byte)0x21 };
+  public static final byte[] X86_CODE = new byte[] { (byte)0x8d, (byte)0x4c, (byte)0x32, (byte)0x08, (byte)0x01, (byte)0xd8, (byte)0x81, (byte)0xc6, (byte)0x34, (byte)0x12, (byte)0x00, (byte)0x00 };
+  public static final byte[] SPARC_CODE = new byte[] { (byte)0x80, (byte)0xa0, (byte)0x40, (byte)0x02, (byte)0x85, (byte)0xc2, (byte)0x60, (byte)0x08, (byte)0x85, (byte)0xe8, (byte)0x20, (byte)0x01, (byte)0x81, (byte)0xe8, (byte)0x00, (byte)0x00, (byte)0x90, (byte)0x10, (byte)0x20, (byte)0x01, (byte)0xd5, (byte)0xf6, (byte)0x10, (byte)0x16, (byte)0x21, (byte)0x00, (byte)0x00, (byte)0x0a, (byte)0x86, (byte)0x00, (byte)0x40, (byte)0x02, (byte)0x01, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x12, (byte)0xbf, (byte)0xff, (byte)0xff, (byte)0x10, (byte)0xbf, (byte)0xff, (byte)0xff, (byte)0xa0, (byte)0x02, (byte)0x00, (byte)0x09, (byte)0x0d, (byte)0xbf, (byte)0xff, (byte)0xff, (byte)0xd4, (byte)0x20, (byte)0x60, (byte)0x00, (byte)0xd4, (byte)0x4e, (byte)0x00, (byte)0x16, (byte)0x2a, (byte)0xc2, (byte)0x80, (byte)0x03 };
+  public static final byte[] SYSZ_CODE = new byte[] { (byte)0xed, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x1a, (byte)0x5a, (byte)0x0f, (byte)0x1f, (byte)0xff, (byte)0xc2, (byte)0x09, (byte)0x80, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x07, (byte)0xf7, (byte)0xeb, (byte)0x2a, (byte)0xff, (byte)0xff, (byte)0x7f, (byte)0x57, (byte)0xe3, (byte)0x01, (byte)0xff, (byte)0xff, (byte)0x7f, (byte)0x57, (byte)0xeb, (byte)0x00, (byte)0xf0, (byte)0x00, (byte)0x00, (byte)0x24, (byte)0xb2, (byte)0x4f, (byte)0x00, (byte)0x78 };
+  public static final byte[] SPARCV9_CODE = new byte[] { (byte)0x81, (byte)0xa8, (byte)0x0a, (byte)0x24, (byte)0x89, (byte)0xa0, (byte)0x10, (byte)0x20, (byte)0x89, (byte)0xa0, (byte)0x1a, (byte)0x60, (byte)0x89, (byte)0xa0, (byte)0x00, (byte)0xe0 };
+  public static final byte[] XCORE_CODE = new byte[] { (byte)0xfe, (byte)0x0f, (byte)0xfe, (byte)0x17, (byte)0x13, (byte)0x17, (byte)0xc6, (byte)0xfe, (byte)0xec, (byte)0x17, (byte)0x97, (byte)0xf8, (byte)0xec, (byte)0x4f, (byte)0x1f, (byte)0xfd, (byte)0xec, (byte)0x37, (byte)0x07, (byte)0xf2, (byte)0x45, (byte)0x5b, (byte)0xf9, (byte)0xfa, (byte)0x02, (byte)0x06, (byte)0x1b, (byte)0x10 };
+
+  static public void main(String argv[]) {
+    platform[] platforms = {
+      new platform(
+          Capstone.CS_ARCH_X86,
+          Capstone.CS_MODE_16,
+          Capstone.CS_OPT_SYNTAX_INTEL,
+          new byte[] { (byte)0x8d, (byte)0x4c, (byte)0x32, (byte)0x08, (byte)0x01, (byte)0xd8, (byte)0x81, (byte)0xc6, (byte)0x34, (byte)0x12, (byte)0x00, (byte)0x00 },
+          "X86 16bit (Intel syntax)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_X86,
+          Capstone.CS_MODE_32,
+          Capstone.CS_OPT_SYNTAX_ATT,
+          X86_CODE,
+          "X86 32bit (ATT syntax)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_X86,
+          Capstone.CS_MODE_32,
+          X86_CODE,
+          "X86 32 (Intel syntax)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_X86,
+          Capstone.CS_MODE_64,
+          new byte[] {(byte)0x55, (byte)0x48, (byte)0x8b, (byte)0x05, (byte)0xb8, (byte)0x13, (byte)0x00, (byte)0x00 },
+          "X86 64 (Intel syntax)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_ARM,
+          Capstone.CS_MODE_ARM,
+          new byte[] { (byte)0xED, (byte)0xFF, (byte)0xFF, (byte)0xEB, (byte)0x04, (byte)0xe0, (byte)0x2d, (byte)0xe5, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0xe0, (byte)0x83, (byte)0x22, (byte)0xe5, (byte)0xf1, (byte)0x02, (byte)0x03, (byte)0x0e, (byte)0x00, (byte)0x00, (byte)0xa0, (byte)0xe3, (byte)0x02, (byte)0x30, (byte)0xc1, (byte)0xe7, (byte)0x00, (byte)0x00, (byte)0x53, (byte)0xe3 },
+          "ARM"
+          ),
+      new platform(
+          Capstone.CS_ARCH_ARM,
+          Capstone.CS_MODE_THUMB,
+          new byte[] {(byte)0x4f, (byte)0xf0, (byte)0x00, (byte)0x01, (byte)0xbd, (byte)0xe8, (byte)0x00, (byte)0x88, (byte)0xd1, (byte)0xe8, (byte)0x00, (byte)0xf0 },
+          "THUMB-2"
+          ),
+      new platform(
+          Capstone.CS_ARCH_ARM,
+          Capstone.CS_MODE_ARM,
+          new byte[] {(byte)0x10, (byte)0xf1, (byte)0x10, (byte)0xe7, (byte)0x11, (byte)0xf2, (byte)0x31, (byte)0xe7, (byte)0xdc, (byte)0xa1, (byte)0x2e, (byte)0xf3, (byte)0xe8, (byte)0x4e, (byte)0x62, (byte)0xf3 },
+          "ARM: Cortex-A15 + NEON"
+          ),
+      new platform(
+          Capstone.CS_ARCH_ARM,
+          Capstone.CS_MODE_THUMB,
+          new byte[] {(byte)0x70, (byte)0x47, (byte)0xeb, (byte)0x46, (byte)0x83, (byte)0xb0, (byte)0xc9, (byte)0x68 },
+          "THUMB"
+          ),
+      new platform(
+          Capstone.CS_ARCH_MIPS,
+          Capstone.CS_MODE_MIPS32 + Capstone.CS_MODE_BIG_ENDIAN,
+          new byte[] {(byte)0x0C, (byte)0x10, (byte)0x00, (byte)0x97, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x24, (byte)0x02, (byte)0x00, (byte)0x0c, (byte)0x8f, (byte)0xa2, (byte)0x00, (byte)0x00, (byte)0x34, (byte)0x21, (byte)0x34, (byte)0x56 },
+          "MIPS-32 (Big-endian)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_MIPS,
+          Capstone.CS_MODE_MIPS64+ Capstone.CS_MODE_LITTLE_ENDIAN,
+          new byte[] {(byte)0x56, (byte)0x34, (byte)0x21, (byte)0x34, (byte)0xc2, (byte)0x17, (byte)0x01, (byte)0x00 },
+          "MIPS-64-EL (Little-endian)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_ARM64,
+          Capstone.CS_MODE_ARM,
+          new byte [] { 0x21, 0x7c, 0x02, (byte)0x9b, 0x21, 0x7c, 0x00, 0x53, 0x00, 0x40, 0x21, 0x4b, (byte)0xe1, 0x0b, 0x40, (byte)0xb9 },
+          "ARM-64"
+          ),
+      new platform (
+          Capstone.CS_ARCH_PPC,
+          Capstone.CS_MODE_BIG_ENDIAN,
+          PPC_CODE,
+          "PPC-64"
+          ),
+      new platform (
+          Capstone.CS_ARCH_PPC,
+          Capstone.CS_MODE_BIG_ENDIAN,
+          Capstone.CS_OPT_SYNTAX_NOREGNAME,
+          PPC_CODE,
+          "PPC-64, print register with number only"
+          ),
+      new platform (
+          Capstone.CS_ARCH_SPARC,
+          Capstone.CS_MODE_BIG_ENDIAN,
+          SPARC_CODE,
+          "Sparc"
+          ),
+      new platform (
+          Capstone.CS_ARCH_SPARC,
+          Capstone.CS_MODE_BIG_ENDIAN + Capstone.CS_MODE_V9,
+          SPARCV9_CODE,
+          "SparcV9"
+          ),
+      new platform (
+          Capstone.CS_ARCH_SYSZ,
+          0,
+          SYSZ_CODE,
+          "SystemZ"
+          ),
+      new platform (
+          Capstone.CS_ARCH_XCORE,
+          0,
+          XCORE_CODE,
+          "XCore"
+          ),
+    };
+
+    for (int j = 0; j < platforms.length; j++) {
+      System.out.println("****************");
+      System.out.println(String.format("Platform: %s", platforms[j].comment));
+      System.out.println(String.format("Code: %s", stringToHex(platforms[j].code)));
+      System.out.println("Disasm:");
+
+      Capstone cs = new Capstone(platforms[j].arch, platforms[j].mode);
+      if (platforms[j].syntax != 0)
+        cs.setSyntax(platforms[j].syntax);
+
+      Capstone.CsInsn[] all_insn = cs.disasm(platforms[j].code, 0x1000);
+
+      for (int i = 0; i < all_insn.length; i++) {
+        System.out.println(String.format("0x%x: \t%s\t%s", all_insn[i].address,
+              all_insn[i].mnemonic, all_insn[i].opStr));
+      }
+      System.out.printf("0x%x:\n\n", all_insn[all_insn.length-1].address + all_insn[all_insn.length-1].size);
+
+      // Close when done
+      cs.close();
+    }
+  }
+}

thirdparty/capstone/bindings/java/TestM680x.java

@@ -0,0 +1,207 @@
+// Capstone Java binding
+/* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 */
+
+import java.lang.*;
+import capstone.Capstone;
+import capstone.M680x;
+
+import static capstone.M680x_const.*;
+
+public class TestM680x {
+
+  static final String sAccess[] = {
+    "UNCHANGED", "READ", "WRITE", "READ | WRITE",
+  };
+
+  static final String M6800_CODE = "010936647f7410009010A410b6100039";
+  static final String M6801_CODE = "04053c3d389310ec10ed1039";
+  static final String M6805_CODE = "047f00172228002e0040425a708e979ca015ad00c31000da1234e57ffe";
+  static final String M6808_CODE = "31220035224510004b005110525e226265123472848586878a8b8c9495a710af109e607f9e6b7f009ed610009ee67f";
+  static final String HD6301_CODE = "6b100071100072101039";
+  static final String M6809_CODE = "0610191a551e0123e931063455a681a7897fffa69d1000a791a69f100011ac99100039A607A627A647A667A60FA610A680A681A682A683A684A685A686A6887FA68880A6897FFFA6898000A68BA68C10A68D1000A691A693A694A695A696A6987FA69880A6997FFFA6998000A69BA69C10A69D1000A69F1000";
+  static final String M6811_CODE = "0203127f100013990800147f02157f011e7f20008fcf18081830183c1867188c1000188f18ce100018ff10001aa37f1aac1aee7f1aef7fcdac7f";
+  static final String CPU12_CODE = "000401000c00800e008000111e100080003b4a1000044b01044f7f80008f1000b752b7b1a667a6fea6f71802e23039e21000180c30391000181118121000181900181e00183e183f00";
+  static final String HD6309_CODE = "0110106210107b101000cd499602d21030231038103b1053105d1130431011372510113812113923113b34118e100011af1011ab1011f68000";
+  static final String HCS08_CODE = "3210009eae9ece7f9ebe10009efe7f3e10009ef37f9610009eff7f82";
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static public String stringToHexUc(byte[] code) {
+    StringBuilder buf = new StringBuilder(800);
+    for (byte ch: code) {
+      buf.append(String.format(" 0x%02x", ch));
+    }
+    return buf.toString();
+  }
+
+  static public String stringToHexShortUc(byte[] code) {
+    StringBuilder buf = new StringBuilder(800);
+    for (byte ch: code) {
+      buf.append(String.format("%02x", ch));
+    }
+    return buf.toString();
+  }
+
+  public static Capstone cs;
+/*
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+*/
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    String bytes = stringToHexShortUc(ins.bytes);
+    System.out.printf("0x%04x:\t%s\t%s\t%s\n", ins.address, bytes, ins.mnemonic, ins.opStr);
+
+    M680x.OpInfo operands = (M680x.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c = 0; c < operands.op.length; c++) {
+        M680x.Operand i = (M680x.Operand) operands.op[c];
+        if (i.type == M680X_OP_REGISTER) {
+          String comment = "";
+          if ((c == 0 && ((operands.flags & M680X_FIRST_OP_IN_MNEM) != 0)) ||
+              (c == 1 && ((operands.flags & M680X_SECOND_OP_IN_MNEM) != 0)))
+            comment = " (in mnemonic)";
+          System.out.printf("\t\toperands[%d].type: REGISTER = %s%s\n", c, ins.regName(i.value.reg), comment);
+        }
+        if (i.type == M680X_OP_CONSTANT)
+          System.out.printf("\t\toperands[%d].type: CONSTANT = %d\n", c, i.value.const_val);
+        if (i.type == M680X_OP_IMMEDIATE)
+          System.out.printf("\t\toperands[%d].type: IMMEDIATE = #%d\n", c, i.value.imm);
+        if (i.type == M680X_OP_DIRECT)
+          System.out.printf("\t\toperands[%d].type: DIRECT = 0x%02x\n", c, i.value.direct_addr);
+        if (i.type == M680X_OP_EXTENDED)
+          System.out.printf("\t\toperands[%d].type: EXTENDED %s = 0x%04x\n", c,
+            i.value.ext.indirect != 0 ? "INDIRECT" : "", i.value.ext.address);
+        if (i.type == M680X_OP_RELATIVE)
+          System.out.printf("\t\toperands[%d].type: RELATIVE = 0x%04x\n", c, i.value.rel.address );
+        if (i.type == M680X_OP_INDEXED) {
+          System.out.printf("\t\toperands[%d].type: INDEXED%s\n", c,
+            (i.value.idx.flags & M680X_IDX_INDIRECT) != 0 ? " INDIRECT" : "");
+          if (i.value.idx.base_reg != M680X_REG_INVALID) {
+            String regName = ins.regName(i.value.idx.base_reg);
+            if (regName != null)
+              System.out.printf("\t\t\tbase register: %s\n", regName);
+          }
+          if (i.value.idx.offset_reg != M680X_REG_INVALID) {
+            String regName = ins.regName(i.value.idx.offset_reg);
+            if (regName != null)
+              System.out.printf("\t\t\toffset register: %s\n", regName);
+          }
+          if ((i.value.idx.offset_bits != 0) &&
+              (i.value.idx.offset_reg == M680X_REG_INVALID) &&
+              (i.value.idx.inc_dec == 0)) {
+            System.out.printf("\t\t\toffset: %d\n", i.value.idx.offset);
+            if (i.value.idx.base_reg == M680X_REG_PC)
+              System.out.printf("\t\t\toffset address: 0x%04x\n", i.value.idx.offset_addr);
+            System.out.printf("\t\t\toffset bits: %d\n", i.value.idx.offset_bits);
+          }
+          if (i.value.idx.inc_dec != 0) {
+            String post_pre =
+               (i.value.idx.flags & M680X_IDX_POST_INC_DEC) != 0 ?
+		"post" : "pre";
+            String inc_dec =
+               i.value.idx.inc_dec > 0 ? "increment" : "decrement";
+
+            System.out.printf("\t\t\t%s %s: %d\n", post_pre, inc_dec,
+			Math.abs(i.value.idx.inc_dec));
+          }
+        }
+        if (i.size != 0)
+          System.out.printf("\t\t\tsize: %d\n", i.size);
+        if (i.access != Capstone.CS_AC_INVALID)
+          System.out.printf("\t\t\taccess: %s\n", sAccess[i.access]);
+      }
+    }
+
+    if (ins.regsRead.length > 0) {
+      System.out.printf("\tRegisters read:");
+      for (int c = 0; c < ins.regsRead.length; c++) {
+        System.out.printf(" %s", ins.regName(ins.regsRead[c]));
+      }
+      System.out.printf("\n");
+    }
+
+    if (ins.regsWrite.length > 0) {
+      System.out.printf("\tRegisters modified:");
+      for (int c = 0; c < ins.regsWrite.length; c++) {
+        System.out.printf(" %s", ins.regName(ins.regsWrite[c]));
+      }
+      System.out.printf("\n");
+    }
+
+    if (ins.groups.length > 0)
+      System.out.printf("\tgroups_count: %d\n", ins.groups.length);
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6301,
+          hexString2Byte(HD6301_CODE), "M680X_HD6301"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6309,
+          hexString2Byte(HD6309_CODE), "M680X_HD6309"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6800,
+          hexString2Byte(M6800_CODE), "M680X_M6800"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6801,
+          hexString2Byte(M6801_CODE), "M680X_M6801"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6805,
+          hexString2Byte(M6805_CODE), "M680X_M68HC05"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6808,
+          hexString2Byte(M6808_CODE), "M680X_M68HC08"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6809,
+          hexString2Byte(M6809_CODE), "M680X_M6809"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6811,
+          hexString2Byte(M6811_CODE), "M680X_M68HC11"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_CPU12,
+          hexString2Byte(CPU12_CODE), "M680X_CPU12"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_HCS08,
+          hexString2Byte(HCS08_CODE), "M680X_HCS08"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[20]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + stringToHexUc(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}

thirdparty/capstone/bindings/java/TestMips.java

@@ -0,0 +1,91 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+import capstone.Capstone;
+import capstone.Mips;
+
+import static capstone.Mips_const.*;
+
+public class TestMips {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String MIPS_CODE  = "0C100097000000002402000c8fa2000034213456";
+  static final String MIPS_CODE2 = "56342134c2170100";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Mips.OpInfo operands = (Mips.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Mips.Operand i = (Mips.Operand) operands.op[c];
+        String imm = hex(i.value.imm);
+        if (i.type == MIPS_OP_REG)
+          System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == MIPS_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == MIPS_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n",c);
+          String base = ins.regName(i.value.mem.base);
+          if (base != null)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: %s\n", c, hex(i.value.mem.disp));
+        }
+      }
+    }
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_MIPS, Capstone.CS_MODE_MIPS32 + Capstone.CS_MODE_BIG_ENDIAN, hexString2Byte(MIPS_CODE), "MIPS-32 (Big-endian)"),
+      new TestBasic.platform(Capstone.CS_ARCH_MIPS, Capstone.CS_MODE_MIPS64 + Capstone.CS_MODE_LITTLE_ENDIAN, hexString2Byte(MIPS_CODE2), "MIPS-64-EL (Little-endian)"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+
+      System.out.printf("0x%x:\n\n", all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size);
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}

thirdparty/capstone/bindings/java/TestPpc.java

@@ -0,0 +1,96 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+import capstone.Capstone;
+import capstone.Ppc;
+
+import static capstone.Ppc_const.*;
+
+public class TestPpc {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String PPC_CODE = "80200000803f00001043230ed04400804c4322022d0300807c4320147c4320934f2000214cc8002140820014";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Ppc.OpInfo operands = (Ppc.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Ppc.Operand i = (Ppc.Operand) operands.op[c];
+        if (i.type == PPC_OP_REG)
+            System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == PPC_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == PPC_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n", c);
+          if (i.value.mem.base != PPC_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, ins.regName(i.value.mem.base));
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+        }
+      }
+    }
+
+    if (operands.bc != 0)
+      System.out.printf("\tBranch code: %d\n", operands.bc);
+
+    if (operands.bh != 0)
+      System.out.printf("\tBranch hint: %d\n", operands.bh);
+
+    if (operands.updateCr0)
+      System.out.printf("\tUpdate-CR0: True\n");
+
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_PPC, Capstone.CS_MODE_BIG_ENDIAN, hexString2Byte(PPC_CODE), "PPC-64"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+      System.out.printf("0x%x:\n\n", (all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size));
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}

thirdparty/capstone/bindings/java/TestSparc.java

@@ -0,0 +1,97 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013-2014
+
+import capstone.Capstone;
+import capstone.Sparc;
+
+import static capstone.Sparc_const.*;
+
+public class TestSparc {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String SPARC_CODE = "80a0400285c2600885e8200181e8000090102001d5f610162100000a860040020100000012bfffff10bfffffa00200090dbfffffd4206000d44e00162ac28003";
+  static final String SPARCV9_CODE = "81a80a2489a0102089a01a6089a000e0";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Sparc.OpInfo operands = (Sparc.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Sparc.Operand i = (Sparc.Operand) operands.op[c];
+        if (i.type == SPARC_OP_REG)
+            System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == SPARC_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == SPARC_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n", c);
+          if (i.value.mem.base != SPARC_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, ins.regName(i.value.mem.base));
+          if (i.value.mem.index != SPARC_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, ins.regName(i.value.mem.index));
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+        }
+      }
+    }
+
+    if (operands.cc != 0)
+      System.out.printf("\tCode condition: %d\n", operands.cc);
+
+    if (operands.hint != 0)
+      System.out.printf("\tHint code: %d\n", operands.hint);
+
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_SPARC, Capstone.CS_MODE_BIG_ENDIAN, hexString2Byte(SPARC_CODE), "Sparc"),
+      new TestBasic.platform(Capstone.CS_ARCH_SPARC, Capstone.CS_MODE_BIG_ENDIAN + Capstone.CS_MODE_V9, hexString2Byte(SPARCV9_CODE), "SparcV9"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+      System.out.printf("0x%x:\n\n", (all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size));
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}

thirdparty/capstone/bindings/java/TestSystemz.java

@@ -0,0 +1,96 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013-2014
+
+import capstone.Capstone;
+import capstone.Systemz;
+
+import static capstone.Sysz_const.*;
+
+public class TestSystemz {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String SYSZ_CODE = "ed000000001a5a0f1fffc2098000000007f7eb2affff7f57e301ffff7f57eb00f0000024b24f0078ec180000c17f";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Systemz.OpInfo operands = (Systemz.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Systemz.Operand i = (Systemz.Operand) operands.op[c];
+        if (i.type == SYSZ_OP_REG)
+            System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == SYSZ_OP_ACREG)
+            System.out.printf("\t\toperands[%d].type: ACREG = %s\n", c, i.value.reg);
+        if (i.type == SYSZ_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == SYSZ_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n", c);
+          if (i.value.mem.base != SYSZ_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, ins.regName(i.value.mem.base));
+          if (i.value.mem.index != SYSZ_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, ins.regName(i.value.mem.index));
+          if (i.value.mem.length != 0)
+            System.out.printf("\t\t\toperands[%d].mem.length: 0x%x\n", c, i.value.mem.disp);
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+        }
+      }
+    }
+
+    if (operands.cc != 0)
+      System.out.printf("\tConditional code: %d\n", operands.cc);
+
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_SYSZ, 0, hexString2Byte(SYSZ_CODE), "SystemZ"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+      System.out.printf("0x%x:\n\n", (all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size));
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}

thirdparty/capstone/bindings/java/TestX86.java

@@ -0,0 +1,227 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+import capstone.Capstone;
+import static capstone.Capstone.CS_AC_READ;
+import static capstone.Capstone.CS_AC_WRITE;
+import capstone.Capstone.CsRegsAccess;
+import capstone.X86;
+
+import static capstone.X86_const.*;
+
+public class TestX86 {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String X86_CODE64 = "55488b05b8130000";
+  static final String X86_CODE16 = "8d4c320801d881c6341200000523010000368b849123010000418d8439896700008d8789670000b4c6";
+  static final String X86_CODE32 = "8d4c320801d881c6341200000523010000368b849123010000418d8439896700008d8789670000b4c6";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  private static String array2hex(byte[] arr) {
+    String ret = "";
+    for (int i=0 ;i<arr.length; i++)
+      ret += String.format("0x%02x ", arr[i]);
+    return ret;
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    X86.OpInfo operands = (X86.OpInfo) ins.operands;
+
+    System.out.printf("\tPrefix: %s\n", array2hex(operands.prefix));
+
+    System.out.printf("\tOpcode: %s\n", array2hex(operands.opcode));
+
+    // print REX prefix (non-zero value is relevant for x86_64)
+    System.out.printf("\trex: 0x%x\n", operands.rex);
+
+    // print address size
+    System.out.printf("\taddr_size: %d\n", operands.addrSize);
+
+    // print modRM byte
+    System.out.printf("\tmodrm: 0x%x\n", operands.modrm);
+
+    // print modRM offset
+    if (operands.encoding.modrmOffset != 0) {
+      System.out.printf("\tmodrm offset: 0x%x\n", operands.encoding.modrmOffset);
+    }
+
+    // print displacement value
+    System.out.printf("\tdisp: 0x%x\n", operands.disp);
+
+    // print displacement offset
+    if (operands.encoding.dispOffset != 0) {
+      System.out.printf("\tdisp offset: 0x%x\n", operands.encoding.dispOffset);
+    }
+
+    //print displacement size
+    if (operands.encoding.dispSize != 0) {
+      System.out.printf("\tdisp size: 0x%x\n", operands.encoding.dispSize);
+    }
+
+    // SIB is not available in 16-bit mode
+    if ( (cs.mode & Capstone.CS_MODE_16) == 0) {
+      // print SIB byte
+      System.out.printf("\tsib: 0x%x\n", operands.sib);
+      if (operands.sib != 0)
+        System.out.printf("\t\tsib_base: %s\n\t\tsib_index: %s\n\t\tsib_scale: %d\n",
+          ins.regName(operands.sibBase), ins.regName(operands.sibIndex), operands.sibScale);
+    }
+
+    if (operands.xopCC != 0)
+        System.out.printf("\txop_cc: %u\n", operands.xopCC);
+
+    if (operands.sseCC != 0)
+        System.out.printf("\tsse_cc: %u\n", operands.sseCC);
+
+    if (operands.avxCC != 0)
+        System.out.printf("\tavx_cc: %u\n", operands.avxCC);
+
+    if (operands.avxSae)
+        System.out.printf("\tavx_sae: TRUE\n");
+
+    if (operands.avxRm != 0)
+        System.out.printf("\tavx_rm: %u\n", operands.avxRm);
+
+    int count = ins.opCount(X86_OP_IMM);
+    if (count > 0) {
+      System.out.printf("\timm_count: %d\n", count);
+      System.out.printf("\timm offset: 0x%x\n", operands.encoding.immOffset);
+      System.out.printf("\timm size: 0x%x\n", operands.encoding.immSize);
+      for (int i=0; i<count; i++) {
+        int index = ins.opIndex(X86_OP_IMM, i + 1);
+        System.out.printf("\t\timms[%d]: 0x%x\n", i+1, (operands.op[index].value.imm));
+      }
+    }
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        X86.Operand i = (X86.Operand) operands.op[c];
+        String imm = hex(i.value.imm);
+        if (i.type == X86_OP_REG)
+          System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == X86_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == X86_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n",c);
+          String segment = ins.regName(i.value.mem.segment);
+          String base = ins.regName(i.value.mem.base);
+          String index = ins.regName(i.value.mem.index);
+          if (segment != null)
+            System.out.printf("\t\t\toperands[%d].mem.segment: REG = %s\n", c, segment);
+          if (base != null)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
+          if (index != null)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, index);
+          if (i.value.mem.scale != 1)
+            System.out.printf("\t\t\toperands[%d].mem.scale: %d\n", c, i.value.mem.scale);
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+        }
+
+        // AVX broadcast type
+        if (i.avx_bcast != X86_AVX_BCAST_INVALID) {
+          System.out.printf("\t\toperands[%d].avx_bcast: %d\n", c, i.avx_bcast);
+        }
+
+        // AVX zero opmask {z}
+        if (i.avx_zero_opmask) {
+          System.out.printf("\t\toperands[%d].avx_zero_opmask: TRUE\n", c);
+        }
+
+        System.out.printf("\t\toperands[%d].size: %d\n", c, i.size);
+        switch(i.access) {
+          case CS_AC_READ:
+            System.out.printf("\t\toperands[%d].access: READ\n", c);
+            break;
+          case CS_AC_WRITE:
+            System.out.printf("\t\toperands[%d].access: WRITE\n", c);
+            break;
+          case CS_AC_READ | CS_AC_WRITE:
+            System.out.printf("\t\toperands[%d].access: READ | WRITE\n", c);
+            break;
+        }
+      }
+
+      // Print out all registers accessed by this instruction (either implicit or explicit)
+      CsRegsAccess regsAccess = ins.regsAccess();
+      if (regsAccess != null) {
+        short[] regsRead = regsAccess.regsRead;
+        short[] regsWrite = regsAccess.regsWrite;
+
+        if (regsRead.length > 0) {
+          System.out.printf("\tRegisters read:");
+          for (int i = 0; i < regsRead.length; i++) {
+            System.out.printf(" %s", ins.regName(regsRead[i]));
+          }
+          System.out.print("\n");
+        }
+
+        if (regsWrite.length > 0) {
+          System.out.printf("\tRegister modified:");
+          for (int i = 0; i < regsWrite.length; i++) {
+            System.out.printf(" %s", ins.regName(regsWrite[i]));
+          }
+          System.out.print("\n");
+        }
+      }
+    }
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_16, hexString2Byte(X86_CODE16), "X86 16bit (Intel syntax)"),
+      new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_32, Capstone.CS_OPT_SYNTAX_ATT, hexString2Byte(X86_CODE32), "X86 32 (AT&T syntax)"),
+      new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_32, hexString2Byte(X86_CODE32), "X86 32 (Intel syntax)"),
+      new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_64, hexString2Byte(X86_CODE64), "X86 64 (Intel syntax)"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      if (test.syntax != 0) {
+        cs.setSyntax(test.syntax);
+      }
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+
+      System.out.printf("0x%x:\n\n", all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size);
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}

thirdparty/capstone/bindings/java/TestXcore.java

@@ -0,0 +1,89 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013-2014
+
+import capstone.Capstone;
+import capstone.Xcore;
+
+import static capstone.Xcore_const.*;
+
+public class TestXcore {
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String XCORE_CODE = "fe0ffe171317c6feec1797f8ec4f1ffdec3707f2455bf9fa02061b1009fdeca7";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Xcore.OpInfo operands = (Xcore.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Xcore.Operand i = (Xcore.Operand) operands.op[c];
+        if (i.type == XCORE_OP_REG)
+            System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == XCORE_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == XCORE_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n", c);
+          if (i.value.mem.base != XCORE_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, ins.regName(i.value.mem.base));
+          if (i.value.mem.index != XCORE_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, ins.regName(i.value.mem.index));
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+          if (i.value.mem.direct != 1)
+            System.out.printf("\t\t\toperands[%d].mem.direct: -1\n", c);
+        }
+      }
+    }
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_XCORE, Capstone.CS_MODE_BIG_ENDIAN, hexString2Byte(XCORE_CODE), "XCore"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+      System.out.printf("0x%x:\n\n", (all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size));
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}

thirdparty/capstone/bindings/java/capstone/Arm.java

@@ -0,0 +1,153 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Arm_const.*;
+
+public class Arm {
+
+  public static class MemType extends Structure {
+    public int base;
+    public int index;
+    public int scale;
+    public int disp;
+    public int lshift;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "index", "scale", "disp", "lshift");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public int imm;
+    public double fp;
+    public MemType mem;
+    public int setend;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("reg", "imm", "fp", "mem", "setend");
+    }
+  }
+
+  public static class OpShift extends Structure {
+    public int type;
+    public int value;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type","value");
+    }
+  }
+
+  public static class Operand extends Structure {
+    public int vector_index;
+    public OpShift shift;
+    public int type;
+    public OpValue value;
+    public boolean subtracted;
+    public byte access;
+    public byte neon_lane;
+
+    public void read() {
+      readField("vector_index");
+      readField("type");
+      if (type == ARM_OP_MEM)
+        value.setType(MemType.class);
+      if (type == ARM_OP_FP)
+        value.setType(Double.TYPE);
+      if (type == ARM_OP_PIMM || type == ARM_OP_IMM || type == ARM_OP_CIMM)
+        value.setType(Integer.TYPE);
+      if (type == ARM_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == ARM_OP_INVALID)
+        return;
+      readField("value");
+      readField("shift");
+      readField("subtracted");
+      readField("access");
+      readField("neon_lane");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("vector_index", "shift", "type", "value", "subtracted", "access", "neon_lane");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public boolean usermode;
+    public int vector_size;
+    public int vector_data;
+    public int cps_mode;
+    public int cps_flag;
+    public int cc;
+    public byte update_flags;
+    public byte writeback;
+    public int mem_barrier;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[36];
+    }
+
+    public void read() {
+      readField("usermode");
+      readField("vector_size");
+      readField("vector_data");
+      readField("cps_mode");
+      readField("cps_flag");
+      readField("cc");
+      readField("update_flags");
+      readField("writeback");
+      readField("mem_barrier");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("usermode", "vector_size", "vector_data",
+          "cps_mode", "cps_flag", "cc", "update_flags", "writeback", "mem_barrier", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public boolean usermode;
+    public int vectorSize;
+    public int vectorData;
+    public int cpsMode;
+    public int cpsFlag;
+    public int cc;
+    public boolean updateFlags;
+    public boolean writeback;
+    public int memBarrier;
+    public Operand [] op = null;
+
+    public OpInfo(UnionOpInfo op_info) {
+      usermode = op_info.usermode;
+      vectorSize = op_info.vector_size;
+      vectorData = op_info.vector_data;
+      cpsMode = op_info.cps_mode;
+      cpsFlag = op_info.cps_flag;
+      cc = op_info.cc;
+      updateFlags = (op_info.update_flags > 0);
+      writeback = (op_info.writeback > 0);
+      memBarrier = op_info.mem_barrier;
+      op = op_info.op;
+    }
+  }
+}

thirdparty/capstone/bindings/java/capstone/Arm64.java

@@ -0,0 +1,127 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Arm64_const.*;
+
+public class Arm64 {
+
+  public static class MemType extends Structure {
+    public int base;
+    public int index;
+    public int disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "index", "disp");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public long imm;
+    public double fp;
+    public MemType mem;
+    public int pstate;
+    public int sys;
+    public int prefetch;
+    public int barrier;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("reg", "imm", "fp", "mem", "pstate", "sys", "prefetch", "barrier");
+    }
+  }
+
+  public static class OpShift extends Structure {
+    public int type;
+    public int value;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type","value");
+    }
+  }
+
+  public static class Operand extends Structure {
+    public int vector_index;
+    public int vas;
+    public OpShift shift;
+    public int ext;
+    public int type;
+    public OpValue value;
+    public byte access;
+
+    public void read() {
+      readField("type");
+      if (type == ARM64_OP_MEM)
+        value.setType(MemType.class);
+      if (type == ARM64_OP_FP)
+        value.setType(Double.TYPE);
+      if (type == ARM64_OP_IMM || type == ARM64_OP_CIMM || type == ARM64_OP_REG || type == ARM64_OP_REG_MRS || type == ARM64_OP_REG_MSR || type == ARM64_OP_PSTATE || type == ARM64_OP_SYS || type == ARM64_OP_PREFETCH || type == ARM64_OP_BARRIER)
+        value.setType(Integer.TYPE);
+      if (type == ARM64_OP_INVALID)
+        return;
+      readField("value");
+      readField("ext");
+      readField("shift");
+      readField("vas");
+      readField("vector_index");
+      readField("access");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("vector_index", "vas", "shift", "ext", "type", "value", "access");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public int cc;
+    public byte _update_flags;
+    public byte _writeback;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[8];
+    }
+
+    public void read() {
+      readField("cc");
+      readField("_update_flags");
+      readField("_writeback");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("cc", "_update_flags", "_writeback", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public int cc;
+    public boolean updateFlags;
+    public boolean writeback;
+    public Operand [] op = null;
+
+    public OpInfo(UnionOpInfo op_info) {
+      cc = op_info.cc;
+      updateFlags = (op_info._update_flags > 0);
+      writeback = (op_info._writeback > 0);
+      op = op_info.op;
+    }
+  }
+}

thirdparty/capstone/bindings/java/capstone/Arm_const.java

@@ -0,0 +1,834 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Arm_const {
+
+	public static final int ARM_SFT_INVALID = 0;
+	public static final int ARM_SFT_ASR = 1;
+	public static final int ARM_SFT_LSL = 2;
+	public static final int ARM_SFT_LSR = 3;
+	public static final int ARM_SFT_ROR = 4;
+	public static final int ARM_SFT_RRX = 5;
+	public static final int ARM_SFT_ASR_REG = 6;
+	public static final int ARM_SFT_LSL_REG = 7;
+	public static final int ARM_SFT_LSR_REG = 8;
+	public static final int ARM_SFT_ROR_REG = 9;
+	public static final int ARM_SFT_RRX_REG = 10;
+
+	public static final int ARM_CC_INVALID = 0;
+	public static final int ARM_CC_EQ = 1;
+	public static final int ARM_CC_NE = 2;
+	public static final int ARM_CC_HS = 3;
+	public static final int ARM_CC_LO = 4;
+	public static final int ARM_CC_MI = 5;
+	public static final int ARM_CC_PL = 6;
+	public static final int ARM_CC_VS = 7;
+	public static final int ARM_CC_VC = 8;
+	public static final int ARM_CC_HI = 9;
+	public static final int ARM_CC_LS = 10;
+	public static final int ARM_CC_GE = 11;
+	public static final int ARM_CC_LT = 12;
+	public static final int ARM_CC_GT = 13;
+	public static final int ARM_CC_LE = 14;
+	public static final int ARM_CC_AL = 15;
+
+	public static final int ARM_SYSREG_INVALID = 0;
+	public static final int ARM_SYSREG_SPSR_C = 1;
+	public static final int ARM_SYSREG_SPSR_X = 2;
+	public static final int ARM_SYSREG_SPSR_S = 4;
+	public static final int ARM_SYSREG_SPSR_F = 8;
+	public static final int ARM_SYSREG_CPSR_C = 16;
+	public static final int ARM_SYSREG_CPSR_X = 32;
+	public static final int ARM_SYSREG_CPSR_S = 64;
+	public static final int ARM_SYSREG_CPSR_F = 128;
+	public static final int ARM_SYSREG_APSR = 256;
+	public static final int ARM_SYSREG_APSR_G = 257;
+	public static final int ARM_SYSREG_APSR_NZCVQ = 258;
+	public static final int ARM_SYSREG_APSR_NZCVQG = 259;
+	public static final int ARM_SYSREG_IAPSR = 260;
+	public static final int ARM_SYSREG_IAPSR_G = 261;
+	public static final int ARM_SYSREG_IAPSR_NZCVQG = 262;
+	public static final int ARM_SYSREG_IAPSR_NZCVQ = 263;
+	public static final int ARM_SYSREG_EAPSR = 264;
+	public static final int ARM_SYSREG_EAPSR_G = 265;
+	public static final int ARM_SYSREG_EAPSR_NZCVQG = 266;
+	public static final int ARM_SYSREG_EAPSR_NZCVQ = 267;
+	public static final int ARM_SYSREG_XPSR = 268;
+	public static final int ARM_SYSREG_XPSR_G = 269;
+	public static final int ARM_SYSREG_XPSR_NZCVQG = 270;
+	public static final int ARM_SYSREG_XPSR_NZCVQ = 271;
+	public static final int ARM_SYSREG_IPSR = 272;
+	public static final int ARM_SYSREG_EPSR = 273;
+	public static final int ARM_SYSREG_IEPSR = 274;
+	public static final int ARM_SYSREG_MSP = 275;
+	public static final int ARM_SYSREG_PSP = 276;
+	public static final int ARM_SYSREG_PRIMASK = 277;
+	public static final int ARM_SYSREG_BASEPRI = 278;
+	public static final int ARM_SYSREG_BASEPRI_MAX = 279;
+	public static final int ARM_SYSREG_FAULTMASK = 280;
+	public static final int ARM_SYSREG_CONTROL = 281;
+	public static final int ARM_SYSREG_MSPLIM = 282;
+	public static final int ARM_SYSREG_PSPLIM = 283;
+	public static final int ARM_SYSREG_MSP_NS = 284;
+	public static final int ARM_SYSREG_PSP_NS = 285;
+	public static final int ARM_SYSREG_MSPLIM_NS = 286;
+	public static final int ARM_SYSREG_PSPLIM_NS = 287;
+	public static final int ARM_SYSREG_PRIMASK_NS = 288;
+	public static final int ARM_SYSREG_BASEPRI_NS = 289;
+	public static final int ARM_SYSREG_FAULTMASK_NS = 290;
+	public static final int ARM_SYSREG_CONTROL_NS = 291;
+	public static final int ARM_SYSREG_SP_NS = 292;
+	public static final int ARM_SYSREG_R8_USR = 293;
+	public static final int ARM_SYSREG_R9_USR = 294;
+	public static final int ARM_SYSREG_R10_USR = 295;
+	public static final int ARM_SYSREG_R11_USR = 296;
+	public static final int ARM_SYSREG_R12_USR = 297;
+	public static final int ARM_SYSREG_SP_USR = 298;
+	public static final int ARM_SYSREG_LR_USR = 299;
+	public static final int ARM_SYSREG_R8_FIQ = 300;
+	public static final int ARM_SYSREG_R9_FIQ = 301;
+	public static final int ARM_SYSREG_R10_FIQ = 302;
+	public static final int ARM_SYSREG_R11_FIQ = 303;
+	public static final int ARM_SYSREG_R12_FIQ = 304;
+	public static final int ARM_SYSREG_SP_FIQ = 305;
+	public static final int ARM_SYSREG_LR_FIQ = 306;
+	public static final int ARM_SYSREG_LR_IRQ = 307;
+	public static final int ARM_SYSREG_SP_IRQ = 308;
+	public static final int ARM_SYSREG_LR_SVC = 309;
+	public static final int ARM_SYSREG_SP_SVC = 310;
+	public static final int ARM_SYSREG_LR_ABT = 311;
+	public static final int ARM_SYSREG_SP_ABT = 312;
+	public static final int ARM_SYSREG_LR_UND = 313;
+	public static final int ARM_SYSREG_SP_UND = 314;
+	public static final int ARM_SYSREG_LR_MON = 315;
+	public static final int ARM_SYSREG_SP_MON = 316;
+	public static final int ARM_SYSREG_ELR_HYP = 317;
+	public static final int ARM_SYSREG_SP_HYP = 318;
+	public static final int ARM_SYSREG_SPSR_FIQ = 319;
+	public static final int ARM_SYSREG_SPSR_IRQ = 320;
+	public static final int ARM_SYSREG_SPSR_SVC = 321;
+	public static final int ARM_SYSREG_SPSR_ABT = 322;
+	public static final int ARM_SYSREG_SPSR_UND = 323;
+	public static final int ARM_SYSREG_SPSR_MON = 324;
+	public static final int ARM_SYSREG_SPSR_HYP = 325;
+
+	public static final int ARM_MB_INVALID = 0;
+	public static final int ARM_MB_RESERVED_0 = 1;
+	public static final int ARM_MB_OSHLD = 2;
+	public static final int ARM_MB_OSHST = 3;
+	public static final int ARM_MB_OSH = 4;
+	public static final int ARM_MB_RESERVED_4 = 5;
+	public static final int ARM_MB_NSHLD = 6;
+	public static final int ARM_MB_NSHST = 7;
+	public static final int ARM_MB_NSH = 8;
+	public static final int ARM_MB_RESERVED_8 = 9;
+	public static final int ARM_MB_ISHLD = 10;
+	public static final int ARM_MB_ISHST = 11;
+	public static final int ARM_MB_ISH = 12;
+	public static final int ARM_MB_RESERVED_12 = 13;
+	public static final int ARM_MB_LD = 14;
+	public static final int ARM_MB_ST = 15;
+	public static final int ARM_MB_SY = 16;
+
+	public static final int ARM_OP_INVALID = 0;
+	public static final int ARM_OP_REG = 1;
+	public static final int ARM_OP_IMM = 2;
+	public static final int ARM_OP_MEM = 3;
+	public static final int ARM_OP_FP = 4;
+	public static final int ARM_OP_CIMM = 64;
+	public static final int ARM_OP_PIMM = 65;
+	public static final int ARM_OP_SETEND = 66;
+	public static final int ARM_OP_SYSREG = 67;
+
+	public static final int ARM_SETEND_INVALID = 0;
+	public static final int ARM_SETEND_BE = 1;
+	public static final int ARM_SETEND_LE = 2;
+
+	public static final int ARM_CPSMODE_INVALID = 0;
+	public static final int ARM_CPSMODE_IE = 2;
+	public static final int ARM_CPSMODE_ID = 3;
+
+	public static final int ARM_CPSFLAG_INVALID = 0;
+	public static final int ARM_CPSFLAG_F = 1;
+	public static final int ARM_CPSFLAG_I = 2;
+	public static final int ARM_CPSFLAG_A = 4;
+	public static final int ARM_CPSFLAG_NONE = 16;
+
+	public static final int ARM_VECTORDATA_INVALID = 0;
+	public static final int ARM_VECTORDATA_I8 = 1;
+	public static final int ARM_VECTORDATA_I16 = 2;
+	public static final int ARM_VECTORDATA_I32 = 3;
+	public static final int ARM_VECTORDATA_I64 = 4;
+	public static final int ARM_VECTORDATA_S8 = 5;
+	public static final int ARM_VECTORDATA_S16 = 6;
+	public static final int ARM_VECTORDATA_S32 = 7;
+	public static final int ARM_VECTORDATA_S64 = 8;
+	public static final int ARM_VECTORDATA_U8 = 9;
+	public static final int ARM_VECTORDATA_U16 = 10;
+	public static final int ARM_VECTORDATA_U32 = 11;
+	public static final int ARM_VECTORDATA_U64 = 12;
+	public static final int ARM_VECTORDATA_P8 = 13;
+	public static final int ARM_VECTORDATA_F16 = 14;
+	public static final int ARM_VECTORDATA_F32 = 15;
+	public static final int ARM_VECTORDATA_F64 = 16;
+	public static final int ARM_VECTORDATA_F16F64 = 17;
+	public static final int ARM_VECTORDATA_F64F16 = 18;
+	public static final int ARM_VECTORDATA_F32F16 = 19;
+	public static final int ARM_VECTORDATA_F16F32 = 20;
+	public static final int ARM_VECTORDATA_F64F32 = 21;
+	public static final int ARM_VECTORDATA_F32F64 = 22;
+	public static final int ARM_VECTORDATA_S32F32 = 23;
+	public static final int ARM_VECTORDATA_U32F32 = 24;
+	public static final int ARM_VECTORDATA_F32S32 = 25;
+	public static final int ARM_VECTORDATA_F32U32 = 26;
+	public static final int ARM_VECTORDATA_F64S16 = 27;
+	public static final int ARM_VECTORDATA_F32S16 = 28;
+	public static final int ARM_VECTORDATA_F64S32 = 29;
+	public static final int ARM_VECTORDATA_S16F64 = 30;
+	public static final int ARM_VECTORDATA_S16F32 = 31;
+	public static final int ARM_VECTORDATA_S32F64 = 32;
+	public static final int ARM_VECTORDATA_U16F64 = 33;
+	public static final int ARM_VECTORDATA_U16F32 = 34;
+	public static final int ARM_VECTORDATA_U32F64 = 35;
+	public static final int ARM_VECTORDATA_F64U16 = 36;
+	public static final int ARM_VECTORDATA_F32U16 = 37;
+	public static final int ARM_VECTORDATA_F64U32 = 38;
+	public static final int ARM_VECTORDATA_F16U16 = 39;
+	public static final int ARM_VECTORDATA_U16F16 = 40;
+	public static final int ARM_VECTORDATA_F16U32 = 41;
+	public static final int ARM_VECTORDATA_U32F16 = 42;
+
+	public static final int ARM_REG_INVALID = 0;
+	public static final int ARM_REG_APSR = 1;
+	public static final int ARM_REG_APSR_NZCV = 2;
+	public static final int ARM_REG_CPSR = 3;
+	public static final int ARM_REG_FPEXC = 4;
+	public static final int ARM_REG_FPINST = 5;
+	public static final int ARM_REG_FPSCR = 6;
+	public static final int ARM_REG_FPSCR_NZCV = 7;
+	public static final int ARM_REG_FPSID = 8;
+	public static final int ARM_REG_ITSTATE = 9;
+	public static final int ARM_REG_LR = 10;
+	public static final int ARM_REG_PC = 11;
+	public static final int ARM_REG_SP = 12;
+	public static final int ARM_REG_SPSR = 13;
+	public static final int ARM_REG_D0 = 14;
+	public static final int ARM_REG_D1 = 15;
+	public static final int ARM_REG_D2 = 16;
+	public static final int ARM_REG_D3 = 17;
+	public static final int ARM_REG_D4 = 18;
+	public static final int ARM_REG_D5 = 19;
+	public static final int ARM_REG_D6 = 20;
+	public static final int ARM_REG_D7 = 21;
+	public static final int ARM_REG_D8 = 22;
+	public static final int ARM_REG_D9 = 23;
+	public static final int ARM_REG_D10 = 24;
+	public static final int ARM_REG_D11 = 25;
+	public static final int ARM_REG_D12 = 26;
+	public static final int ARM_REG_D13 = 27;
+	public static final int ARM_REG_D14 = 28;
+	public static final int ARM_REG_D15 = 29;
+	public static final int ARM_REG_D16 = 30;
+	public static final int ARM_REG_D17 = 31;
+	public static final int ARM_REG_D18 = 32;
+	public static final int ARM_REG_D19 = 33;
+	public static final int ARM_REG_D20 = 34;
+	public static final int ARM_REG_D21 = 35;
+	public static final int ARM_REG_D22 = 36;
+	public static final int ARM_REG_D23 = 37;
+	public static final int ARM_REG_D24 = 38;
+	public static final int ARM_REG_D25 = 39;
+	public static final int ARM_REG_D26 = 40;
+	public static final int ARM_REG_D27 = 41;
+	public static final int ARM_REG_D28 = 42;
+	public static final int ARM_REG_D29 = 43;
+	public static final int ARM_REG_D30 = 44;
+	public static final int ARM_REG_D31 = 45;
+	public static final int ARM_REG_FPINST2 = 46;
+	public static final int ARM_REG_MVFR0 = 47;
+	public static final int ARM_REG_MVFR1 = 48;
+	public static final int ARM_REG_MVFR2 = 49;
+	public static final int ARM_REG_Q0 = 50;
+	public static final int ARM_REG_Q1 = 51;
+	public static final int ARM_REG_Q2 = 52;
+	public static final int ARM_REG_Q3 = 53;
+	public static final int ARM_REG_Q4 = 54;
+	public static final int ARM_REG_Q5 = 55;
+	public static final int ARM_REG_Q6 = 56;
+	public static final int ARM_REG_Q7 = 57;
+	public static final int ARM_REG_Q8 = 58;
+	public static final int ARM_REG_Q9 = 59;
+	public static final int ARM_REG_Q10 = 60;
+	public static final int ARM_REG_Q11 = 61;
+	public static final int ARM_REG_Q12 = 62;
+	public static final int ARM_REG_Q13 = 63;
+	public static final int ARM_REG_Q14 = 64;
+	public static final int ARM_REG_Q15 = 65;
+	public static final int ARM_REG_R0 = 66;
+	public static final int ARM_REG_R1 = 67;
+	public static final int ARM_REG_R2 = 68;
+	public static final int ARM_REG_R3 = 69;
+	public static final int ARM_REG_R4 = 70;
+	public static final int ARM_REG_R5 = 71;
+	public static final int ARM_REG_R6 = 72;
+	public static final int ARM_REG_R7 = 73;
+	public static final int ARM_REG_R8 = 74;
+	public static final int ARM_REG_R9 = 75;
+	public static final int ARM_REG_R10 = 76;
+	public static final int ARM_REG_R11 = 77;
+	public static final int ARM_REG_R12 = 78;
+	public static final int ARM_REG_S0 = 79;
+	public static final int ARM_REG_S1 = 80;
+	public static final int ARM_REG_S2 = 81;
+	public static final int ARM_REG_S3 = 82;
+	public static final int ARM_REG_S4 = 83;
+	public static final int ARM_REG_S5 = 84;
+	public static final int ARM_REG_S6 = 85;
+	public static final int ARM_REG_S7 = 86;
+	public static final int ARM_REG_S8 = 87;
+	public static final int ARM_REG_S9 = 88;
+	public static final int ARM_REG_S10 = 89;
+	public static final int ARM_REG_S11 = 90;
+	public static final int ARM_REG_S12 = 91;
+	public static final int ARM_REG_S13 = 92;
+	public static final int ARM_REG_S14 = 93;
+	public static final int ARM_REG_S15 = 94;
+	public static final int ARM_REG_S16 = 95;
+	public static final int ARM_REG_S17 = 96;
+	public static final int ARM_REG_S18 = 97;
+	public static final int ARM_REG_S19 = 98;
+	public static final int ARM_REG_S20 = 99;
+	public static final int ARM_REG_S21 = 100;
+	public static final int ARM_REG_S22 = 101;
+	public static final int ARM_REG_S23 = 102;
+	public static final int ARM_REG_S24 = 103;
+	public static final int ARM_REG_S25 = 104;
+	public static final int ARM_REG_S26 = 105;
+	public static final int ARM_REG_S27 = 106;
+	public static final int ARM_REG_S28 = 107;
+	public static final int ARM_REG_S29 = 108;
+	public static final int ARM_REG_S30 = 109;
+	public static final int ARM_REG_S31 = 110;
+	public static final int ARM_REG_ENDING = 111;
+	public static final int ARM_REG_R13 = ARM_REG_SP;
+	public static final int ARM_REG_R14 = ARM_REG_LR;
+	public static final int ARM_REG_R15 = ARM_REG_PC;
+	public static final int ARM_REG_SB = ARM_REG_R9;
+	public static final int ARM_REG_SL = ARM_REG_R10;
+	public static final int ARM_REG_FP = ARM_REG_R11;
+	public static final int ARM_REG_IP = ARM_REG_R12;
+
+	public static final int ARM_INS_INVALID = 0;
+	public static final int ARM_INS_ADC = 1;
+	public static final int ARM_INS_ADD = 2;
+	public static final int ARM_INS_ADDW = 3;
+	public static final int ARM_INS_ADR = 4;
+	public static final int ARM_INS_AESD = 5;
+	public static final int ARM_INS_AESE = 6;
+	public static final int ARM_INS_AESIMC = 7;
+	public static final int ARM_INS_AESMC = 8;
+	public static final int ARM_INS_AND = 9;
+	public static final int ARM_INS_ASR = 10;
+	public static final int ARM_INS_B = 11;
+	public static final int ARM_INS_BFC = 12;
+	public static final int ARM_INS_BFI = 13;
+	public static final int ARM_INS_BIC = 14;
+	public static final int ARM_INS_BKPT = 15;
+	public static final int ARM_INS_BL = 16;
+	public static final int ARM_INS_BLX = 17;
+	public static final int ARM_INS_BLXNS = 18;
+	public static final int ARM_INS_BX = 19;
+	public static final int ARM_INS_BXJ = 20;
+	public static final int ARM_INS_BXNS = 21;
+	public static final int ARM_INS_CBNZ = 22;
+	public static final int ARM_INS_CBZ = 23;
+	public static final int ARM_INS_CDP = 24;
+	public static final int ARM_INS_CDP2 = 25;
+	public static final int ARM_INS_CLREX = 26;
+	public static final int ARM_INS_CLZ = 27;
+	public static final int ARM_INS_CMN = 28;
+	public static final int ARM_INS_CMP = 29;
+	public static final int ARM_INS_CPS = 30;
+	public static final int ARM_INS_CRC32B = 31;
+	public static final int ARM_INS_CRC32CB = 32;
+	public static final int ARM_INS_CRC32CH = 33;
+	public static final int ARM_INS_CRC32CW = 34;
+	public static final int ARM_INS_CRC32H = 35;
+	public static final int ARM_INS_CRC32W = 36;
+	public static final int ARM_INS_CSDB = 37;
+	public static final int ARM_INS_DBG = 38;
+	public static final int ARM_INS_DCPS1 = 39;
+	public static final int ARM_INS_DCPS2 = 40;
+	public static final int ARM_INS_DCPS3 = 41;
+	public static final int ARM_INS_DFB = 42;
+	public static final int ARM_INS_DMB = 43;
+	public static final int ARM_INS_DSB = 44;
+	public static final int ARM_INS_EOR = 45;
+	public static final int ARM_INS_ERET = 46;
+	public static final int ARM_INS_ESB = 47;
+	public static final int ARM_INS_FADDD = 48;
+	public static final int ARM_INS_FADDS = 49;
+	public static final int ARM_INS_FCMPZD = 50;
+	public static final int ARM_INS_FCMPZS = 51;
+	public static final int ARM_INS_FCONSTD = 52;
+	public static final int ARM_INS_FCONSTS = 53;
+	public static final int ARM_INS_FLDMDBX = 54;
+	public static final int ARM_INS_FLDMIAX = 55;
+	public static final int ARM_INS_FMDHR = 56;
+	public static final int ARM_INS_FMDLR = 57;
+	public static final int ARM_INS_FMSTAT = 58;
+	public static final int ARM_INS_FSTMDBX = 59;
+	public static final int ARM_INS_FSTMIAX = 60;
+	public static final int ARM_INS_FSUBD = 61;
+	public static final int ARM_INS_FSUBS = 62;
+	public static final int ARM_INS_HINT = 63;
+	public static final int ARM_INS_HLT = 64;
+	public static final int ARM_INS_HVC = 65;
+	public static final int ARM_INS_ISB = 66;
+	public static final int ARM_INS_IT = 67;
+	public static final int ARM_INS_LDA = 68;
+	public static final int ARM_INS_LDAB = 69;
+	public static final int ARM_INS_LDAEX = 70;
+	public static final int ARM_INS_LDAEXB = 71;
+	public static final int ARM_INS_LDAEXD = 72;
+	public static final int ARM_INS_LDAEXH = 73;
+	public static final int ARM_INS_LDAH = 74;
+	public static final int ARM_INS_LDC = 75;
+	public static final int ARM_INS_LDC2 = 76;
+	public static final int ARM_INS_LDC2L = 77;
+	public static final int ARM_INS_LDCL = 78;
+	public static final int ARM_INS_LDM = 79;
+	public static final int ARM_INS_LDMDA = 80;
+	public static final int ARM_INS_LDMDB = 81;
+	public static final int ARM_INS_LDMIB = 82;
+	public static final int ARM_INS_LDR = 83;
+	public static final int ARM_INS_LDRB = 84;
+	public static final int ARM_INS_LDRBT = 85;
+	public static final int ARM_INS_LDRD = 86;
+	public static final int ARM_INS_LDREX = 87;
+	public static final int ARM_INS_LDREXB = 88;
+	public static final int ARM_INS_LDREXD = 89;
+	public static final int ARM_INS_LDREXH = 90;
+	public static final int ARM_INS_LDRH = 91;
+	public static final int ARM_INS_LDRHT = 92;
+	public static final int ARM_INS_LDRSB = 93;
+	public static final int ARM_INS_LDRSBT = 94;
+	public static final int ARM_INS_LDRSH = 95;
+	public static final int ARM_INS_LDRSHT = 96;
+	public static final int ARM_INS_LDRT = 97;
+	public static final int ARM_INS_LSL = 98;
+	public static final int ARM_INS_LSR = 99;
+	public static final int ARM_INS_MCR = 100;
+	public static final int ARM_INS_MCR2 = 101;
+	public static final int ARM_INS_MCRR = 102;
+	public static final int ARM_INS_MCRR2 = 103;
+	public static final int ARM_INS_MLA = 104;
+	public static final int ARM_INS_MLS = 105;
+	public static final int ARM_INS_MOV = 106;
+	public static final int ARM_INS_MOVS = 107;
+	public static final int ARM_INS_MOVT = 108;
+	public static final int ARM_INS_MOVW = 109;
+	public static final int ARM_INS_MRC = 110;
+	public static final int ARM_INS_MRC2 = 111;
+	public static final int ARM_INS_MRRC = 112;
+	public static final int ARM_INS_MRRC2 = 113;
+	public static final int ARM_INS_MRS = 114;
+	public static final int ARM_INS_MSR = 115;
+	public static final int ARM_INS_MUL = 116;
+	public static final int ARM_INS_MVN = 117;
+	public static final int ARM_INS_NEG = 118;
+	public static final int ARM_INS_NOP = 119;
+	public static final int ARM_INS_ORN = 120;
+	public static final int ARM_INS_ORR = 121;
+	public static final int ARM_INS_PKHBT = 122;
+	public static final int ARM_INS_PKHTB = 123;
+	public static final int ARM_INS_PLD = 124;
+	public static final int ARM_INS_PLDW = 125;
+	public static final int ARM_INS_PLI = 126;
+	public static final int ARM_INS_POP = 127;
+	public static final int ARM_INS_PUSH = 128;
+	public static final int ARM_INS_QADD = 129;
+	public static final int ARM_INS_QADD16 = 130;
+	public static final int ARM_INS_QADD8 = 131;
+	public static final int ARM_INS_QASX = 132;
+	public static final int ARM_INS_QDADD = 133;
+	public static final int ARM_INS_QDSUB = 134;
+	public static final int ARM_INS_QSAX = 135;
+	public static final int ARM_INS_QSUB = 136;
+	public static final int ARM_INS_QSUB16 = 137;
+	public static final int ARM_INS_QSUB8 = 138;
+	public static final int ARM_INS_RBIT = 139;
+	public static final int ARM_INS_REV = 140;
+	public static final int ARM_INS_REV16 = 141;
+	public static final int ARM_INS_REVSH = 142;
+	public static final int ARM_INS_RFEDA = 143;
+	public static final int ARM_INS_RFEDB = 144;
+	public static final int ARM_INS_RFEIA = 145;
+	public static final int ARM_INS_RFEIB = 146;
+	public static final int ARM_INS_ROR = 147;
+	public static final int ARM_INS_RRX = 148;
+	public static final int ARM_INS_RSB = 149;
+	public static final int ARM_INS_RSC = 150;
+	public static final int ARM_INS_SADD16 = 151;
+	public static final int ARM_INS_SADD8 = 152;
+	public static final int ARM_INS_SASX = 153;
+	public static final int ARM_INS_SBC = 154;
+	public static final int ARM_INS_SBFX = 155;
+	public static final int ARM_INS_SDIV = 156;
+	public static final int ARM_INS_SEL = 157;
+	public static final int ARM_INS_SETEND = 158;
+	public static final int ARM_INS_SETPAN = 159;
+	public static final int ARM_INS_SEV = 160;
+	public static final int ARM_INS_SEVL = 161;
+	public static final int ARM_INS_SG = 162;
+	public static final int ARM_INS_SHA1C = 163;
+	public static final int ARM_INS_SHA1H = 164;
+	public static final int ARM_INS_SHA1M = 165;
+	public static final int ARM_INS_SHA1P = 166;
+	public static final int ARM_INS_SHA1SU0 = 167;
+	public static final int ARM_INS_SHA1SU1 = 168;
+	public static final int ARM_INS_SHA256H = 169;
+	public static final int ARM_INS_SHA256H2 = 170;
+	public static final int ARM_INS_SHA256SU0 = 171;
+	public static final int ARM_INS_SHA256SU1 = 172;
+	public static final int ARM_INS_SHADD16 = 173;
+	public static final int ARM_INS_SHADD8 = 174;
+	public static final int ARM_INS_SHASX = 175;
+	public static final int ARM_INS_SHSAX = 176;
+	public static final int ARM_INS_SHSUB16 = 177;
+	public static final int ARM_INS_SHSUB8 = 178;
+	public static final int ARM_INS_SMC = 179;
+	public static final int ARM_INS_SMLABB = 180;
+	public static final int ARM_INS_SMLABT = 181;
+	public static final int ARM_INS_SMLAD = 182;
+	public static final int ARM_INS_SMLADX = 183;
+	public static final int ARM_INS_SMLAL = 184;
+	public static final int ARM_INS_SMLALBB = 185;
+	public static final int ARM_INS_SMLALBT = 186;
+	public static final int ARM_INS_SMLALD = 187;
+	public static final int ARM_INS_SMLALDX = 188;
+	public static final int ARM_INS_SMLALTB = 189;
+	public static final int ARM_INS_SMLALTT = 190;
+	public static final int ARM_INS_SMLATB = 191;
+	public static final int ARM_INS_SMLATT = 192;
+	public static final int ARM_INS_SMLAWB = 193;
+	public static final int ARM_INS_SMLAWT = 194;
+	public static final int ARM_INS_SMLSD = 195;
+	public static final int ARM_INS_SMLSDX = 196;
+	public static final int ARM_INS_SMLSLD = 197;
+	public static final int ARM_INS_SMLSLDX = 198;
+	public static final int ARM_INS_SMMLA = 199;
+	public static final int ARM_INS_SMMLAR = 200;
+	public static final int ARM_INS_SMMLS = 201;
+	public static final int ARM_INS_SMMLSR = 202;
+	public static final int ARM_INS_SMMUL = 203;
+	public static final int ARM_INS_SMMULR = 204;
+	public static final int ARM_INS_SMUAD = 205;
+	public static final int ARM_INS_SMUADX = 206;
+	public static final int ARM_INS_SMULBB = 207;
+	public static final int ARM_INS_SMULBT = 208;
+	public static final int ARM_INS_SMULL = 209;
+	public static final int ARM_INS_SMULTB = 210;
+	public static final int ARM_INS_SMULTT = 211;
+	public static final int ARM_INS_SMULWB = 212;
+	public static final int ARM_INS_SMULWT = 213;
+	public static final int ARM_INS_SMUSD = 214;
+	public static final int ARM_INS_SMUSDX = 215;
+	public static final int ARM_INS_SRSDA = 216;
+	public static final int ARM_INS_SRSDB = 217;
+	public static final int ARM_INS_SRSIA = 218;
+	public static final int ARM_INS_SRSIB = 219;
+	public static final int ARM_INS_SSAT = 220;
+	public static final int ARM_INS_SSAT16 = 221;
+	public static final int ARM_INS_SSAX = 222;
+	public static final int ARM_INS_SSUB16 = 223;
+	public static final int ARM_INS_SSUB8 = 224;
+	public static final int ARM_INS_STC = 225;
+	public static final int ARM_INS_STC2 = 226;
+	public static final int ARM_INS_STC2L = 227;
+	public static final int ARM_INS_STCL = 228;
+	public static final int ARM_INS_STL = 229;
+	public static final int ARM_INS_STLB = 230;
+	public static final int ARM_INS_STLEX = 231;
+	public static final int ARM_INS_STLEXB = 232;
+	public static final int ARM_INS_STLEXD = 233;
+	public static final int ARM_INS_STLEXH = 234;
+	public static final int ARM_INS_STLH = 235;
+	public static final int ARM_INS_STM = 236;
+	public static final int ARM_INS_STMDA = 237;
+	public static final int ARM_INS_STMDB = 238;
+	public static final int ARM_INS_STMIB = 239;
+	public static final int ARM_INS_STR = 240;
+	public static final int ARM_INS_STRB = 241;
+	public static final int ARM_INS_STRBT = 242;
+	public static final int ARM_INS_STRD = 243;
+	public static final int ARM_INS_STREX = 244;
+	public static final int ARM_INS_STREXB = 245;
+	public static final int ARM_INS_STREXD = 246;
+	public static final int ARM_INS_STREXH = 247;
+	public static final int ARM_INS_STRH = 248;
+	public static final int ARM_INS_STRHT = 249;
+	public static final int ARM_INS_STRT = 250;
+	public static final int ARM_INS_SUB = 251;
+	public static final int ARM_INS_SUBS = 252;
+	public static final int ARM_INS_SUBW = 253;
+	public static final int ARM_INS_SVC = 254;
+	public static final int ARM_INS_SWP = 255;
+	public static final int ARM_INS_SWPB = 256;
+	public static final int ARM_INS_SXTAB = 257;
+	public static final int ARM_INS_SXTAB16 = 258;
+	public static final int ARM_INS_SXTAH = 259;
+	public static final int ARM_INS_SXTB = 260;
+	public static final int ARM_INS_SXTB16 = 261;
+	public static final int ARM_INS_SXTH = 262;
+	public static final int ARM_INS_TBB = 263;
+	public static final int ARM_INS_TBH = 264;
+	public static final int ARM_INS_TEQ = 265;
+	public static final int ARM_INS_TRAP = 266;
+	public static final int ARM_INS_TSB = 267;
+	public static final int ARM_INS_TST = 268;
+	public static final int ARM_INS_TT = 269;
+	public static final int ARM_INS_TTA = 270;
+	public static final int ARM_INS_TTAT = 271;
+	public static final int ARM_INS_TTT = 272;
+	public static final int ARM_INS_UADD16 = 273;
+	public static final int ARM_INS_UADD8 = 274;
+	public static final int ARM_INS_UASX = 275;
+	public static final int ARM_INS_UBFX = 276;
+	public static final int ARM_INS_UDF = 277;
+	public static final int ARM_INS_UDIV = 278;
+	public static final int ARM_INS_UHADD16 = 279;
+	public static final int ARM_INS_UHADD8 = 280;
+	public static final int ARM_INS_UHASX = 281;
+	public static final int ARM_INS_UHSAX = 282;
+	public static final int ARM_INS_UHSUB16 = 283;
+	public static final int ARM_INS_UHSUB8 = 284;
+	public static final int ARM_INS_UMAAL = 285;
+	public static final int ARM_INS_UMLAL = 286;
+	public static final int ARM_INS_UMULL = 287;
+	public static final int ARM_INS_UQADD16 = 288;
+	public static final int ARM_INS_UQADD8 = 289;
+	public static final int ARM_INS_UQASX = 290;
+	public static final int ARM_INS_UQSAX = 291;
+	public static final int ARM_INS_UQSUB16 = 292;
+	public static final int ARM_INS_UQSUB8 = 293;
+	public static final int ARM_INS_USAD8 = 294;
+	public static final int ARM_INS_USADA8 = 295;
+	public static final int ARM_INS_USAT = 296;
+	public static final int ARM_INS_USAT16 = 297;
+	public static final int ARM_INS_USAX = 298;
+	public static final int ARM_INS_USUB16 = 299;
+	public static final int ARM_INS_USUB8 = 300;
+	public static final int ARM_INS_UXTAB = 301;
+	public static final int ARM_INS_UXTAB16 = 302;
+	public static final int ARM_INS_UXTAH = 303;
+	public static final int ARM_INS_UXTB = 304;
+	public static final int ARM_INS_UXTB16 = 305;
+	public static final int ARM_INS_UXTH = 306;
+	public static final int ARM_INS_VABA = 307;
+	public static final int ARM_INS_VABAL = 308;
+	public static final int ARM_INS_VABD = 309;
+	public static final int ARM_INS_VABDL = 310;
+	public static final int ARM_INS_VABS = 311;
+	public static final int ARM_INS_VACGE = 312;
+	public static final int ARM_INS_VACGT = 313;
+	public static final int ARM_INS_VACLE = 314;
+	public static final int ARM_INS_VACLT = 315;
+	public static final int ARM_INS_VADD = 316;
+	public static final int ARM_INS_VADDHN = 317;
+	public static final int ARM_INS_VADDL = 318;
+	public static final int ARM_INS_VADDW = 319;
+	public static final int ARM_INS_VAND = 320;
+	public static final int ARM_INS_VBIC = 321;
+	public static final int ARM_INS_VBIF = 322;
+	public static final int ARM_INS_VBIT = 323;
+	public static final int ARM_INS_VBSL = 324;
+	public static final int ARM_INS_VCADD = 325;
+	public static final int ARM_INS_VCEQ = 326;
+	public static final int ARM_INS_VCGE = 327;
+	public static final int ARM_INS_VCGT = 328;
+	public static final int ARM_INS_VCLE = 329;
+	public static final int ARM_INS_VCLS = 330;
+	public static final int ARM_INS_VCLT = 331;
+	public static final int ARM_INS_VCLZ = 332;
+	public static final int ARM_INS_VCMLA = 333;
+	public static final int ARM_INS_VCMP = 334;
+	public static final int ARM_INS_VCMPE = 335;
+	public static final int ARM_INS_VCNT = 336;
+	public static final int ARM_INS_VCVT = 337;
+	public static final int ARM_INS_VCVTA = 338;
+	public static final int ARM_INS_VCVTB = 339;
+	public static final int ARM_INS_VCVTM = 340;
+	public static final int ARM_INS_VCVTN = 341;
+	public static final int ARM_INS_VCVTP = 342;
+	public static final int ARM_INS_VCVTR = 343;
+	public static final int ARM_INS_VCVTT = 344;
+	public static final int ARM_INS_VDIV = 345;
+	public static final int ARM_INS_VDUP = 346;
+	public static final int ARM_INS_VEOR = 347;
+	public static final int ARM_INS_VEXT = 348;
+	public static final int ARM_INS_VFMA = 349;
+	public static final int ARM_INS_VFMS = 350;
+	public static final int ARM_INS_VFNMA = 351;
+	public static final int ARM_INS_VFNMS = 352;
+	public static final int ARM_INS_VHADD = 353;
+	public static final int ARM_INS_VHSUB = 354;
+	public static final int ARM_INS_VINS = 355;
+	public static final int ARM_INS_VJCVT = 356;
+	public static final int ARM_INS_VLD1 = 357;
+	public static final int ARM_INS_VLD2 = 358;
+	public static final int ARM_INS_VLD3 = 359;
+	public static final int ARM_INS_VLD4 = 360;
+	public static final int ARM_INS_VLDMDB = 361;
+	public static final int ARM_INS_VLDMIA = 362;
+	public static final int ARM_INS_VLDR = 363;
+	public static final int ARM_INS_VLLDM = 364;
+	public static final int ARM_INS_VLSTM = 365;
+	public static final int ARM_INS_VMAX = 366;
+	public static final int ARM_INS_VMAXNM = 367;
+	public static final int ARM_INS_VMIN = 368;
+	public static final int ARM_INS_VMINNM = 369;
+	public static final int ARM_INS_VMLA = 370;
+	public static final int ARM_INS_VMLAL = 371;
+	public static final int ARM_INS_VMLS = 372;
+	public static final int ARM_INS_VMLSL = 373;
+	public static final int ARM_INS_VMOV = 374;
+	public static final int ARM_INS_VMOVL = 375;
+	public static final int ARM_INS_VMOVN = 376;
+	public static final int ARM_INS_VMOVX = 377;
+	public static final int ARM_INS_VMRS = 378;
+	public static final int ARM_INS_VMSR = 379;
+	public static final int ARM_INS_VMUL = 380;
+	public static final int ARM_INS_VMULL = 381;
+	public static final int ARM_INS_VMVN = 382;
+	public static final int ARM_INS_VNEG = 383;
+	public static final int ARM_INS_VNMLA = 384;
+	public static final int ARM_INS_VNMLS = 385;
+	public static final int ARM_INS_VNMUL = 386;
+	public static final int ARM_INS_VORN = 387;
+	public static final int ARM_INS_VORR = 388;
+	public static final int ARM_INS_VPADAL = 389;
+	public static final int ARM_INS_VPADD = 390;
+	public static final int ARM_INS_VPADDL = 391;
+	public static final int ARM_INS_VPMAX = 392;
+	public static final int ARM_INS_VPMIN = 393;
+	public static final int ARM_INS_VPOP = 394;
+	public static final int ARM_INS_VPUSH = 395;
+	public static final int ARM_INS_VQABS = 396;
+	public static final int ARM_INS_VQADD = 397;
+	public static final int ARM_INS_VQDMLAL = 398;
+	public static final int ARM_INS_VQDMLSL = 399;
+	public static final int ARM_INS_VQDMULH = 400;
+	public static final int ARM_INS_VQDMULL = 401;
+	public static final int ARM_INS_VQMOVN = 402;
+	public static final int ARM_INS_VQMOVUN = 403;
+	public static final int ARM_INS_VQNEG = 404;
+	public static final int ARM_INS_VQRDMLAH = 405;
+	public static final int ARM_INS_VQRDMLSH = 406;
+	public static final int ARM_INS_VQRDMULH = 407;
+	public static final int ARM_INS_VQRSHL = 408;
+	public static final int ARM_INS_VQRSHRN = 409;
+	public static final int ARM_INS_VQRSHRUN = 410;
+	public static final int ARM_INS_VQSHL = 411;
+	public static final int ARM_INS_VQSHLU = 412;
+	public static final int ARM_INS_VQSHRN = 413;
+	public static final int ARM_INS_VQSHRUN = 414;
+	public static final int ARM_INS_VQSUB = 415;
+	public static final int ARM_INS_VRADDHN = 416;
+	public static final int ARM_INS_VRECPE = 417;
+	public static final int ARM_INS_VRECPS = 418;
+	public static final int ARM_INS_VREV16 = 419;
+	public static final int ARM_INS_VREV32 = 420;
+	public static final int ARM_INS_VREV64 = 421;
+	public static final int ARM_INS_VRHADD = 422;
+	public static final int ARM_INS_VRINTA = 423;
+	public static final int ARM_INS_VRINTM = 424;
+	public static final int ARM_INS_VRINTN = 425;
+	public static final int ARM_INS_VRINTP = 426;
+	public static final int ARM_INS_VRINTR = 427;
+	public static final int ARM_INS_VRINTX = 428;
+	public static final int ARM_INS_VRINTZ = 429;
+	public static final int ARM_INS_VRSHL = 430;
+	public static final int ARM_INS_VRSHR = 431;
+	public static final int ARM_INS_VRSHRN = 432;
+	public static final int ARM_INS_VRSQRTE = 433;
+	public static final int ARM_INS_VRSQRTS = 434;
+	public static final int ARM_INS_VRSRA = 435;
+	public static final int ARM_INS_VRSUBHN = 436;
+	public static final int ARM_INS_VSDOT = 437;
+	public static final int ARM_INS_VSELEQ = 438;
+	public static final int ARM_INS_VSELGE = 439;
+	public static final int ARM_INS_VSELGT = 440;
+	public static final int ARM_INS_VSELVS = 441;
+	public static final int ARM_INS_VSHL = 442;
+	public static final int ARM_INS_VSHLL = 443;
+	public static final int ARM_INS_VSHR = 444;
+	public static final int ARM_INS_VSHRN = 445;
+	public static final int ARM_INS_VSLI = 446;
+	public static final int ARM_INS_VSQRT = 447;
+	public static final int ARM_INS_VSRA = 448;
+	public static final int ARM_INS_VSRI = 449;
+	public static final int ARM_INS_VST1 = 450;
+	public static final int ARM_INS_VST2 = 451;
+	public static final int ARM_INS_VST3 = 452;
+	public static final int ARM_INS_VST4 = 453;
+	public static final int ARM_INS_VSTMDB = 454;
+	public static final int ARM_INS_VSTMIA = 455;
+	public static final int ARM_INS_VSTR = 456;
+	public static final int ARM_INS_VSUB = 457;
+	public static final int ARM_INS_VSUBHN = 458;
+	public static final int ARM_INS_VSUBL = 459;
+	public static final int ARM_INS_VSUBW = 460;
+	public static final int ARM_INS_VSWP = 461;
+	public static final int ARM_INS_VTBL = 462;
+	public static final int ARM_INS_VTBX = 463;
+	public static final int ARM_INS_VTRN = 464;
+	public static final int ARM_INS_VTST = 465;
+	public static final int ARM_INS_VUDOT = 466;
+	public static final int ARM_INS_VUZP = 467;
+	public static final int ARM_INS_VZIP = 468;
+	public static final int ARM_INS_WFE = 469;
+	public static final int ARM_INS_WFI = 470;
+	public static final int ARM_INS_YIELD = 471;
+	public static final int ARM_INS_ENDING = 472;
+
+	public static final int ARM_GRP_INVALID = 0;
+	public static final int ARM_GRP_JUMP = 1;
+	public static final int ARM_GRP_CALL = 2;
+	public static final int ARM_GRP_INT = 4;
+	public static final int ARM_GRP_PRIVILEGE = 6;
+	public static final int ARM_GRP_BRANCH_RELATIVE = 7;
+	public static final int ARM_GRP_CRYPTO = 128;
+	public static final int ARM_GRP_DATABARRIER = 129;
+	public static final int ARM_GRP_DIVIDE = 130;
+	public static final int ARM_GRP_FPARMV8 = 131;
+	public static final int ARM_GRP_MULTPRO = 132;
+	public static final int ARM_GRP_NEON = 133;
+	public static final int ARM_GRP_T2EXTRACTPACK = 134;
+	public static final int ARM_GRP_THUMB2DSP = 135;
+	public static final int ARM_GRP_TRUSTZONE = 136;
+	public static final int ARM_GRP_V4T = 137;
+	public static final int ARM_GRP_V5T = 138;
+	public static final int ARM_GRP_V5TE = 139;
+	public static final int ARM_GRP_V6 = 140;
+	public static final int ARM_GRP_V6T2 = 141;
+	public static final int ARM_GRP_V7 = 142;
+	public static final int ARM_GRP_V8 = 143;
+	public static final int ARM_GRP_VFP2 = 144;
+	public static final int ARM_GRP_VFP3 = 145;
+	public static final int ARM_GRP_VFP4 = 146;
+	public static final int ARM_GRP_ARM = 147;
+	public static final int ARM_GRP_MCLASS = 148;
+	public static final int ARM_GRP_NOTMCLASS = 149;
+	public static final int ARM_GRP_THUMB = 150;
+	public static final int ARM_GRP_THUMB1ONLY = 151;
+	public static final int ARM_GRP_THUMB2 = 152;
+	public static final int ARM_GRP_PREV8 = 153;
+	public static final int ARM_GRP_FPVMLX = 154;
+	public static final int ARM_GRP_MULOPS = 155;
+	public static final int ARM_GRP_CRC = 156;
+	public static final int ARM_GRP_DPVFP = 157;
+	public static final int ARM_GRP_V6M = 158;
+	public static final int ARM_GRP_VIRTUALIZATION = 159;
+	public static final int ARM_GRP_ENDING = 160;
+}

thirdparty/capstone/bindings/java/capstone/Capstone.java

@@ -0,0 +1,549 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Library;
+import com.sun.jna.Memory;
+import com.sun.jna.Native;
+import com.sun.jna.NativeLong;
+import com.sun.jna.ptr.ByteByReference;
+import com.sun.jna.ptr.NativeLongByReference;
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+import com.sun.jna.Pointer;
+import com.sun.jna.ptr.PointerByReference;
+import com.sun.jna.ptr.IntByReference;
+
+import java.util.List;
+import java.util.Arrays;
+import java.lang.RuntimeException;
+
+public class Capstone {
+
+  protected static abstract class OpInfo {};
+  protected static abstract class UnionOpInfo extends Structure {};
+
+  public static class UnionArch extends Union {
+    public static class ByValue extends UnionArch implements Union.ByValue {};
+
+    public Arm.UnionOpInfo arm;
+    public Arm64.UnionOpInfo arm64;
+    public X86.UnionOpInfo x86;
+    public Mips.UnionOpInfo mips;
+    public Ppc.UnionOpInfo ppc;
+    public Sparc.UnionOpInfo sparc;
+    public Systemz.UnionOpInfo sysz;
+    public Xcore.UnionOpInfo xcore;
+    public M680x.UnionOpInfo m680x;
+  }
+
+  protected static class _cs_insn extends Structure {
+    // instruction ID.
+    public int id;
+    // instruction address.
+    public long address;
+    // instruction size.
+    public short size;
+    // machine bytes of instruction.
+    public byte[] bytes;
+    // instruction mnemonic. NOTE: irrelevant for diet engine.
+    public byte[] mnemonic;
+    // instruction operands. NOTE: irrelevant for diet engine.
+    public byte[] op_str;
+    // detail information of instruction.
+    public _cs_detail.ByReference cs_detail;
+
+    public _cs_insn() {
+      bytes = new byte[24];
+      mnemonic = new byte[32];
+      op_str = new byte[160];
+      java.util.Arrays.fill(mnemonic, (byte) 0);
+      java.util.Arrays.fill(op_str, (byte) 0);
+    }
+
+    public _cs_insn(Pointer p) {
+      this();
+      useMemory(p);
+      read();
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("id", "address", "size", "bytes", "mnemonic", "op_str", "cs_detail");
+    }
+  }
+
+  protected static class _cs_detail extends Structure {
+    public static class ByReference extends _cs_detail implements Structure.ByReference {};
+
+    // list of all implicit registers being read.
+    public short[] regs_read = new short[16];
+    public byte regs_read_count;
+    // list of all implicit registers being written.
+    public short[] regs_write = new short[20];
+    public byte regs_write_count;
+    // list of semantic groups this instruction belongs to.
+    public byte[] groups = new byte[8];
+    public byte groups_count;
+
+    public UnionArch arch;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("regs_read", "regs_read_count", "regs_write", "regs_write_count", "groups", "groups_count", "arch");
+    }
+  }
+
+  public static class CsInsn {
+    private Pointer csh;
+    private CS cs;
+    private _cs_insn raw;
+    private int arch;
+
+    // instruction ID.
+    public int id;
+    // instruction address.
+    public long address;
+    // instruction size.
+    public short size;
+    // Machine bytes of this instruction, with number of bytes indicated by size above
+    public byte[] bytes;
+    // instruction mnemonic. NOTE: irrelevant for diet engine.
+    public String mnemonic;
+    // instruction operands. NOTE: irrelevant for diet engine.
+    public String opStr;
+    // list of all implicit registers being read.
+    public short[] regsRead;
+    // list of all implicit registers being written.
+    public short[] regsWrite;
+    // list of semantic groups this instruction belongs to.
+    public byte[] groups;
+    public OpInfo operands;
+
+    public CsInsn (_cs_insn insn, int _arch, Pointer _csh, CS _cs, boolean diet) {
+      id = insn.id;
+      address = insn.address;
+      size = insn.size;
+
+      if (!diet) {
+        int lm = 0;
+        while (insn.mnemonic[lm++] != 0);
+        int lo = 0;
+        while (insn.op_str[lo++] != 0);
+        mnemonic = new String(insn.mnemonic, 0, lm-1);
+        opStr = new String(insn.op_str, 0, lo-1);
+        bytes = Arrays.copyOf(insn.bytes, insn.size);
+      }
+
+      cs = _cs;
+      arch = _arch;
+      raw = insn;
+      csh = _csh;
+
+      if (insn.cs_detail != null) {
+        if (!diet) {
+          regsRead = new short[insn.cs_detail.regs_read_count];
+          for (int i=0; i<regsRead.length; i++)
+            regsRead[i] = insn.cs_detail.regs_read[i];
+          regsWrite = new short[insn.cs_detail.regs_write_count];
+          for (int i=0; i<regsWrite.length; i++)
+            regsWrite[i] = insn.cs_detail.regs_write[i];
+          groups = new byte[insn.cs_detail.groups_count];
+          for (int i=0; i<groups.length; i++)
+            groups[i] = insn.cs_detail.groups[i];
+        }
+
+        operands = getOptInfo(insn.cs_detail);
+      }
+    }
+
+    private OpInfo getOptInfo(_cs_detail detail) {
+      OpInfo op_info = null;
+
+      switch (this.arch) {
+        case CS_ARCH_ARM:
+          detail.arch.setType(Arm.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Arm.OpInfo((Arm.UnionOpInfo) detail.arch.arm);
+          break;
+        case CS_ARCH_ARM64:
+          detail.arch.setType(Arm64.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Arm64.OpInfo((Arm64.UnionOpInfo) detail.arch.arm64);
+          break;
+        case CS_ARCH_MIPS:
+          detail.arch.setType(Mips.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Mips.OpInfo((Mips.UnionOpInfo) detail.arch.mips);
+          break;
+        case CS_ARCH_X86:
+          detail.arch.setType(X86.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new X86.OpInfo((X86.UnionOpInfo) detail.arch.x86);
+          break;
+        case CS_ARCH_SPARC:
+          detail.arch.setType(Sparc.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Sparc.OpInfo((Sparc.UnionOpInfo) detail.arch.sparc);
+          break;
+        case CS_ARCH_SYSZ:
+          detail.arch.setType(Systemz.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Systemz.OpInfo((Systemz.UnionOpInfo) detail.arch.sysz);
+          break;
+        case CS_ARCH_PPC:
+          detail.arch.setType(Ppc.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Ppc.OpInfo((Ppc.UnionOpInfo) detail.arch.ppc);
+          break;
+        case CS_ARCH_XCORE:
+          detail.arch.setType(Xcore.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Xcore.OpInfo((Xcore.UnionOpInfo) detail.arch.xcore);
+          break;
+        case CS_ARCH_M680X:
+          detail.arch.setType(M680x.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new M680x.OpInfo((M680x.UnionOpInfo) detail.arch.m680x);
+          break;
+        default:
+      }
+
+      return op_info;
+    }
+
+    public int opCount(int type) {
+      return cs.cs_op_count(csh, raw.getPointer(), type);
+    }
+
+    public int opIndex(int type, int index) {
+      return cs.cs_op_index(csh, raw.getPointer(), type, index);
+    }
+
+    public boolean regRead(int reg_id) {
+      return cs.cs_reg_read(csh, raw.getPointer(), reg_id) != 0;
+    }
+
+    public boolean regWrite(int reg_id) {
+      return cs.cs_reg_write(csh, raw.getPointer(), reg_id) != 0;
+    }
+
+    public int errno() {
+      return cs.cs_errno(csh);
+    }
+
+    public String regName(int reg_id) {
+      return cs.cs_reg_name(csh, reg_id);
+    }
+
+    public String insnName() {
+      return cs.cs_insn_name(csh, id);
+    }
+
+    public String groupName(int id) {
+      return cs.cs_group_name(csh, id);
+    }
+
+    public boolean group(int gid) {
+      return cs.cs_insn_group(csh, raw.getPointer(), gid) != 0;
+    }
+
+    public CsRegsAccess regsAccess() {
+      Memory regsReadMemory = new Memory(64*2);
+      ByteByReference regsReadCountRef = new ByteByReference();
+      Memory regsWriteMemory = new Memory(64*2);
+      ByteByReference regsWriteCountRef = new ByteByReference();
+
+      int c = cs.cs_regs_access(csh, raw.getPointer(), regsReadMemory, regsReadCountRef, regsWriteMemory, regsWriteCountRef);
+      if (c != CS_ERR_OK) {
+        return null;
+      }
+
+      byte regsReadCount = regsReadCountRef.getValue();
+      byte regsWriteCount = regsWriteCountRef.getValue();
+
+      short[] regsRead = new short[regsReadCount];
+      regsReadMemory.read(0, regsRead, 0, regsReadCount);
+
+      short[] regsWrite = new short[regsWriteCount];
+      regsWriteMemory.read(0, regsWrite, 0, regsWriteCount);
+
+      return new CsRegsAccess(regsRead, regsWrite);
+    }
+  }
+
+  public static class CsRegsAccess {
+    public short[] regsRead;
+    public short[] regsWrite;
+
+    public CsRegsAccess(short[] regsRead, short[] regsWrite) {
+      this.regsRead = regsRead;
+      this.regsWrite = regsWrite;
+    }
+  }
+
+  private CsInsn[] fromArrayRaw(_cs_insn[] arr_raw) {
+    CsInsn[] arr = new CsInsn[arr_raw.length];
+
+    for (int i = 0; i < arr_raw.length; i++) {
+      arr[i] = new CsInsn(arr_raw[i], this.arch, ns.csh, cs, this.diet);
+    }
+
+    return arr;
+  }
+
+  private interface CS extends Library {
+    public int cs_open(int arch, int mode, PointerByReference handle);
+    public NativeLong cs_disasm(Pointer handle, byte[] code, NativeLong code_len,
+        long addr, NativeLong count, PointerByReference insn);
+    public void cs_free(Pointer p, NativeLong count);
+    public int cs_close(PointerByReference handle);
+    public int cs_option(Pointer handle, int option, NativeLong optionValue);
+
+    public String cs_reg_name(Pointer csh, int id);
+    public int cs_op_count(Pointer csh, Pointer insn, int type);
+    public int cs_op_index(Pointer csh, Pointer insn, int type, int index);
+
+    public String cs_insn_name(Pointer csh, int id);
+    public String cs_group_name(Pointer csh, int id);
+    public byte cs_insn_group(Pointer csh, Pointer insn, int id);
+    public byte cs_reg_read(Pointer csh, Pointer insn, int id);
+    public byte cs_reg_write(Pointer csh, Pointer insn, int id);
+    public int cs_errno(Pointer csh);
+    public int cs_version(IntByReference major, IntByReference minor);
+    public boolean cs_support(int query);
+    public String cs_strerror(int code);
+    public int cs_regs_access(Pointer handle, Pointer insn, Pointer regs_read, ByteByReference regs_read_count, Pointer regs_write, ByteByReference regs_write_count);
+  }
+
+  // Capstone API version
+  public static final int CS_API_MAJOR = 5;
+  public static final int CS_API_MINOR = 0;
+
+  // architectures
+  public static final int CS_ARCH_ARM = 0;
+  public static final int CS_ARCH_ARM64 = 1;
+  public static final int CS_ARCH_MIPS = 2;
+  public static final int CS_ARCH_X86 = 3;
+  public static final int CS_ARCH_PPC = 4;
+  public static final int CS_ARCH_SPARC = 5;
+  public static final int CS_ARCH_SYSZ = 6;
+  public static final int CS_ARCH_XCORE = 7;
+  public static final int CS_ARCH_M68K = 8;
+  public static final int CS_ARCH_TMS320C64X = 9;
+  public static final int CS_ARCH_M680X = 10;
+  public static final int CS_ARCH_MAX = 11;
+  public static final int CS_ARCH_ALL = 0xFFFF; // query id for cs_support()
+
+  // disasm mode
+  public static final int CS_MODE_LITTLE_ENDIAN = 0;  // little-endian mode (default mode)
+  public static final int CS_MODE_ARM = 0;	          // 32-bit ARM
+  public static final int CS_MODE_16 = 1 << 1;		// 16-bit mode for X86
+  public static final int CS_MODE_32 = 1 << 2;		// 32-bit mode for X86
+  public static final int CS_MODE_64 = 1 << 3;		// 64-bit mode for X86, PPC
+  public static final int CS_MODE_THUMB = 1 << 4;	  // ARM's Thumb mode, including Thumb-2
+  public static final int CS_MODE_MCLASS = 1 << 5;	  // ARM's Cortex-M series
+  public static final int CS_MODE_V8 = 1 << 6;	      // ARMv8 A32 encodings for ARM
+  public static final int CS_MODE_MICRO = 1 << 4;	  // MicroMips mode (Mips arch)
+  public static final int CS_MODE_MIPS3 = 1 << 5;     // Mips III ISA
+  public static final int CS_MODE_MIPS32R6 = 1 << 6;  // Mips32r6 ISA
+  public static final int CS_MODE_MIPS2 = 1 << 7;  // Mips II ISA
+  public static final int CS_MODE_BIG_ENDIAN = 1 << 31; // big-endian mode
+  public static final int CS_MODE_V9 = 1 << 4;	      // SparcV9 mode (Sparc arch)
+  public static final int CS_MODE_MIPS32 = CS_MODE_32; // Mips32 ISA
+  public static final int CS_MODE_MIPS64 = CS_MODE_64; // Mips64 ISA
+  public static final int CS_MODE_QPX = 1 << 4; // Quad Processing eXtensions mode (PPC)
+  public static final int CS_MODE_SPE = 1 << 5; // Signal Processing Engine mode (PPC)
+  public static final int CS_MODE_BOOKE = 1 << 6; // Book-E mode (PPC)
+  public static final int CS_MODE_PS = 1 << 7; // Paired-singles mode (PPC)
+  public static final int CS_MODE_M680X_6301 = 1 << 1; // M680X Hitachi 6301,6303 mode
+  public static final int CS_MODE_M680X_6309 = 1 << 2; // M680X Hitachi 6309 mode
+  public static final int CS_MODE_M680X_6800 = 1 << 3; // M680X Motorola 6800,6802 mode
+  public static final int CS_MODE_M680X_6801 = 1 << 4; // M680X Motorola 6801,6803 mode
+  public static final int CS_MODE_M680X_6805 = 1 << 5; // M680X Motorola 6805 mode
+  public static final int CS_MODE_M680X_6808 = 1 << 6; // M680X Motorola 6808 mode
+  public static final int CS_MODE_M680X_6809 = 1 << 7; // M680X Motorola 6809 mode
+  public static final int CS_MODE_M680X_6811 = 1 << 8; // M680X Motorola/Freescale 68HC11 mode
+  public static final int CS_MODE_M680X_CPU12 = 1 << 9; // M680X Motorola/Freescale/NXP CPU12 mode
+  public static final int CS_MODE_M680X_HCS08 = 1 << 10; // M680X Freescale HCS08 mode
+
+  // Capstone error
+  public static final int CS_ERR_OK = 0;
+  public static final int CS_ERR_MEM = 1;	    // Out-Of-Memory error
+  public static final int CS_ERR_ARCH = 2;	  // Unsupported architecture
+  public static final int CS_ERR_HANDLE = 3;	// Invalid handle
+  public static final int CS_ERR_CSH = 4;	    // Invalid csh argument
+  public static final int CS_ERR_MODE = 5;	  // Invalid/unsupported mode
+  public static final int CS_ERR_OPTION = 6;  // Invalid/unsupported option: cs_option()
+  public static final int CS_ERR_DETAIL = 7;  // Invalid/unsupported option: cs_option()
+  public static final int CS_ERR_MEMSETUP = 8;
+  public static final int CS_ERR_VERSION = 9;  //Unsupported version (bindings)
+  public static final int CS_ERR_DIET = 10;  //Information irrelevant in diet engine
+  public static final int CS_ERR_SKIPDATA = 11;  //Access irrelevant data for "data" instruction in SKIPDATA mode
+  public static final int CS_ERR_X86_ATT = 12;  //X86 AT&T syntax is unsupported (opt-out at compile time)
+  public static final int CS_ERR_X86_INTEL = 13;  //X86 Intel syntax is unsupported (opt-out at compile time)
+
+  // Capstone option type
+  public static final int CS_OPT_SYNTAX = 1;  // Intel X86 asm syntax (CS_ARCH_X86 arch)
+  public static final int CS_OPT_DETAIL = 2;  // Break down instruction structure into details
+  public static final int CS_OPT_MODE = 3;  // Change engine's mode at run-time
+
+  // Capstone option value
+  public static final int CS_OPT_OFF = 0;  // Turn OFF an option - default option of CS_OPT_DETAIL
+  public static final int CS_OPT_SYNTAX_INTEL = 1;  // Intel X86 asm syntax - default syntax on X86 (CS_OPT_SYNTAX,  CS_ARCH_X86)
+  public static final int CS_OPT_SYNTAX_ATT = 2;    // ATT asm syntax (CS_OPT_SYNTAX, CS_ARCH_X86)
+  public static final int CS_OPT_ON = 3;  // Turn ON an option (CS_OPT_DETAIL)
+  public static final int CS_OPT_SYNTAX_NOREGNAME = 3; // PPC asm syntax: Prints register name with only number (CS_OPT_SYNTAX)
+
+  // Common instruction operand types - to be consistent across all architectures.
+  public static final int CS_OP_INVALID = 0;
+  public static final int CS_OP_REG = 1;
+  public static final int CS_OP_IMM = 2;
+  public static final int CS_OP_MEM = 3;
+  public static final int CS_OP_FP  = 4;
+
+  // Common instruction operand access types - to be consistent across all architectures.
+  // It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE
+  public static final int CS_AC_INVALID = 0;
+  public static final int CS_AC_READ = 1 << 0;
+  public static final int CS_AC_WRITE = 1 << 1;
+
+  // Common instruction groups - to be consistent across all architectures.
+  public static final int CS_GRP_INVALID = 0;  // uninitialized/invalid group.
+  public static final int CS_GRP_JUMP    = 1;  // all jump instructions (conditional+direct+indirect jumps)
+  public static final int CS_GRP_CALL    = 2;  // all call instructions
+  public static final int CS_GRP_RET     = 3;  // all return instructions
+  public static final int CS_GRP_INT     = 4;  // all interrupt instructions (int+syscall)
+  public static final int CS_GRP_IRET    = 5;  // all interrupt return instructions
+  public static final int CS_GRP_PRIVILEGE = 6;  // all privileged instructions
+
+  // Query id for cs_support()
+  public static final int CS_SUPPORT_DIET = CS_ARCH_ALL+1;	  // diet mode
+  public static final int CS_SUPPORT_X86_REDUCE = CS_ARCH_ALL+2;  // X86 reduce mode
+
+  protected class NativeStruct {
+      private Pointer csh;
+      private PointerByReference handleRef;
+  }
+
+  private static final CsInsn[] EMPTY_INSN = new CsInsn[0];
+
+  protected NativeStruct ns; // for memory retention
+  private CS cs;
+  public int arch;
+  public int mode;
+  private int syntax;
+  private int detail;
+  private boolean diet;
+
+  public Capstone(int arch, int mode) {
+    cs = (CS)Native.loadLibrary("capstone", CS.class);
+    int coreVersion = cs.cs_version(null, null);
+    int bindingVersion = (CS_API_MAJOR << 8) + CS_API_MINOR;
+    if (coreVersion != bindingVersion) {
+      throw  new RuntimeException("Different API version between core " + coreVersion +
+              " & binding " + bindingVersion + " (CS_ERR_VERSION)");
+    }
+
+    this.arch = arch;
+    this.mode = mode;
+    ns = new NativeStruct();
+    ns.handleRef = new PointerByReference();
+    if (cs.cs_open(arch, mode, ns.handleRef) != CS_ERR_OK) {
+      throw new RuntimeException("ERROR: Wrong arch or mode");
+    }
+    ns.csh = ns.handleRef.getValue();
+    this.detail = CS_OPT_OFF;
+	this.diet = cs.cs_support(CS_SUPPORT_DIET);
+  }
+
+  // return combined API version
+  public int version() {
+    return cs.cs_version(null, null);
+  }
+
+  // set Assembly syntax
+  public void setSyntax(int syntax) {
+    if (cs.cs_option(ns.csh, CS_OPT_SYNTAX, new NativeLong(syntax)) == CS_ERR_OK) {
+      this.syntax = syntax;
+    } else {
+      throw new RuntimeException("ERROR: Failed to set assembly syntax");
+    }
+  }
+
+  // set detail option at run-time
+  public void setDetail(int opt) {
+    if (cs.cs_option(ns.csh, CS_OPT_DETAIL, new NativeLong(opt)) == CS_ERR_OK) {
+      this.detail = opt;
+    } else {
+      throw new RuntimeException("ERROR: Failed to set detail option");
+    }
+  }
+
+  // set mode option at run-time
+  public void setMode(int opt) {
+    if (cs.cs_option(ns.csh, CS_OPT_MODE, new NativeLong(opt)) == CS_ERR_OK) {
+      this.mode = opt;
+    } else {
+      throw new RuntimeException("ERROR: Failed to set mode option");
+    }
+  }
+
+  // destructor automatically called at destroyed time.
+  protected void finalize() {
+    // FIXME: crashed on Ubuntu 14.04 64bit, OpenJDK java 1.6.0_33
+    // cs.cs_close(ns.handleRef);
+  }
+
+  // destructor automatically called at destroyed time.
+  public int close() {
+    return cs.cs_close(ns.handleRef);
+  }
+
+  /**
+   * Disassemble instructions from @code assumed to be located at @address,
+   * stop when encountering first broken instruction.
+   * 
+   * @param code The source machine code bytes.
+   * @param address The address of the first machine code byte.
+   * @return the array of successfully disassembled instructions, empty if no instruction could be disassembled.
+   */
+  public CsInsn[] disasm(byte[] code, long address) {
+    return disasm(code, address, 0);
+  }
+
+  /**
+   * Disassemble up to @count instructions from @code assumed to be located at @address,
+   * stop when encountering first broken instruction.
+   * 
+   * @param code The source machine code bytes.
+   * @param address The address of the first machine code byte.
+   * @param count The maximum number of instructions to disassemble, 0 for no maximum.
+   * @return the array of successfully disassembled instructions, empty if no instruction could be disassembled.
+   */
+  public CsInsn[] disasm(byte[] code, long address, long count) {
+    PointerByReference insnRef = new PointerByReference();
+
+    NativeLong c = cs.cs_disasm(ns.csh, code, new NativeLong(code.length), address, new NativeLong(count), insnRef);
+    
+    if (0 == c.intValue()) {
+    	return EMPTY_INSN;
+    }
+    
+    Pointer p = insnRef.getValue();
+    _cs_insn byref = new _cs_insn(p);
+
+    CsInsn[] allInsn = fromArrayRaw((_cs_insn[]) byref.toArray(c.intValue()));
+
+    // free allocated memory
+    // cs.cs_free(p, c);
+    // FIXME(danghvu): Can't free because memory is still inside CsInsn
+
+    return allInsn;
+  }
+
+  public String strerror(int code) {
+    return cs.cs_strerror(code);
+  }
+}

thirdparty/capstone/bindings/java/capstone/Evm_const.java

@@ -0,0 +1,155 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Evm_const {
+
+	public static final int EVM_INS_STOP = 0;
+	public static final int EVM_INS_ADD = 1;
+	public static final int EVM_INS_MUL = 2;
+	public static final int EVM_INS_SUB = 3;
+	public static final int EVM_INS_DIV = 4;
+	public static final int EVM_INS_SDIV = 5;
+	public static final int EVM_INS_MOD = 6;
+	public static final int EVM_INS_SMOD = 7;
+	public static final int EVM_INS_ADDMOD = 8;
+	public static final int EVM_INS_MULMOD = 9;
+	public static final int EVM_INS_EXP = 10;
+	public static final int EVM_INS_SIGNEXTEND = 11;
+	public static final int EVM_INS_LT = 16;
+	public static final int EVM_INS_GT = 17;
+	public static final int EVM_INS_SLT = 18;
+	public static final int EVM_INS_SGT = 19;
+	public static final int EVM_INS_EQ = 20;
+	public static final int EVM_INS_ISZERO = 21;
+	public static final int EVM_INS_AND = 22;
+	public static final int EVM_INS_OR = 23;
+	public static final int EVM_INS_XOR = 24;
+	public static final int EVM_INS_NOT = 25;
+	public static final int EVM_INS_BYTE = 26;
+	public static final int EVM_INS_SHA3 = 32;
+	public static final int EVM_INS_ADDRESS = 48;
+	public static final int EVM_INS_BALANCE = 49;
+	public static final int EVM_INS_ORIGIN = 50;
+	public static final int EVM_INS_CALLER = 51;
+	public static final int EVM_INS_CALLVALUE = 52;
+	public static final int EVM_INS_CALLDATALOAD = 53;
+	public static final int EVM_INS_CALLDATASIZE = 54;
+	public static final int EVM_INS_CALLDATACOPY = 55;
+	public static final int EVM_INS_CODESIZE = 56;
+	public static final int EVM_INS_CODECOPY = 57;
+	public static final int EVM_INS_GASPRICE = 58;
+	public static final int EVM_INS_EXTCODESIZE = 59;
+	public static final int EVM_INS_EXTCODECOPY = 60;
+	public static final int EVM_INS_RETURNDATASIZE = 61;
+	public static final int EVM_INS_RETURNDATACOPY = 62;
+	public static final int EVM_INS_BLOCKHASH = 64;
+	public static final int EVM_INS_COINBASE = 65;
+	public static final int EVM_INS_TIMESTAMP = 66;
+	public static final int EVM_INS_NUMBER = 67;
+	public static final int EVM_INS_DIFFICULTY = 68;
+	public static final int EVM_INS_GASLIMIT = 69;
+	public static final int EVM_INS_POP = 80;
+	public static final int EVM_INS_MLOAD = 81;
+	public static final int EVM_INS_MSTORE = 82;
+	public static final int EVM_INS_MSTORE8 = 83;
+	public static final int EVM_INS_SLOAD = 84;
+	public static final int EVM_INS_SSTORE = 85;
+	public static final int EVM_INS_JUMP = 86;
+	public static final int EVM_INS_JUMPI = 87;
+	public static final int EVM_INS_PC = 88;
+	public static final int EVM_INS_MSIZE = 89;
+	public static final int EVM_INS_GAS = 90;
+	public static final int EVM_INS_JUMPDEST = 91;
+	public static final int EVM_INS_PUSH1 = 96;
+	public static final int EVM_INS_PUSH2 = 97;
+	public static final int EVM_INS_PUSH3 = 98;
+	public static final int EVM_INS_PUSH4 = 99;
+	public static final int EVM_INS_PUSH5 = 100;
+	public static final int EVM_INS_PUSH6 = 101;
+	public static final int EVM_INS_PUSH7 = 102;
+	public static final int EVM_INS_PUSH8 = 103;
+	public static final int EVM_INS_PUSH9 = 104;
+	public static final int EVM_INS_PUSH10 = 105;
+	public static final int EVM_INS_PUSH11 = 106;
+	public static final int EVM_INS_PUSH12 = 107;
+	public static final int EVM_INS_PUSH13 = 108;
+	public static final int EVM_INS_PUSH14 = 109;
+	public static final int EVM_INS_PUSH15 = 110;
+	public static final int EVM_INS_PUSH16 = 111;
+	public static final int EVM_INS_PUSH17 = 112;
+	public static final int EVM_INS_PUSH18 = 113;
+	public static final int EVM_INS_PUSH19 = 114;
+	public static final int EVM_INS_PUSH20 = 115;
+	public static final int EVM_INS_PUSH21 = 116;
+	public static final int EVM_INS_PUSH22 = 117;
+	public static final int EVM_INS_PUSH23 = 118;
+	public static final int EVM_INS_PUSH24 = 119;
+	public static final int EVM_INS_PUSH25 = 120;
+	public static final int EVM_INS_PUSH26 = 121;
+	public static final int EVM_INS_PUSH27 = 122;
+	public static final int EVM_INS_PUSH28 = 123;
+	public static final int EVM_INS_PUSH29 = 124;
+	public static final int EVM_INS_PUSH30 = 125;
+	public static final int EVM_INS_PUSH31 = 126;
+	public static final int EVM_INS_PUSH32 = 127;
+	public static final int EVM_INS_DUP1 = 128;
+	public static final int EVM_INS_DUP2 = 129;
+	public static final int EVM_INS_DUP3 = 130;
+	public static final int EVM_INS_DUP4 = 131;
+	public static final int EVM_INS_DUP5 = 132;
+	public static final int EVM_INS_DUP6 = 133;
+	public static final int EVM_INS_DUP7 = 134;
+	public static final int EVM_INS_DUP8 = 135;
+	public static final int EVM_INS_DUP9 = 136;
+	public static final int EVM_INS_DUP10 = 137;
+	public static final int EVM_INS_DUP11 = 138;
+	public static final int EVM_INS_DUP12 = 139;
+	public static final int EVM_INS_DUP13 = 140;
+	public static final int EVM_INS_DUP14 = 141;
+	public static final int EVM_INS_DUP15 = 142;
+	public static final int EVM_INS_DUP16 = 143;
+	public static final int EVM_INS_SWAP1 = 144;
+	public static final int EVM_INS_SWAP2 = 145;
+	public static final int EVM_INS_SWAP3 = 146;
+	public static final int EVM_INS_SWAP4 = 147;
+	public static final int EVM_INS_SWAP5 = 148;
+	public static final int EVM_INS_SWAP6 = 149;
+	public static final int EVM_INS_SWAP7 = 150;
+	public static final int EVM_INS_SWAP8 = 151;
+	public static final int EVM_INS_SWAP9 = 152;
+	public static final int EVM_INS_SWAP10 = 153;
+	public static final int EVM_INS_SWAP11 = 154;
+	public static final int EVM_INS_SWAP12 = 155;
+	public static final int EVM_INS_SWAP13 = 156;
+	public static final int EVM_INS_SWAP14 = 157;
+	public static final int EVM_INS_SWAP15 = 158;
+	public static final int EVM_INS_SWAP16 = 159;
+	public static final int EVM_INS_LOG0 = 160;
+	public static final int EVM_INS_LOG1 = 161;
+	public static final int EVM_INS_LOG2 = 162;
+	public static final int EVM_INS_LOG3 = 163;
+	public static final int EVM_INS_LOG4 = 164;
+	public static final int EVM_INS_CREATE = 240;
+	public static final int EVM_INS_CALL = 241;
+	public static final int EVM_INS_CALLCODE = 242;
+	public static final int EVM_INS_RETURN = 243;
+	public static final int EVM_INS_DELEGATECALL = 244;
+	public static final int EVM_INS_CALLBLACKBOX = 245;
+	public static final int EVM_INS_STATICCALL = 250;
+	public static final int EVM_INS_REVERT = 253;
+	public static final int EVM_INS_SUICIDE = 255;
+	public static final int EVM_INS_INVALID = 512;
+	public static final int EVM_INS_ENDING = 513;
+
+	public static final int EVM_GRP_INVALID = 0;
+	public static final int EVM_GRP_JUMP = 1;
+	public static final int EVM_GRP_MATH = 8;
+	public static final int EVM_GRP_STACK_WRITE = 9;
+	public static final int EVM_GRP_STACK_READ = 10;
+	public static final int EVM_GRP_MEM_WRITE = 11;
+	public static final int EVM_GRP_MEM_READ = 12;
+	public static final int EVM_GRP_STORE_WRITE = 13;
+	public static final int EVM_GRP_STORE_READ = 14;
+	public static final int EVM_GRP_HALT = 15;
+	public static final int EVM_GRP_ENDING = 16;
+}

thirdparty/capstone/bindings/java/capstone/M680x.java

@@ -0,0 +1,132 @@
+// Capstone Java binding
+/* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 */
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.M680x_const.*;
+
+public class M680x {
+
+  public static class OpIndexed extends Structure {
+    public int base_reg;
+    public int offset_reg;
+    public short offset;
+    public short offset_addr;
+    public byte offset_bits;
+    public byte inc_dec;
+    public byte flags;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base_reg", "offset_reg", "offset", "offset_addr", "offset_bits", "inc_dec", "flags");
+    }
+  }
+
+  public static class OpRelative extends Structure {
+    public short address;
+    public short offset;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("address", "offset");
+    }
+  }
+
+  public static class OpExtended extends Structure {
+    public short address;
+    public byte indirect;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("address", "indirect");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int imm;
+    public int reg;
+    public OpIndexed idx;
+    public OpRelative rel;
+    public OpExtended ext;
+    public byte direct_addr;
+    public byte const_val;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("imm", "reg", "idx", "rel", "ext", "direct_addr", "const_val");
+    }
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+    public byte size;
+    public byte access;
+
+    public void read() {
+      readField("type");
+      if (type == M680X_OP_IMMEDIATE)
+        value.setType(Integer.TYPE);
+      if (type == M680X_OP_REGISTER)
+        value.setType(Integer.TYPE);
+      if (type == M680X_OP_INDEXED)
+        value.setType(OpIndexed.class);
+      if (type == M680X_OP_RELATIVE)
+        value.setType(OpRelative.class);
+      if (type == M680X_OP_EXTENDED)
+        value.setType(OpExtended.class);
+      if (type == M680X_OP_DIRECT)
+        value.setType(Integer.TYPE);
+      if (type == M680X_OP_INVALID)
+        return;
+      readField("value");
+      readField("size");
+      readField("access");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value", "size", "access");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public byte flags;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[9];
+    }
+
+    public void read() {
+      readField("flags");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("flags", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public byte flags;
+    public Operand [] op = null;
+
+    public OpInfo(UnionOpInfo op_info) {
+      flags = op_info.flags;
+      op = op_info.op;
+    }
+  }
+}

thirdparty/capstone/bindings/java/capstone/M680x_const.java

@@ -0,0 +1,419 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class M680x_const {
+	public static final int M680X_OPERAND_COUNT = 9;
+
+	public static final int M680X_REG_INVALID = 0;
+	public static final int M680X_REG_A = 1;
+	public static final int M680X_REG_B = 2;
+	public static final int M680X_REG_E = 3;
+	public static final int M680X_REG_F = 4;
+	public static final int M680X_REG_0 = 5;
+	public static final int M680X_REG_D = 6;
+	public static final int M680X_REG_W = 7;
+	public static final int M680X_REG_CC = 8;
+	public static final int M680X_REG_DP = 9;
+	public static final int M680X_REG_MD = 10;
+	public static final int M680X_REG_HX = 11;
+	public static final int M680X_REG_H = 12;
+	public static final int M680X_REG_X = 13;
+	public static final int M680X_REG_Y = 14;
+	public static final int M680X_REG_S = 15;
+	public static final int M680X_REG_U = 16;
+	public static final int M680X_REG_V = 17;
+	public static final int M680X_REG_Q = 18;
+	public static final int M680X_REG_PC = 19;
+	public static final int M680X_REG_TMP2 = 20;
+	public static final int M680X_REG_TMP3 = 21;
+	public static final int M680X_REG_ENDING = 22;
+
+	public static final int M680X_OP_INVALID = 0;
+	public static final int M680X_OP_REGISTER = 1;
+	public static final int M680X_OP_IMMEDIATE = 2;
+	public static final int M680X_OP_INDEXED = 3;
+	public static final int M680X_OP_EXTENDED = 4;
+	public static final int M680X_OP_DIRECT = 5;
+	public static final int M680X_OP_RELATIVE = 6;
+	public static final int M680X_OP_CONSTANT = 7;
+
+	public static final int M680X_OFFSET_NONE = 0;
+	public static final int M680X_OFFSET_BITS_5 = 5;
+	public static final int M680X_OFFSET_BITS_8 = 8;
+	public static final int M680X_OFFSET_BITS_9 = 9;
+	public static final int M680X_OFFSET_BITS_16 = 16;
+	public static final int M680X_IDX_INDIRECT = 1;
+	public static final int M680X_IDX_NO_COMMA = 2;
+	public static final int M680X_IDX_POST_INC_DEC = 4;
+
+	public static final int M680X_GRP_INVALID = 0;
+	public static final int M680X_GRP_JUMP = 1;
+	public static final int M680X_GRP_CALL = 2;
+	public static final int M680X_GRP_RET = 3;
+	public static final int M680X_GRP_INT = 4;
+	public static final int M680X_GRP_IRET = 5;
+	public static final int M680X_GRP_PRIV = 6;
+	public static final int M680X_GRP_BRAREL = 7;
+	public static final int M680X_GRP_ENDING = 8;
+	public static final int M680X_FIRST_OP_IN_MNEM = 1;
+	public static final int M680X_SECOND_OP_IN_MNEM = 2;
+
+	public static final int M680X_INS_INVLD = 0;
+	public static final int M680X_INS_ABA = 1;
+	public static final int M680X_INS_ABX = 2;
+	public static final int M680X_INS_ABY = 3;
+	public static final int M680X_INS_ADC = 4;
+	public static final int M680X_INS_ADCA = 5;
+	public static final int M680X_INS_ADCB = 6;
+	public static final int M680X_INS_ADCD = 7;
+	public static final int M680X_INS_ADCR = 8;
+	public static final int M680X_INS_ADD = 9;
+	public static final int M680X_INS_ADDA = 10;
+	public static final int M680X_INS_ADDB = 11;
+	public static final int M680X_INS_ADDD = 12;
+	public static final int M680X_INS_ADDE = 13;
+	public static final int M680X_INS_ADDF = 14;
+	public static final int M680X_INS_ADDR = 15;
+	public static final int M680X_INS_ADDW = 16;
+	public static final int M680X_INS_AIM = 17;
+	public static final int M680X_INS_AIS = 18;
+	public static final int M680X_INS_AIX = 19;
+	public static final int M680X_INS_AND = 20;
+	public static final int M680X_INS_ANDA = 21;
+	public static final int M680X_INS_ANDB = 22;
+	public static final int M680X_INS_ANDCC = 23;
+	public static final int M680X_INS_ANDD = 24;
+	public static final int M680X_INS_ANDR = 25;
+	public static final int M680X_INS_ASL = 26;
+	public static final int M680X_INS_ASLA = 27;
+	public static final int M680X_INS_ASLB = 28;
+	public static final int M680X_INS_ASLD = 29;
+	public static final int M680X_INS_ASR = 30;
+	public static final int M680X_INS_ASRA = 31;
+	public static final int M680X_INS_ASRB = 32;
+	public static final int M680X_INS_ASRD = 33;
+	public static final int M680X_INS_ASRX = 34;
+	public static final int M680X_INS_BAND = 35;
+	public static final int M680X_INS_BCC = 36;
+	public static final int M680X_INS_BCLR = 37;
+	public static final int M680X_INS_BCS = 38;
+	public static final int M680X_INS_BEOR = 39;
+	public static final int M680X_INS_BEQ = 40;
+	public static final int M680X_INS_BGE = 41;
+	public static final int M680X_INS_BGND = 42;
+	public static final int M680X_INS_BGT = 43;
+	public static final int M680X_INS_BHCC = 44;
+	public static final int M680X_INS_BHCS = 45;
+	public static final int M680X_INS_BHI = 46;
+	public static final int M680X_INS_BIAND = 47;
+	public static final int M680X_INS_BIEOR = 48;
+	public static final int M680X_INS_BIH = 49;
+	public static final int M680X_INS_BIL = 50;
+	public static final int M680X_INS_BIOR = 51;
+	public static final int M680X_INS_BIT = 52;
+	public static final int M680X_INS_BITA = 53;
+	public static final int M680X_INS_BITB = 54;
+	public static final int M680X_INS_BITD = 55;
+	public static final int M680X_INS_BITMD = 56;
+	public static final int M680X_INS_BLE = 57;
+	public static final int M680X_INS_BLS = 58;
+	public static final int M680X_INS_BLT = 59;
+	public static final int M680X_INS_BMC = 60;
+	public static final int M680X_INS_BMI = 61;
+	public static final int M680X_INS_BMS = 62;
+	public static final int M680X_INS_BNE = 63;
+	public static final int M680X_INS_BOR = 64;
+	public static final int M680X_INS_BPL = 65;
+	public static final int M680X_INS_BRCLR = 66;
+	public static final int M680X_INS_BRSET = 67;
+	public static final int M680X_INS_BRA = 68;
+	public static final int M680X_INS_BRN = 69;
+	public static final int M680X_INS_BSET = 70;
+	public static final int M680X_INS_BSR = 71;
+	public static final int M680X_INS_BVC = 72;
+	public static final int M680X_INS_BVS = 73;
+	public static final int M680X_INS_CALL = 74;
+	public static final int M680X_INS_CBA = 75;
+	public static final int M680X_INS_CBEQ = 76;
+	public static final int M680X_INS_CBEQA = 77;
+	public static final int M680X_INS_CBEQX = 78;
+	public static final int M680X_INS_CLC = 79;
+	public static final int M680X_INS_CLI = 80;
+	public static final int M680X_INS_CLR = 81;
+	public static final int M680X_INS_CLRA = 82;
+	public static final int M680X_INS_CLRB = 83;
+	public static final int M680X_INS_CLRD = 84;
+	public static final int M680X_INS_CLRE = 85;
+	public static final int M680X_INS_CLRF = 86;
+	public static final int M680X_INS_CLRH = 87;
+	public static final int M680X_INS_CLRW = 88;
+	public static final int M680X_INS_CLRX = 89;
+	public static final int M680X_INS_CLV = 90;
+	public static final int M680X_INS_CMP = 91;
+	public static final int M680X_INS_CMPA = 92;
+	public static final int M680X_INS_CMPB = 93;
+	public static final int M680X_INS_CMPD = 94;
+	public static final int M680X_INS_CMPE = 95;
+	public static final int M680X_INS_CMPF = 96;
+	public static final int M680X_INS_CMPR = 97;
+	public static final int M680X_INS_CMPS = 98;
+	public static final int M680X_INS_CMPU = 99;
+	public static final int M680X_INS_CMPW = 100;
+	public static final int M680X_INS_CMPX = 101;
+	public static final int M680X_INS_CMPY = 102;
+	public static final int M680X_INS_COM = 103;
+	public static final int M680X_INS_COMA = 104;
+	public static final int M680X_INS_COMB = 105;
+	public static final int M680X_INS_COMD = 106;
+	public static final int M680X_INS_COME = 107;
+	public static final int M680X_INS_COMF = 108;
+	public static final int M680X_INS_COMW = 109;
+	public static final int M680X_INS_COMX = 110;
+	public static final int M680X_INS_CPD = 111;
+	public static final int M680X_INS_CPHX = 112;
+	public static final int M680X_INS_CPS = 113;
+	public static final int M680X_INS_CPX = 114;
+	public static final int M680X_INS_CPY = 115;
+	public static final int M680X_INS_CWAI = 116;
+	public static final int M680X_INS_DAA = 117;
+	public static final int M680X_INS_DBEQ = 118;
+	public static final int M680X_INS_DBNE = 119;
+	public static final int M680X_INS_DBNZ = 120;
+	public static final int M680X_INS_DBNZA = 121;
+	public static final int M680X_INS_DBNZX = 122;
+	public static final int M680X_INS_DEC = 123;
+	public static final int M680X_INS_DECA = 124;
+	public static final int M680X_INS_DECB = 125;
+	public static final int M680X_INS_DECD = 126;
+	public static final int M680X_INS_DECE = 127;
+	public static final int M680X_INS_DECF = 128;
+	public static final int M680X_INS_DECW = 129;
+	public static final int M680X_INS_DECX = 130;
+	public static final int M680X_INS_DES = 131;
+	public static final int M680X_INS_DEX = 132;
+	public static final int M680X_INS_DEY = 133;
+	public static final int M680X_INS_DIV = 134;
+	public static final int M680X_INS_DIVD = 135;
+	public static final int M680X_INS_DIVQ = 136;
+	public static final int M680X_INS_EDIV = 137;
+	public static final int M680X_INS_EDIVS = 138;
+	public static final int M680X_INS_EIM = 139;
+	public static final int M680X_INS_EMACS = 140;
+	public static final int M680X_INS_EMAXD = 141;
+	public static final int M680X_INS_EMAXM = 142;
+	public static final int M680X_INS_EMIND = 143;
+	public static final int M680X_INS_EMINM = 144;
+	public static final int M680X_INS_EMUL = 145;
+	public static final int M680X_INS_EMULS = 146;
+	public static final int M680X_INS_EOR = 147;
+	public static final int M680X_INS_EORA = 148;
+	public static final int M680X_INS_EORB = 149;
+	public static final int M680X_INS_EORD = 150;
+	public static final int M680X_INS_EORR = 151;
+	public static final int M680X_INS_ETBL = 152;
+	public static final int M680X_INS_EXG = 153;
+	public static final int M680X_INS_FDIV = 154;
+	public static final int M680X_INS_IBEQ = 155;
+	public static final int M680X_INS_IBNE = 156;
+	public static final int M680X_INS_IDIV = 157;
+	public static final int M680X_INS_IDIVS = 158;
+	public static final int M680X_INS_ILLGL = 159;
+	public static final int M680X_INS_INC = 160;
+	public static final int M680X_INS_INCA = 161;
+	public static final int M680X_INS_INCB = 162;
+	public static final int M680X_INS_INCD = 163;
+	public static final int M680X_INS_INCE = 164;
+	public static final int M680X_INS_INCF = 165;
+	public static final int M680X_INS_INCW = 166;
+	public static final int M680X_INS_INCX = 167;
+	public static final int M680X_INS_INS = 168;
+	public static final int M680X_INS_INX = 169;
+	public static final int M680X_INS_INY = 170;
+	public static final int M680X_INS_JMP = 171;
+	public static final int M680X_INS_JSR = 172;
+	public static final int M680X_INS_LBCC = 173;
+	public static final int M680X_INS_LBCS = 174;
+	public static final int M680X_INS_LBEQ = 175;
+	public static final int M680X_INS_LBGE = 176;
+	public static final int M680X_INS_LBGT = 177;
+	public static final int M680X_INS_LBHI = 178;
+	public static final int M680X_INS_LBLE = 179;
+	public static final int M680X_INS_LBLS = 180;
+	public static final int M680X_INS_LBLT = 181;
+	public static final int M680X_INS_LBMI = 182;
+	public static final int M680X_INS_LBNE = 183;
+	public static final int M680X_INS_LBPL = 184;
+	public static final int M680X_INS_LBRA = 185;
+	public static final int M680X_INS_LBRN = 186;
+	public static final int M680X_INS_LBSR = 187;
+	public static final int M680X_INS_LBVC = 188;
+	public static final int M680X_INS_LBVS = 189;
+	public static final int M680X_INS_LDA = 190;
+	public static final int M680X_INS_LDAA = 191;
+	public static final int M680X_INS_LDAB = 192;
+	public static final int M680X_INS_LDB = 193;
+	public static final int M680X_INS_LDBT = 194;
+	public static final int M680X_INS_LDD = 195;
+	public static final int M680X_INS_LDE = 196;
+	public static final int M680X_INS_LDF = 197;
+	public static final int M680X_INS_LDHX = 198;
+	public static final int M680X_INS_LDMD = 199;
+	public static final int M680X_INS_LDQ = 200;
+	public static final int M680X_INS_LDS = 201;
+	public static final int M680X_INS_LDU = 202;
+	public static final int M680X_INS_LDW = 203;
+	public static final int M680X_INS_LDX = 204;
+	public static final int M680X_INS_LDY = 205;
+	public static final int M680X_INS_LEAS = 206;
+	public static final int M680X_INS_LEAU = 207;
+	public static final int M680X_INS_LEAX = 208;
+	public static final int M680X_INS_LEAY = 209;
+	public static final int M680X_INS_LSL = 210;
+	public static final int M680X_INS_LSLA = 211;
+	public static final int M680X_INS_LSLB = 212;
+	public static final int M680X_INS_LSLD = 213;
+	public static final int M680X_INS_LSLX = 214;
+	public static final int M680X_INS_LSR = 215;
+	public static final int M680X_INS_LSRA = 216;
+	public static final int M680X_INS_LSRB = 217;
+	public static final int M680X_INS_LSRD = 218;
+	public static final int M680X_INS_LSRW = 219;
+	public static final int M680X_INS_LSRX = 220;
+	public static final int M680X_INS_MAXA = 221;
+	public static final int M680X_INS_MAXM = 222;
+	public static final int M680X_INS_MEM = 223;
+	public static final int M680X_INS_MINA = 224;
+	public static final int M680X_INS_MINM = 225;
+	public static final int M680X_INS_MOV = 226;
+	public static final int M680X_INS_MOVB = 227;
+	public static final int M680X_INS_MOVW = 228;
+	public static final int M680X_INS_MUL = 229;
+	public static final int M680X_INS_MULD = 230;
+	public static final int M680X_INS_NEG = 231;
+	public static final int M680X_INS_NEGA = 232;
+	public static final int M680X_INS_NEGB = 233;
+	public static final int M680X_INS_NEGD = 234;
+	public static final int M680X_INS_NEGX = 235;
+	public static final int M680X_INS_NOP = 236;
+	public static final int M680X_INS_NSA = 237;
+	public static final int M680X_INS_OIM = 238;
+	public static final int M680X_INS_ORA = 239;
+	public static final int M680X_INS_ORAA = 240;
+	public static final int M680X_INS_ORAB = 241;
+	public static final int M680X_INS_ORB = 242;
+	public static final int M680X_INS_ORCC = 243;
+	public static final int M680X_INS_ORD = 244;
+	public static final int M680X_INS_ORR = 245;
+	public static final int M680X_INS_PSHA = 246;
+	public static final int M680X_INS_PSHB = 247;
+	public static final int M680X_INS_PSHC = 248;
+	public static final int M680X_INS_PSHD = 249;
+	public static final int M680X_INS_PSHH = 250;
+	public static final int M680X_INS_PSHS = 251;
+	public static final int M680X_INS_PSHSW = 252;
+	public static final int M680X_INS_PSHU = 253;
+	public static final int M680X_INS_PSHUW = 254;
+	public static final int M680X_INS_PSHX = 255;
+	public static final int M680X_INS_PSHY = 256;
+	public static final int M680X_INS_PULA = 257;
+	public static final int M680X_INS_PULB = 258;
+	public static final int M680X_INS_PULC = 259;
+	public static final int M680X_INS_PULD = 260;
+	public static final int M680X_INS_PULH = 261;
+	public static final int M680X_INS_PULS = 262;
+	public static final int M680X_INS_PULSW = 263;
+	public static final int M680X_INS_PULU = 264;
+	public static final int M680X_INS_PULUW = 265;
+	public static final int M680X_INS_PULX = 266;
+	public static final int M680X_INS_PULY = 267;
+	public static final int M680X_INS_REV = 268;
+	public static final int M680X_INS_REVW = 269;
+	public static final int M680X_INS_ROL = 270;
+	public static final int M680X_INS_ROLA = 271;
+	public static final int M680X_INS_ROLB = 272;
+	public static final int M680X_INS_ROLD = 273;
+	public static final int M680X_INS_ROLW = 274;
+	public static final int M680X_INS_ROLX = 275;
+	public static final int M680X_INS_ROR = 276;
+	public static final int M680X_INS_RORA = 277;
+	public static final int M680X_INS_RORB = 278;
+	public static final int M680X_INS_RORD = 279;
+	public static final int M680X_INS_RORW = 280;
+	public static final int M680X_INS_RORX = 281;
+	public static final int M680X_INS_RSP = 282;
+	public static final int M680X_INS_RTC = 283;
+	public static final int M680X_INS_RTI = 284;
+	public static final int M680X_INS_RTS = 285;
+	public static final int M680X_INS_SBA = 286;
+	public static final int M680X_INS_SBC = 287;
+	public static final int M680X_INS_SBCA = 288;
+	public static final int M680X_INS_SBCB = 289;
+	public static final int M680X_INS_SBCD = 290;
+	public static final int M680X_INS_SBCR = 291;
+	public static final int M680X_INS_SEC = 292;
+	public static final int M680X_INS_SEI = 293;
+	public static final int M680X_INS_SEV = 294;
+	public static final int M680X_INS_SEX = 295;
+	public static final int M680X_INS_SEXW = 296;
+	public static final int M680X_INS_SLP = 297;
+	public static final int M680X_INS_STA = 298;
+	public static final int M680X_INS_STAA = 299;
+	public static final int M680X_INS_STAB = 300;
+	public static final int M680X_INS_STB = 301;
+	public static final int M680X_INS_STBT = 302;
+	public static final int M680X_INS_STD = 303;
+	public static final int M680X_INS_STE = 304;
+	public static final int M680X_INS_STF = 305;
+	public static final int M680X_INS_STOP = 306;
+	public static final int M680X_INS_STHX = 307;
+	public static final int M680X_INS_STQ = 308;
+	public static final int M680X_INS_STS = 309;
+	public static final int M680X_INS_STU = 310;
+	public static final int M680X_INS_STW = 311;
+	public static final int M680X_INS_STX = 312;
+	public static final int M680X_INS_STY = 313;
+	public static final int M680X_INS_SUB = 314;
+	public static final int M680X_INS_SUBA = 315;
+	public static final int M680X_INS_SUBB = 316;
+	public static final int M680X_INS_SUBD = 317;
+	public static final int M680X_INS_SUBE = 318;
+	public static final int M680X_INS_SUBF = 319;
+	public static final int M680X_INS_SUBR = 320;
+	public static final int M680X_INS_SUBW = 321;
+	public static final int M680X_INS_SWI = 322;
+	public static final int M680X_INS_SWI2 = 323;
+	public static final int M680X_INS_SWI3 = 324;
+	public static final int M680X_INS_SYNC = 325;
+	public static final int M680X_INS_TAB = 326;
+	public static final int M680X_INS_TAP = 327;
+	public static final int M680X_INS_TAX = 328;
+	public static final int M680X_INS_TBA = 329;
+	public static final int M680X_INS_TBEQ = 330;
+	public static final int M680X_INS_TBL = 331;
+	public static final int M680X_INS_TBNE = 332;
+	public static final int M680X_INS_TEST = 333;
+	public static final int M680X_INS_TFM = 334;
+	public static final int M680X_INS_TFR = 335;
+	public static final int M680X_INS_TIM = 336;
+	public static final int M680X_INS_TPA = 337;
+	public static final int M680X_INS_TST = 338;
+	public static final int M680X_INS_TSTA = 339;
+	public static final int M680X_INS_TSTB = 340;
+	public static final int M680X_INS_TSTD = 341;
+	public static final int M680X_INS_TSTE = 342;
+	public static final int M680X_INS_TSTF = 343;
+	public static final int M680X_INS_TSTW = 344;
+	public static final int M680X_INS_TSTX = 345;
+	public static final int M680X_INS_TSX = 346;
+	public static final int M680X_INS_TSY = 347;
+	public static final int M680X_INS_TXA = 348;
+	public static final int M680X_INS_TXS = 349;
+	public static final int M680X_INS_TYS = 350;
+	public static final int M680X_INS_WAI = 351;
+	public static final int M680X_INS_WAIT = 352;
+	public static final int M680X_INS_WAV = 353;
+	public static final int M680X_INS_WAVR = 354;
+	public static final int M680X_INS_XGDX = 355;
+	public static final int M680X_INS_XGDY = 356;
+	public static final int M680X_INS_ENDING = 357;
+}

thirdparty/capstone/bindings/java/capstone/M68k_const.java

@@ -0,0 +1,489 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class M68k_const {
+	public static final int M68K_OPERAND_COUNT = 4;
+
+	public static final int M68K_REG_INVALID = 0;
+	public static final int M68K_REG_D0 = 1;
+	public static final int M68K_REG_D1 = 2;
+	public static final int M68K_REG_D2 = 3;
+	public static final int M68K_REG_D3 = 4;
+	public static final int M68K_REG_D4 = 5;
+	public static final int M68K_REG_D5 = 6;
+	public static final int M68K_REG_D6 = 7;
+	public static final int M68K_REG_D7 = 8;
+	public static final int M68K_REG_A0 = 9;
+	public static final int M68K_REG_A1 = 10;
+	public static final int M68K_REG_A2 = 11;
+	public static final int M68K_REG_A3 = 12;
+	public static final int M68K_REG_A4 = 13;
+	public static final int M68K_REG_A5 = 14;
+	public static final int M68K_REG_A6 = 15;
+	public static final int M68K_REG_A7 = 16;
+	public static final int M68K_REG_FP0 = 17;
+	public static final int M68K_REG_FP1 = 18;
+	public static final int M68K_REG_FP2 = 19;
+	public static final int M68K_REG_FP3 = 20;
+	public static final int M68K_REG_FP4 = 21;
+	public static final int M68K_REG_FP5 = 22;
+	public static final int M68K_REG_FP6 = 23;
+	public static final int M68K_REG_FP7 = 24;
+	public static final int M68K_REG_PC = 25;
+	public static final int M68K_REG_SR = 26;
+	public static final int M68K_REG_CCR = 27;
+	public static final int M68K_REG_SFC = 28;
+	public static final int M68K_REG_DFC = 29;
+	public static final int M68K_REG_USP = 30;
+	public static final int M68K_REG_VBR = 31;
+	public static final int M68K_REG_CACR = 32;
+	public static final int M68K_REG_CAAR = 33;
+	public static final int M68K_REG_MSP = 34;
+	public static final int M68K_REG_ISP = 35;
+	public static final int M68K_REG_TC = 36;
+	public static final int M68K_REG_ITT0 = 37;
+	public static final int M68K_REG_ITT1 = 38;
+	public static final int M68K_REG_DTT0 = 39;
+	public static final int M68K_REG_DTT1 = 40;
+	public static final int M68K_REG_MMUSR = 41;
+	public static final int M68K_REG_URP = 42;
+	public static final int M68K_REG_SRP = 43;
+	public static final int M68K_REG_FPCR = 44;
+	public static final int M68K_REG_FPSR = 45;
+	public static final int M68K_REG_FPIAR = 46;
+	public static final int M68K_REG_ENDING = 47;
+
+	public static final int M68K_AM_NONE = 0;
+	public static final int M68K_AM_REG_DIRECT_DATA = 1;
+	public static final int M68K_AM_REG_DIRECT_ADDR = 2;
+	public static final int M68K_AM_REGI_ADDR = 3;
+	public static final int M68K_AM_REGI_ADDR_POST_INC = 4;
+	public static final int M68K_AM_REGI_ADDR_PRE_DEC = 5;
+	public static final int M68K_AM_REGI_ADDR_DISP = 6;
+	public static final int M68K_AM_AREGI_INDEX_8_BIT_DISP = 7;
+	public static final int M68K_AM_AREGI_INDEX_BASE_DISP = 8;
+	public static final int M68K_AM_MEMI_POST_INDEX = 9;
+	public static final int M68K_AM_MEMI_PRE_INDEX = 10;
+	public static final int M68K_AM_PCI_DISP = 11;
+	public static final int M68K_AM_PCI_INDEX_8_BIT_DISP = 12;
+	public static final int M68K_AM_PCI_INDEX_BASE_DISP = 13;
+	public static final int M68K_AM_PC_MEMI_POST_INDEX = 14;
+	public static final int M68K_AM_PC_MEMI_PRE_INDEX = 15;
+	public static final int M68K_AM_ABSOLUTE_DATA_SHORT = 16;
+	public static final int M68K_AM_ABSOLUTE_DATA_LONG = 17;
+	public static final int M68K_AM_IMMEDIATE = 18;
+	public static final int M68K_AM_BRANCH_DISPLACEMENT = 19;
+
+	public static final int M68K_OP_INVALID = 0;
+	public static final int M68K_OP_REG = 1;
+	public static final int M68K_OP_IMM = 2;
+	public static final int M68K_OP_MEM = 3;
+	public static final int M68K_OP_FP_SINGLE = 4;
+	public static final int M68K_OP_FP_DOUBLE = 5;
+	public static final int M68K_OP_REG_BITS = 6;
+	public static final int M68K_OP_REG_PAIR = 7;
+	public static final int M68K_OP_BR_DISP = 8;
+
+	public static final int M68K_OP_BR_DISP_SIZE_INVALID = 0;
+	public static final int M68K_OP_BR_DISP_SIZE_BYTE = 1;
+	public static final int M68K_OP_BR_DISP_SIZE_WORD = 2;
+	public static final int M68K_OP_BR_DISP_SIZE_LONG = 4;
+
+	public static final int M68K_CPU_SIZE_NONE = 0;
+	public static final int M68K_CPU_SIZE_BYTE = 1;
+	public static final int M68K_CPU_SIZE_WORD = 2;
+	public static final int M68K_CPU_SIZE_LONG = 4;
+
+	public static final int M68K_FPU_SIZE_NONE = 0;
+	public static final int M68K_FPU_SIZE_SINGLE = 4;
+	public static final int M68K_FPU_SIZE_DOUBLE = 8;
+	public static final int M68K_FPU_SIZE_EXTENDED = 12;
+
+	public static final int M68K_SIZE_TYPE_INVALID = 0;
+	public static final int M68K_SIZE_TYPE_CPU = 1;
+	public static final int M68K_SIZE_TYPE_FPU = 2;
+
+	public static final int M68K_INS_INVALID = 0;
+	public static final int M68K_INS_ABCD = 1;
+	public static final int M68K_INS_ADD = 2;
+	public static final int M68K_INS_ADDA = 3;
+	public static final int M68K_INS_ADDI = 4;
+	public static final int M68K_INS_ADDQ = 5;
+	public static final int M68K_INS_ADDX = 6;
+	public static final int M68K_INS_AND = 7;
+	public static final int M68K_INS_ANDI = 8;
+	public static final int M68K_INS_ASL = 9;
+	public static final int M68K_INS_ASR = 10;
+	public static final int M68K_INS_BHS = 11;
+	public static final int M68K_INS_BLO = 12;
+	public static final int M68K_INS_BHI = 13;
+	public static final int M68K_INS_BLS = 14;
+	public static final int M68K_INS_BCC = 15;
+	public static final int M68K_INS_BCS = 16;
+	public static final int M68K_INS_BNE = 17;
+	public static final int M68K_INS_BEQ = 18;
+	public static final int M68K_INS_BVC = 19;
+	public static final int M68K_INS_BVS = 20;
+	public static final int M68K_INS_BPL = 21;
+	public static final int M68K_INS_BMI = 22;
+	public static final int M68K_INS_BGE = 23;
+	public static final int M68K_INS_BLT = 24;
+	public static final int M68K_INS_BGT = 25;
+	public static final int M68K_INS_BLE = 26;
+	public static final int M68K_INS_BRA = 27;
+	public static final int M68K_INS_BSR = 28;
+	public static final int M68K_INS_BCHG = 29;
+	public static final int M68K_INS_BCLR = 30;
+	public static final int M68K_INS_BSET = 31;
+	public static final int M68K_INS_BTST = 32;
+	public static final int M68K_INS_BFCHG = 33;
+	public static final int M68K_INS_BFCLR = 34;
+	public static final int M68K_INS_BFEXTS = 35;
+	public static final int M68K_INS_BFEXTU = 36;
+	public static final int M68K_INS_BFFFO = 37;
+	public static final int M68K_INS_BFINS = 38;
+	public static final int M68K_INS_BFSET = 39;
+	public static final int M68K_INS_BFTST = 40;
+	public static final int M68K_INS_BKPT = 41;
+	public static final int M68K_INS_CALLM = 42;
+	public static final int M68K_INS_CAS = 43;
+	public static final int M68K_INS_CAS2 = 44;
+	public static final int M68K_INS_CHK = 45;
+	public static final int M68K_INS_CHK2 = 46;
+	public static final int M68K_INS_CLR = 47;
+	public static final int M68K_INS_CMP = 48;
+	public static final int M68K_INS_CMPA = 49;
+	public static final int M68K_INS_CMPI = 50;
+	public static final int M68K_INS_CMPM = 51;
+	public static final int M68K_INS_CMP2 = 52;
+	public static final int M68K_INS_CINVL = 53;
+	public static final int M68K_INS_CINVP = 54;
+	public static final int M68K_INS_CINVA = 55;
+	public static final int M68K_INS_CPUSHL = 56;
+	public static final int M68K_INS_CPUSHP = 57;
+	public static final int M68K_INS_CPUSHA = 58;
+	public static final int M68K_INS_DBT = 59;
+	public static final int M68K_INS_DBF = 60;
+	public static final int M68K_INS_DBHI = 61;
+	public static final int M68K_INS_DBLS = 62;
+	public static final int M68K_INS_DBCC = 63;
+	public static final int M68K_INS_DBCS = 64;
+	public static final int M68K_INS_DBNE = 65;
+	public static final int M68K_INS_DBEQ = 66;
+	public static final int M68K_INS_DBVC = 67;
+	public static final int M68K_INS_DBVS = 68;
+	public static final int M68K_INS_DBPL = 69;
+	public static final int M68K_INS_DBMI = 70;
+	public static final int M68K_INS_DBGE = 71;
+	public static final int M68K_INS_DBLT = 72;
+	public static final int M68K_INS_DBGT = 73;
+	public static final int M68K_INS_DBLE = 74;
+	public static final int M68K_INS_DBRA = 75;
+	public static final int M68K_INS_DIVS = 76;
+	public static final int M68K_INS_DIVSL = 77;
+	public static final int M68K_INS_DIVU = 78;
+	public static final int M68K_INS_DIVUL = 79;
+	public static final int M68K_INS_EOR = 80;
+	public static final int M68K_INS_EORI = 81;
+	public static final int M68K_INS_EXG = 82;
+	public static final int M68K_INS_EXT = 83;
+	public static final int M68K_INS_EXTB = 84;
+	public static final int M68K_INS_FABS = 85;
+	public static final int M68K_INS_FSABS = 86;
+	public static final int M68K_INS_FDABS = 87;
+	public static final int M68K_INS_FACOS = 88;
+	public static final int M68K_INS_FADD = 89;
+	public static final int M68K_INS_FSADD = 90;
+	public static final int M68K_INS_FDADD = 91;
+	public static final int M68K_INS_FASIN = 92;
+	public static final int M68K_INS_FATAN = 93;
+	public static final int M68K_INS_FATANH = 94;
+	public static final int M68K_INS_FBF = 95;
+	public static final int M68K_INS_FBEQ = 96;
+	public static final int M68K_INS_FBOGT = 97;
+	public static final int M68K_INS_FBOGE = 98;
+	public static final int M68K_INS_FBOLT = 99;
+	public static final int M68K_INS_FBOLE = 100;
+	public static final int M68K_INS_FBOGL = 101;
+	public static final int M68K_INS_FBOR = 102;
+	public static final int M68K_INS_FBUN = 103;
+	public static final int M68K_INS_FBUEQ = 104;
+	public static final int M68K_INS_FBUGT = 105;
+	public static final int M68K_INS_FBUGE = 106;
+	public static final int M68K_INS_FBULT = 107;
+	public static final int M68K_INS_FBULE = 108;
+	public static final int M68K_INS_FBNE = 109;
+	public static final int M68K_INS_FBT = 110;
+	public static final int M68K_INS_FBSF = 111;
+	public static final int M68K_INS_FBSEQ = 112;
+	public static final int M68K_INS_FBGT = 113;
+	public static final int M68K_INS_FBGE = 114;
+	public static final int M68K_INS_FBLT = 115;
+	public static final int M68K_INS_FBLE = 116;
+	public static final int M68K_INS_FBGL = 117;
+	public static final int M68K_INS_FBGLE = 118;
+	public static final int M68K_INS_FBNGLE = 119;
+	public static final int M68K_INS_FBNGL = 120;
+	public static final int M68K_INS_FBNLE = 121;
+	public static final int M68K_INS_FBNLT = 122;
+	public static final int M68K_INS_FBNGE = 123;
+	public static final int M68K_INS_FBNGT = 124;
+	public static final int M68K_INS_FBSNE = 125;
+	public static final int M68K_INS_FBST = 126;
+	public static final int M68K_INS_FCMP = 127;
+	public static final int M68K_INS_FCOS = 128;
+	public static final int M68K_INS_FCOSH = 129;
+	public static final int M68K_INS_FDBF = 130;
+	public static final int M68K_INS_FDBEQ = 131;
+	public static final int M68K_INS_FDBOGT = 132;
+	public static final int M68K_INS_FDBOGE = 133;
+	public static final int M68K_INS_FDBOLT = 134;
+	public static final int M68K_INS_FDBOLE = 135;
+	public static final int M68K_INS_FDBOGL = 136;
+	public static final int M68K_INS_FDBOR = 137;
+	public static final int M68K_INS_FDBUN = 138;
+	public static final int M68K_INS_FDBUEQ = 139;
+	public static final int M68K_INS_FDBUGT = 140;
+	public static final int M68K_INS_FDBUGE = 141;
+	public static final int M68K_INS_FDBULT = 142;
+	public static final int M68K_INS_FDBULE = 143;
+	public static final int M68K_INS_FDBNE = 144;
+	public static final int M68K_INS_FDBT = 145;
+	public static final int M68K_INS_FDBSF = 146;
+	public static final int M68K_INS_FDBSEQ = 147;
+	public static final int M68K_INS_FDBGT = 148;
+	public static final int M68K_INS_FDBGE = 149;
+	public static final int M68K_INS_FDBLT = 150;
+	public static final int M68K_INS_FDBLE = 151;
+	public static final int M68K_INS_FDBGL = 152;
+	public static final int M68K_INS_FDBGLE = 153;
+	public static final int M68K_INS_FDBNGLE = 154;
+	public static final int M68K_INS_FDBNGL = 155;
+	public static final int M68K_INS_FDBNLE = 156;
+	public static final int M68K_INS_FDBNLT = 157;
+	public static final int M68K_INS_FDBNGE = 158;
+	public static final int M68K_INS_FDBNGT = 159;
+	public static final int M68K_INS_FDBSNE = 160;
+	public static final int M68K_INS_FDBST = 161;
+	public static final int M68K_INS_FDIV = 162;
+	public static final int M68K_INS_FSDIV = 163;
+	public static final int M68K_INS_FDDIV = 164;
+	public static final int M68K_INS_FETOX = 165;
+	public static final int M68K_INS_FETOXM1 = 166;
+	public static final int M68K_INS_FGETEXP = 167;
+	public static final int M68K_INS_FGETMAN = 168;
+	public static final int M68K_INS_FINT = 169;
+	public static final int M68K_INS_FINTRZ = 170;
+	public static final int M68K_INS_FLOG10 = 171;
+	public static final int M68K_INS_FLOG2 = 172;
+	public static final int M68K_INS_FLOGN = 173;
+	public static final int M68K_INS_FLOGNP1 = 174;
+	public static final int M68K_INS_FMOD = 175;
+	public static final int M68K_INS_FMOVE = 176;
+	public static final int M68K_INS_FSMOVE = 177;
+	public static final int M68K_INS_FDMOVE = 178;
+	public static final int M68K_INS_FMOVECR = 179;
+	public static final int M68K_INS_FMOVEM = 180;
+	public static final int M68K_INS_FMUL = 181;
+	public static final int M68K_INS_FSMUL = 182;
+	public static final int M68K_INS_FDMUL = 183;
+	public static final int M68K_INS_FNEG = 184;
+	public static final int M68K_INS_FSNEG = 185;
+	public static final int M68K_INS_FDNEG = 186;
+	public static final int M68K_INS_FNOP = 187;
+	public static final int M68K_INS_FREM = 188;
+	public static final int M68K_INS_FRESTORE = 189;
+	public static final int M68K_INS_FSAVE = 190;
+	public static final int M68K_INS_FSCALE = 191;
+	public static final int M68K_INS_FSGLDIV = 192;
+	public static final int M68K_INS_FSGLMUL = 193;
+	public static final int M68K_INS_FSIN = 194;
+	public static final int M68K_INS_FSINCOS = 195;
+	public static final int M68K_INS_FSINH = 196;
+	public static final int M68K_INS_FSQRT = 197;
+	public static final int M68K_INS_FSSQRT = 198;
+	public static final int M68K_INS_FDSQRT = 199;
+	public static final int M68K_INS_FSF = 200;
+	public static final int M68K_INS_FSBEQ = 201;
+	public static final int M68K_INS_FSOGT = 202;
+	public static final int M68K_INS_FSOGE = 203;
+	public static final int M68K_INS_FSOLT = 204;
+	public static final int M68K_INS_FSOLE = 205;
+	public static final int M68K_INS_FSOGL = 206;
+	public static final int M68K_INS_FSOR = 207;
+	public static final int M68K_INS_FSUN = 208;
+	public static final int M68K_INS_FSUEQ = 209;
+	public static final int M68K_INS_FSUGT = 210;
+	public static final int M68K_INS_FSUGE = 211;
+	public static final int M68K_INS_FSULT = 212;
+	public static final int M68K_INS_FSULE = 213;
+	public static final int M68K_INS_FSNE = 214;
+	public static final int M68K_INS_FST = 215;
+	public static final int M68K_INS_FSSF = 216;
+	public static final int M68K_INS_FSSEQ = 217;
+	public static final int M68K_INS_FSGT = 218;
+	public static final int M68K_INS_FSGE = 219;
+	public static final int M68K_INS_FSLT = 220;
+	public static final int M68K_INS_FSLE = 221;
+	public static final int M68K_INS_FSGL = 222;
+	public static final int M68K_INS_FSGLE = 223;
+	public static final int M68K_INS_FSNGLE = 224;
+	public static final int M68K_INS_FSNGL = 225;
+	public static final int M68K_INS_FSNLE = 226;
+	public static final int M68K_INS_FSNLT = 227;
+	public static final int M68K_INS_FSNGE = 228;
+	public static final int M68K_INS_FSNGT = 229;
+	public static final int M68K_INS_FSSNE = 230;
+	public static final int M68K_INS_FSST = 231;
+	public static final int M68K_INS_FSUB = 232;
+	public static final int M68K_INS_FSSUB = 233;
+	public static final int M68K_INS_FDSUB = 234;
+	public static final int M68K_INS_FTAN = 235;
+	public static final int M68K_INS_FTANH = 236;
+	public static final int M68K_INS_FTENTOX = 237;
+	public static final int M68K_INS_FTRAPF = 238;
+	public static final int M68K_INS_FTRAPEQ = 239;
+	public static final int M68K_INS_FTRAPOGT = 240;
+	public static final int M68K_INS_FTRAPOGE = 241;
+	public static final int M68K_INS_FTRAPOLT = 242;
+	public static final int M68K_INS_FTRAPOLE = 243;
+	public static final int M68K_INS_FTRAPOGL = 244;
+	public static final int M68K_INS_FTRAPOR = 245;
+	public static final int M68K_INS_FTRAPUN = 246;
+	public static final int M68K_INS_FTRAPUEQ = 247;
+	public static final int M68K_INS_FTRAPUGT = 248;
+	public static final int M68K_INS_FTRAPUGE = 249;
+	public static final int M68K_INS_FTRAPULT = 250;
+	public static final int M68K_INS_FTRAPULE = 251;
+	public static final int M68K_INS_FTRAPNE = 252;
+	public static final int M68K_INS_FTRAPT = 253;
+	public static final int M68K_INS_FTRAPSF = 254;
+	public static final int M68K_INS_FTRAPSEQ = 255;
+	public static final int M68K_INS_FTRAPGT = 256;
+	public static final int M68K_INS_FTRAPGE = 257;
+	public static final int M68K_INS_FTRAPLT = 258;
+	public static final int M68K_INS_FTRAPLE = 259;
+	public static final int M68K_INS_FTRAPGL = 260;
+	public static final int M68K_INS_FTRAPGLE = 261;
+	public static final int M68K_INS_FTRAPNGLE = 262;
+	public static final int M68K_INS_FTRAPNGL = 263;
+	public static final int M68K_INS_FTRAPNLE = 264;
+	public static final int M68K_INS_FTRAPNLT = 265;
+	public static final int M68K_INS_FTRAPNGE = 266;
+	public static final int M68K_INS_FTRAPNGT = 267;
+	public static final int M68K_INS_FTRAPSNE = 268;
+	public static final int M68K_INS_FTRAPST = 269;
+	public static final int M68K_INS_FTST = 270;
+	public static final int M68K_INS_FTWOTOX = 271;
+	public static final int M68K_INS_HALT = 272;
+	public static final int M68K_INS_ILLEGAL = 273;
+	public static final int M68K_INS_JMP = 274;
+	public static final int M68K_INS_JSR = 275;
+	public static final int M68K_INS_LEA = 276;
+	public static final int M68K_INS_LINK = 277;
+	public static final int M68K_INS_LPSTOP = 278;
+	public static final int M68K_INS_LSL = 279;
+	public static final int M68K_INS_LSR = 280;
+	public static final int M68K_INS_MOVE = 281;
+	public static final int M68K_INS_MOVEA = 282;
+	public static final int M68K_INS_MOVEC = 283;
+	public static final int M68K_INS_MOVEM = 284;
+	public static final int M68K_INS_MOVEP = 285;
+	public static final int M68K_INS_MOVEQ = 286;
+	public static final int M68K_INS_MOVES = 287;
+	public static final int M68K_INS_MOVE16 = 288;
+	public static final int M68K_INS_MULS = 289;
+	public static final int M68K_INS_MULU = 290;
+	public static final int M68K_INS_NBCD = 291;
+	public static final int M68K_INS_NEG = 292;
+	public static final int M68K_INS_NEGX = 293;
+	public static final int M68K_INS_NOP = 294;
+	public static final int M68K_INS_NOT = 295;
+	public static final int M68K_INS_OR = 296;
+	public static final int M68K_INS_ORI = 297;
+	public static final int M68K_INS_PACK = 298;
+	public static final int M68K_INS_PEA = 299;
+	public static final int M68K_INS_PFLUSH = 300;
+	public static final int M68K_INS_PFLUSHA = 301;
+	public static final int M68K_INS_PFLUSHAN = 302;
+	public static final int M68K_INS_PFLUSHN = 303;
+	public static final int M68K_INS_PLOADR = 304;
+	public static final int M68K_INS_PLOADW = 305;
+	public static final int M68K_INS_PLPAR = 306;
+	public static final int M68K_INS_PLPAW = 307;
+	public static final int M68K_INS_PMOVE = 308;
+	public static final int M68K_INS_PMOVEFD = 309;
+	public static final int M68K_INS_PTESTR = 310;
+	public static final int M68K_INS_PTESTW = 311;
+	public static final int M68K_INS_PULSE = 312;
+	public static final int M68K_INS_REMS = 313;
+	public static final int M68K_INS_REMU = 314;
+	public static final int M68K_INS_RESET = 315;
+	public static final int M68K_INS_ROL = 316;
+	public static final int M68K_INS_ROR = 317;
+	public static final int M68K_INS_ROXL = 318;
+	public static final int M68K_INS_ROXR = 319;
+	public static final int M68K_INS_RTD = 320;
+	public static final int M68K_INS_RTE = 321;
+	public static final int M68K_INS_RTM = 322;
+	public static final int M68K_INS_RTR = 323;
+	public static final int M68K_INS_RTS = 324;
+	public static final int M68K_INS_SBCD = 325;
+	public static final int M68K_INS_ST = 326;
+	public static final int M68K_INS_SF = 327;
+	public static final int M68K_INS_SHI = 328;
+	public static final int M68K_INS_SLS = 329;
+	public static final int M68K_INS_SCC = 330;
+	public static final int M68K_INS_SHS = 331;
+	public static final int M68K_INS_SCS = 332;
+	public static final int M68K_INS_SLO = 333;
+	public static final int M68K_INS_SNE = 334;
+	public static final int M68K_INS_SEQ = 335;
+	public static final int M68K_INS_SVC = 336;
+	public static final int M68K_INS_SVS = 337;
+	public static final int M68K_INS_SPL = 338;
+	public static final int M68K_INS_SMI = 339;
+	public static final int M68K_INS_SGE = 340;
+	public static final int M68K_INS_SLT = 341;
+	public static final int M68K_INS_SGT = 342;
+	public static final int M68K_INS_SLE = 343;
+	public static final int M68K_INS_STOP = 344;
+	public static final int M68K_INS_SUB = 345;
+	public static final int M68K_INS_SUBA = 346;
+	public static final int M68K_INS_SUBI = 347;
+	public static final int M68K_INS_SUBQ = 348;
+	public static final int M68K_INS_SUBX = 349;
+	public static final int M68K_INS_SWAP = 350;
+	public static final int M68K_INS_TAS = 351;
+	public static final int M68K_INS_TRAP = 352;
+	public static final int M68K_INS_TRAPV = 353;
+	public static final int M68K_INS_TRAPT = 354;
+	public static final int M68K_INS_TRAPF = 355;
+	public static final int M68K_INS_TRAPHI = 356;
+	public static final int M68K_INS_TRAPLS = 357;
+	public static final int M68K_INS_TRAPCC = 358;
+	public static final int M68K_INS_TRAPHS = 359;
+	public static final int M68K_INS_TRAPCS = 360;
+	public static final int M68K_INS_TRAPLO = 361;
+	public static final int M68K_INS_TRAPNE = 362;
+	public static final int M68K_INS_TRAPEQ = 363;
+	public static final int M68K_INS_TRAPVC = 364;
+	public static final int M68K_INS_TRAPVS = 365;
+	public static final int M68K_INS_TRAPPL = 366;
+	public static final int M68K_INS_TRAPMI = 367;
+	public static final int M68K_INS_TRAPGE = 368;
+	public static final int M68K_INS_TRAPLT = 369;
+	public static final int M68K_INS_TRAPGT = 370;
+	public static final int M68K_INS_TRAPLE = 371;
+	public static final int M68K_INS_TST = 372;
+	public static final int M68K_INS_UNLK = 373;
+	public static final int M68K_INS_UNPK = 374;
+	public static final int M68K_INS_ENDING = 375;
+
+	public static final int M68K_GRP_INVALID = 0;
+	public static final int M68K_GRP_JUMP = 1;
+	public static final int M68K_GRP_RET = 3;
+	public static final int M68K_GRP_IRET = 5;
+	public static final int M68K_GRP_BRANCH_RELATIVE = 7;
+	public static final int M68K_GRP_ENDING = 8;
+}

thirdparty/capstone/bindings/java/capstone/Mips.java

@@ -0,0 +1,88 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Mips_const.*;
+
+public class Mips {
+
+  public static class MemType extends Structure {
+    public int base;
+    public long disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "disp");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public long imm;
+    public MemType mem;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("reg", "imm", "mem");
+    }
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+
+    public void read() {
+      super.read();
+      if (type == MIPS_OP_MEM)
+        value.setType(MemType.class);
+      if (type == MIPS_OP_IMM)
+        value.setType(Long.TYPE);
+      if (type == MIPS_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == MIPS_OP_INVALID)
+        return;
+      readField("value");
+    }
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public byte op_count;
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[10];
+    }
+
+    public void read() {
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+
+    public Operand [] op;
+
+    public OpInfo(UnionOpInfo e) {
+      op = e.op;
+    }
+  }
+}

thirdparty/capstone/bindings/java/capstone/Mips_const.java

@@ -0,0 +1,865 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Mips_const {
+
+	public static final int MIPS_OP_INVALID = 0;
+	public static final int MIPS_OP_REG = 1;
+	public static final int MIPS_OP_IMM = 2;
+	public static final int MIPS_OP_MEM = 3;
+
+	public static final int MIPS_REG_INVALID = 0;
+	public static final int MIPS_REG_PC = 1;
+	public static final int MIPS_REG_0 = 2;
+	public static final int MIPS_REG_1 = 3;
+	public static final int MIPS_REG_2 = 4;
+	public static final int MIPS_REG_3 = 5;
+	public static final int MIPS_REG_4 = 6;
+	public static final int MIPS_REG_5 = 7;
+	public static final int MIPS_REG_6 = 8;
+	public static final int MIPS_REG_7 = 9;
+	public static final int MIPS_REG_8 = 10;
+	public static final int MIPS_REG_9 = 11;
+	public static final int MIPS_REG_10 = 12;
+	public static final int MIPS_REG_11 = 13;
+	public static final int MIPS_REG_12 = 14;
+	public static final int MIPS_REG_13 = 15;
+	public static final int MIPS_REG_14 = 16;
+	public static final int MIPS_REG_15 = 17;
+	public static final int MIPS_REG_16 = 18;
+	public static final int MIPS_REG_17 = 19;
+	public static final int MIPS_REG_18 = 20;
+	public static final int MIPS_REG_19 = 21;
+	public static final int MIPS_REG_20 = 22;
+	public static final int MIPS_REG_21 = 23;
+	public static final int MIPS_REG_22 = 24;
+	public static final int MIPS_REG_23 = 25;
+	public static final int MIPS_REG_24 = 26;
+	public static final int MIPS_REG_25 = 27;
+	public static final int MIPS_REG_26 = 28;
+	public static final int MIPS_REG_27 = 29;
+	public static final int MIPS_REG_28 = 30;
+	public static final int MIPS_REG_29 = 31;
+	public static final int MIPS_REG_30 = 32;
+	public static final int MIPS_REG_31 = 33;
+	public static final int MIPS_REG_DSPCCOND = 34;
+	public static final int MIPS_REG_DSPCARRY = 35;
+	public static final int MIPS_REG_DSPEFI = 36;
+	public static final int MIPS_REG_DSPOUTFLAG = 37;
+	public static final int MIPS_REG_DSPOUTFLAG16_19 = 38;
+	public static final int MIPS_REG_DSPOUTFLAG20 = 39;
+	public static final int MIPS_REG_DSPOUTFLAG21 = 40;
+	public static final int MIPS_REG_DSPOUTFLAG22 = 41;
+	public static final int MIPS_REG_DSPOUTFLAG23 = 42;
+	public static final int MIPS_REG_DSPPOS = 43;
+	public static final int MIPS_REG_DSPSCOUNT = 44;
+	public static final int MIPS_REG_AC0 = 45;
+	public static final int MIPS_REG_AC1 = 46;
+	public static final int MIPS_REG_AC2 = 47;
+	public static final int MIPS_REG_AC3 = 48;
+	public static final int MIPS_REG_CC0 = 49;
+	public static final int MIPS_REG_CC1 = 50;
+	public static final int MIPS_REG_CC2 = 51;
+	public static final int MIPS_REG_CC3 = 52;
+	public static final int MIPS_REG_CC4 = 53;
+	public static final int MIPS_REG_CC5 = 54;
+	public static final int MIPS_REG_CC6 = 55;
+	public static final int MIPS_REG_CC7 = 56;
+	public static final int MIPS_REG_F0 = 57;
+	public static final int MIPS_REG_F1 = 58;
+	public static final int MIPS_REG_F2 = 59;
+	public static final int MIPS_REG_F3 = 60;
+	public static final int MIPS_REG_F4 = 61;
+	public static final int MIPS_REG_F5 = 62;
+	public static final int MIPS_REG_F6 = 63;
+	public static final int MIPS_REG_F7 = 64;
+	public static final int MIPS_REG_F8 = 65;
+	public static final int MIPS_REG_F9 = 66;
+	public static final int MIPS_REG_F10 = 67;
+	public static final int MIPS_REG_F11 = 68;
+	public static final int MIPS_REG_F12 = 69;
+	public static final int MIPS_REG_F13 = 70;
+	public static final int MIPS_REG_F14 = 71;
+	public static final int MIPS_REG_F15 = 72;
+	public static final int MIPS_REG_F16 = 73;
+	public static final int MIPS_REG_F17 = 74;
+	public static final int MIPS_REG_F18 = 75;
+	public static final int MIPS_REG_F19 = 76;
+	public static final int MIPS_REG_F20 = 77;
+	public static final int MIPS_REG_F21 = 78;
+	public static final int MIPS_REG_F22 = 79;
+	public static final int MIPS_REG_F23 = 80;
+	public static final int MIPS_REG_F24 = 81;
+	public static final int MIPS_REG_F25 = 82;
+	public static final int MIPS_REG_F26 = 83;
+	public static final int MIPS_REG_F27 = 84;
+	public static final int MIPS_REG_F28 = 85;
+	public static final int MIPS_REG_F29 = 86;
+	public static final int MIPS_REG_F30 = 87;
+	public static final int MIPS_REG_F31 = 88;
+	public static final int MIPS_REG_FCC0 = 89;
+	public static final int MIPS_REG_FCC1 = 90;
+	public static final int MIPS_REG_FCC2 = 91;
+	public static final int MIPS_REG_FCC3 = 92;
+	public static final int MIPS_REG_FCC4 = 93;
+	public static final int MIPS_REG_FCC5 = 94;
+	public static final int MIPS_REG_FCC6 = 95;
+	public static final int MIPS_REG_FCC7 = 96;
+	public static final int MIPS_REG_W0 = 97;
+	public static final int MIPS_REG_W1 = 98;
+	public static final int MIPS_REG_W2 = 99;
+	public static final int MIPS_REG_W3 = 100;
+	public static final int MIPS_REG_W4 = 101;
+	public static final int MIPS_REG_W5 = 102;
+	public static final int MIPS_REG_W6 = 103;
+	public static final int MIPS_REG_W7 = 104;
+	public static final int MIPS_REG_W8 = 105;
+	public static final int MIPS_REG_W9 = 106;
+	public static final int MIPS_REG_W10 = 107;
+	public static final int MIPS_REG_W11 = 108;
+	public static final int MIPS_REG_W12 = 109;
+	public static final int MIPS_REG_W13 = 110;
+	public static final int MIPS_REG_W14 = 111;
+	public static final int MIPS_REG_W15 = 112;
+	public static final int MIPS_REG_W16 = 113;
+	public static final int MIPS_REG_W17 = 114;
+	public static final int MIPS_REG_W18 = 115;
+	public static final int MIPS_REG_W19 = 116;
+	public static final int MIPS_REG_W20 = 117;
+	public static final int MIPS_REG_W21 = 118;
+	public static final int MIPS_REG_W22 = 119;
+	public static final int MIPS_REG_W23 = 120;
+	public static final int MIPS_REG_W24 = 121;
+	public static final int MIPS_REG_W25 = 122;
+	public static final int MIPS_REG_W26 = 123;
+	public static final int MIPS_REG_W27 = 124;
+	public static final int MIPS_REG_W28 = 125;
+	public static final int MIPS_REG_W29 = 126;
+	public static final int MIPS_REG_W30 = 127;
+	public static final int MIPS_REG_W31 = 128;
+	public static final int MIPS_REG_HI = 129;
+	public static final int MIPS_REG_LO = 130;
+	public static final int MIPS_REG_P0 = 131;
+	public static final int MIPS_REG_P1 = 132;
+	public static final int MIPS_REG_P2 = 133;
+	public static final int MIPS_REG_MPL0 = 134;
+	public static final int MIPS_REG_MPL1 = 135;
+	public static final int MIPS_REG_MPL2 = 136;
+	public static final int MIPS_REG_ENDING = 137;
+	public static final int MIPS_REG_ZERO = MIPS_REG_0;
+	public static final int MIPS_REG_AT = MIPS_REG_1;
+	public static final int MIPS_REG_V0 = MIPS_REG_2;
+	public static final int MIPS_REG_V1 = MIPS_REG_3;
+	public static final int MIPS_REG_A0 = MIPS_REG_4;
+	public static final int MIPS_REG_A1 = MIPS_REG_5;
+	public static final int MIPS_REG_A2 = MIPS_REG_6;
+	public static final int MIPS_REG_A3 = MIPS_REG_7;
+	public static final int MIPS_REG_T0 = MIPS_REG_8;
+	public static final int MIPS_REG_T1 = MIPS_REG_9;
+	public static final int MIPS_REG_T2 = MIPS_REG_10;
+	public static final int MIPS_REG_T3 = MIPS_REG_11;
+	public static final int MIPS_REG_T4 = MIPS_REG_12;
+	public static final int MIPS_REG_T5 = MIPS_REG_13;
+	public static final int MIPS_REG_T6 = MIPS_REG_14;
+	public static final int MIPS_REG_T7 = MIPS_REG_15;
+	public static final int MIPS_REG_S0 = MIPS_REG_16;
+	public static final int MIPS_REG_S1 = MIPS_REG_17;
+	public static final int MIPS_REG_S2 = MIPS_REG_18;
+	public static final int MIPS_REG_S3 = MIPS_REG_19;
+	public static final int MIPS_REG_S4 = MIPS_REG_20;
+	public static final int MIPS_REG_S5 = MIPS_REG_21;
+	public static final int MIPS_REG_S6 = MIPS_REG_22;
+	public static final int MIPS_REG_S7 = MIPS_REG_23;
+	public static final int MIPS_REG_T8 = MIPS_REG_24;
+	public static final int MIPS_REG_T9 = MIPS_REG_25;
+	public static final int MIPS_REG_K0 = MIPS_REG_26;
+	public static final int MIPS_REG_K1 = MIPS_REG_27;
+	public static final int MIPS_REG_GP = MIPS_REG_28;
+	public static final int MIPS_REG_SP = MIPS_REG_29;
+	public static final int MIPS_REG_FP = MIPS_REG_30;
+	public static final int MIPS_REG_S8 = MIPS_REG_30;
+	public static final int MIPS_REG_RA = MIPS_REG_31;
+	public static final int MIPS_REG_HI0 = MIPS_REG_AC0;
+	public static final int MIPS_REG_HI1 = MIPS_REG_AC1;
+	public static final int MIPS_REG_HI2 = MIPS_REG_AC2;
+	public static final int MIPS_REG_HI3 = MIPS_REG_AC3;
+	public static final int MIPS_REG_LO0 = MIPS_REG_HI0;
+	public static final int MIPS_REG_LO1 = MIPS_REG_HI1;
+	public static final int MIPS_REG_LO2 = MIPS_REG_HI2;
+	public static final int MIPS_REG_LO3 = MIPS_REG_HI3;
+
+	public static final int MIPS_INS_INVALID = 0;
+	public static final int MIPS_INS_ABSQ_S = 1;
+	public static final int MIPS_INS_ADD = 2;
+	public static final int MIPS_INS_ADDIUPC = 3;
+	public static final int MIPS_INS_ADDIUR1SP = 4;
+	public static final int MIPS_INS_ADDIUR2 = 5;
+	public static final int MIPS_INS_ADDIUS5 = 6;
+	public static final int MIPS_INS_ADDIUSP = 7;
+	public static final int MIPS_INS_ADDQH = 8;
+	public static final int MIPS_INS_ADDQH_R = 9;
+	public static final int MIPS_INS_ADDQ = 10;
+	public static final int MIPS_INS_ADDQ_S = 11;
+	public static final int MIPS_INS_ADDSC = 12;
+	public static final int MIPS_INS_ADDS_A = 13;
+	public static final int MIPS_INS_ADDS_S = 14;
+	public static final int MIPS_INS_ADDS_U = 15;
+	public static final int MIPS_INS_ADDU16 = 16;
+	public static final int MIPS_INS_ADDUH = 17;
+	public static final int MIPS_INS_ADDUH_R = 18;
+	public static final int MIPS_INS_ADDU = 19;
+	public static final int MIPS_INS_ADDU_S = 20;
+	public static final int MIPS_INS_ADDVI = 21;
+	public static final int MIPS_INS_ADDV = 22;
+	public static final int MIPS_INS_ADDWC = 23;
+	public static final int MIPS_INS_ADD_A = 24;
+	public static final int MIPS_INS_ADDI = 25;
+	public static final int MIPS_INS_ADDIU = 26;
+	public static final int MIPS_INS_ALIGN = 27;
+	public static final int MIPS_INS_ALUIPC = 28;
+	public static final int MIPS_INS_AND = 29;
+	public static final int MIPS_INS_AND16 = 30;
+	public static final int MIPS_INS_ANDI16 = 31;
+	public static final int MIPS_INS_ANDI = 32;
+	public static final int MIPS_INS_APPEND = 33;
+	public static final int MIPS_INS_ASUB_S = 34;
+	public static final int MIPS_INS_ASUB_U = 35;
+	public static final int MIPS_INS_AUI = 36;
+	public static final int MIPS_INS_AUIPC = 37;
+	public static final int MIPS_INS_AVER_S = 38;
+	public static final int MIPS_INS_AVER_U = 39;
+	public static final int MIPS_INS_AVE_S = 40;
+	public static final int MIPS_INS_AVE_U = 41;
+	public static final int MIPS_INS_B16 = 42;
+	public static final int MIPS_INS_BADDU = 43;
+	public static final int MIPS_INS_BAL = 44;
+	public static final int MIPS_INS_BALC = 45;
+	public static final int MIPS_INS_BALIGN = 46;
+	public static final int MIPS_INS_BBIT0 = 47;
+	public static final int MIPS_INS_BBIT032 = 48;
+	public static final int MIPS_INS_BBIT1 = 49;
+	public static final int MIPS_INS_BBIT132 = 50;
+	public static final int MIPS_INS_BC = 51;
+	public static final int MIPS_INS_BC0F = 52;
+	public static final int MIPS_INS_BC0FL = 53;
+	public static final int MIPS_INS_BC0T = 54;
+	public static final int MIPS_INS_BC0TL = 55;
+	public static final int MIPS_INS_BC1EQZ = 56;
+	public static final int MIPS_INS_BC1F = 57;
+	public static final int MIPS_INS_BC1FL = 58;
+	public static final int MIPS_INS_BC1NEZ = 59;
+	public static final int MIPS_INS_BC1T = 60;
+	public static final int MIPS_INS_BC1TL = 61;
+	public static final int MIPS_INS_BC2EQZ = 62;
+	public static final int MIPS_INS_BC2F = 63;
+	public static final int MIPS_INS_BC2FL = 64;
+	public static final int MIPS_INS_BC2NEZ = 65;
+	public static final int MIPS_INS_BC2T = 66;
+	public static final int MIPS_INS_BC2TL = 67;
+	public static final int MIPS_INS_BC3F = 68;
+	public static final int MIPS_INS_BC3FL = 69;
+	public static final int MIPS_INS_BC3T = 70;
+	public static final int MIPS_INS_BC3TL = 71;
+	public static final int MIPS_INS_BCLRI = 72;
+	public static final int MIPS_INS_BCLR = 73;
+	public static final int MIPS_INS_BEQ = 74;
+	public static final int MIPS_INS_BEQC = 75;
+	public static final int MIPS_INS_BEQL = 76;
+	public static final int MIPS_INS_BEQZ16 = 77;
+	public static final int MIPS_INS_BEQZALC = 78;
+	public static final int MIPS_INS_BEQZC = 79;
+	public static final int MIPS_INS_BGEC = 80;
+	public static final int MIPS_INS_BGEUC = 81;
+	public static final int MIPS_INS_BGEZ = 82;
+	public static final int MIPS_INS_BGEZAL = 83;
+	public static final int MIPS_INS_BGEZALC = 84;
+	public static final int MIPS_INS_BGEZALL = 85;
+	public static final int MIPS_INS_BGEZALS = 86;
+	public static final int MIPS_INS_BGEZC = 87;
+	public static final int MIPS_INS_BGEZL = 88;
+	public static final int MIPS_INS_BGTZ = 89;
+	public static final int MIPS_INS_BGTZALC = 90;
+	public static final int MIPS_INS_BGTZC = 91;
+	public static final int MIPS_INS_BGTZL = 92;
+	public static final int MIPS_INS_BINSLI = 93;
+	public static final int MIPS_INS_BINSL = 94;
+	public static final int MIPS_INS_BINSRI = 95;
+	public static final int MIPS_INS_BINSR = 96;
+	public static final int MIPS_INS_BITREV = 97;
+	public static final int MIPS_INS_BITSWAP = 98;
+	public static final int MIPS_INS_BLEZ = 99;
+	public static final int MIPS_INS_BLEZALC = 100;
+	public static final int MIPS_INS_BLEZC = 101;
+	public static final int MIPS_INS_BLEZL = 102;
+	public static final int MIPS_INS_BLTC = 103;
+	public static final int MIPS_INS_BLTUC = 104;
+	public static final int MIPS_INS_BLTZ = 105;
+	public static final int MIPS_INS_BLTZAL = 106;
+	public static final int MIPS_INS_BLTZALC = 107;
+	public static final int MIPS_INS_BLTZALL = 108;
+	public static final int MIPS_INS_BLTZALS = 109;
+	public static final int MIPS_INS_BLTZC = 110;
+	public static final int MIPS_INS_BLTZL = 111;
+	public static final int MIPS_INS_BMNZI = 112;
+	public static final int MIPS_INS_BMNZ = 113;
+	public static final int MIPS_INS_BMZI = 114;
+	public static final int MIPS_INS_BMZ = 115;
+	public static final int MIPS_INS_BNE = 116;
+	public static final int MIPS_INS_BNEC = 117;
+	public static final int MIPS_INS_BNEGI = 118;
+	public static final int MIPS_INS_BNEG = 119;
+	public static final int MIPS_INS_BNEL = 120;
+	public static final int MIPS_INS_BNEZ16 = 121;
+	public static final int MIPS_INS_BNEZALC = 122;
+	public static final int MIPS_INS_BNEZC = 123;
+	public static final int MIPS_INS_BNVC = 124;
+	public static final int MIPS_INS_BNZ = 125;
+	public static final int MIPS_INS_BOVC = 126;
+	public static final int MIPS_INS_BPOSGE32 = 127;
+	public static final int MIPS_INS_BREAK = 128;
+	public static final int MIPS_INS_BREAK16 = 129;
+	public static final int MIPS_INS_BSELI = 130;
+	public static final int MIPS_INS_BSEL = 131;
+	public static final int MIPS_INS_BSETI = 132;
+	public static final int MIPS_INS_BSET = 133;
+	public static final int MIPS_INS_BZ = 134;
+	public static final int MIPS_INS_BEQZ = 135;
+	public static final int MIPS_INS_B = 136;
+	public static final int MIPS_INS_BNEZ = 137;
+	public static final int MIPS_INS_BTEQZ = 138;
+	public static final int MIPS_INS_BTNEZ = 139;
+	public static final int MIPS_INS_CACHE = 140;
+	public static final int MIPS_INS_CEIL = 141;
+	public static final int MIPS_INS_CEQI = 142;
+	public static final int MIPS_INS_CEQ = 143;
+	public static final int MIPS_INS_CFC1 = 144;
+	public static final int MIPS_INS_CFCMSA = 145;
+	public static final int MIPS_INS_CINS = 146;
+	public static final int MIPS_INS_CINS32 = 147;
+	public static final int MIPS_INS_CLASS = 148;
+	public static final int MIPS_INS_CLEI_S = 149;
+	public static final int MIPS_INS_CLEI_U = 150;
+	public static final int MIPS_INS_CLE_S = 151;
+	public static final int MIPS_INS_CLE_U = 152;
+	public static final int MIPS_INS_CLO = 153;
+	public static final int MIPS_INS_CLTI_S = 154;
+	public static final int MIPS_INS_CLTI_U = 155;
+	public static final int MIPS_INS_CLT_S = 156;
+	public static final int MIPS_INS_CLT_U = 157;
+	public static final int MIPS_INS_CLZ = 158;
+	public static final int MIPS_INS_CMPGDU = 159;
+	public static final int MIPS_INS_CMPGU = 160;
+	public static final int MIPS_INS_CMPU = 161;
+	public static final int MIPS_INS_CMP = 162;
+	public static final int MIPS_INS_COPY_S = 163;
+	public static final int MIPS_INS_COPY_U = 164;
+	public static final int MIPS_INS_CTC1 = 165;
+	public static final int MIPS_INS_CTCMSA = 166;
+	public static final int MIPS_INS_CVT = 167;
+	public static final int MIPS_INS_C = 168;
+	public static final int MIPS_INS_CMPI = 169;
+	public static final int MIPS_INS_DADD = 170;
+	public static final int MIPS_INS_DADDI = 171;
+	public static final int MIPS_INS_DADDIU = 172;
+	public static final int MIPS_INS_DADDU = 173;
+	public static final int MIPS_INS_DAHI = 174;
+	public static final int MIPS_INS_DALIGN = 175;
+	public static final int MIPS_INS_DATI = 176;
+	public static final int MIPS_INS_DAUI = 177;
+	public static final int MIPS_INS_DBITSWAP = 178;
+	public static final int MIPS_INS_DCLO = 179;
+	public static final int MIPS_INS_DCLZ = 180;
+	public static final int MIPS_INS_DDIV = 181;
+	public static final int MIPS_INS_DDIVU = 182;
+	public static final int MIPS_INS_DERET = 183;
+	public static final int MIPS_INS_DEXT = 184;
+	public static final int MIPS_INS_DEXTM = 185;
+	public static final int MIPS_INS_DEXTU = 186;
+	public static final int MIPS_INS_DI = 187;
+	public static final int MIPS_INS_DINS = 188;
+	public static final int MIPS_INS_DINSM = 189;
+	public static final int MIPS_INS_DINSU = 190;
+	public static final int MIPS_INS_DIV = 191;
+	public static final int MIPS_INS_DIVU = 192;
+	public static final int MIPS_INS_DIV_S = 193;
+	public static final int MIPS_INS_DIV_U = 194;
+	public static final int MIPS_INS_DLSA = 195;
+	public static final int MIPS_INS_DMFC0 = 196;
+	public static final int MIPS_INS_DMFC1 = 197;
+	public static final int MIPS_INS_DMFC2 = 198;
+	public static final int MIPS_INS_DMOD = 199;
+	public static final int MIPS_INS_DMODU = 200;
+	public static final int MIPS_INS_DMTC0 = 201;
+	public static final int MIPS_INS_DMTC1 = 202;
+	public static final int MIPS_INS_DMTC2 = 203;
+	public static final int MIPS_INS_DMUH = 204;
+	public static final int MIPS_INS_DMUHU = 205;
+	public static final int MIPS_INS_DMUL = 206;
+	public static final int MIPS_INS_DMULT = 207;
+	public static final int MIPS_INS_DMULTU = 208;
+	public static final int MIPS_INS_DMULU = 209;
+	public static final int MIPS_INS_DOTP_S = 210;
+	public static final int MIPS_INS_DOTP_U = 211;
+	public static final int MIPS_INS_DPADD_S = 212;
+	public static final int MIPS_INS_DPADD_U = 213;
+	public static final int MIPS_INS_DPAQX_SA = 214;
+	public static final int MIPS_INS_DPAQX_S = 215;
+	public static final int MIPS_INS_DPAQ_SA = 216;
+	public static final int MIPS_INS_DPAQ_S = 217;
+	public static final int MIPS_INS_DPAU = 218;
+	public static final int MIPS_INS_DPAX = 219;
+	public static final int MIPS_INS_DPA = 220;
+	public static final int MIPS_INS_DPOP = 221;
+	public static final int MIPS_INS_DPSQX_SA = 222;
+	public static final int MIPS_INS_DPSQX_S = 223;
+	public static final int MIPS_INS_DPSQ_SA = 224;
+	public static final int MIPS_INS_DPSQ_S = 225;
+	public static final int MIPS_INS_DPSUB_S = 226;
+	public static final int MIPS_INS_DPSUB_U = 227;
+	public static final int MIPS_INS_DPSU = 228;
+	public static final int MIPS_INS_DPSX = 229;
+	public static final int MIPS_INS_DPS = 230;
+	public static final int MIPS_INS_DROTR = 231;
+	public static final int MIPS_INS_DROTR32 = 232;
+	public static final int MIPS_INS_DROTRV = 233;
+	public static final int MIPS_INS_DSBH = 234;
+	public static final int MIPS_INS_DSHD = 235;
+	public static final int MIPS_INS_DSLL = 236;
+	public static final int MIPS_INS_DSLL32 = 237;
+	public static final int MIPS_INS_DSLLV = 238;
+	public static final int MIPS_INS_DSRA = 239;
+	public static final int MIPS_INS_DSRA32 = 240;
+	public static final int MIPS_INS_DSRAV = 241;
+	public static final int MIPS_INS_DSRL = 242;
+	public static final int MIPS_INS_DSRL32 = 243;
+	public static final int MIPS_INS_DSRLV = 244;
+	public static final int MIPS_INS_DSUB = 245;
+	public static final int MIPS_INS_DSUBU = 246;
+	public static final int MIPS_INS_EHB = 247;
+	public static final int MIPS_INS_EI = 248;
+	public static final int MIPS_INS_ERET = 249;
+	public static final int MIPS_INS_EXT = 250;
+	public static final int MIPS_INS_EXTP = 251;
+	public static final int MIPS_INS_EXTPDP = 252;
+	public static final int MIPS_INS_EXTPDPV = 253;
+	public static final int MIPS_INS_EXTPV = 254;
+	public static final int MIPS_INS_EXTRV_RS = 255;
+	public static final int MIPS_INS_EXTRV_R = 256;
+	public static final int MIPS_INS_EXTRV_S = 257;
+	public static final int MIPS_INS_EXTRV = 258;
+	public static final int MIPS_INS_EXTR_RS = 259;
+	public static final int MIPS_INS_EXTR_R = 260;
+	public static final int MIPS_INS_EXTR_S = 261;
+	public static final int MIPS_INS_EXTR = 262;
+	public static final int MIPS_INS_EXTS = 263;
+	public static final int MIPS_INS_EXTS32 = 264;
+	public static final int MIPS_INS_ABS = 265;
+	public static final int MIPS_INS_FADD = 266;
+	public static final int MIPS_INS_FCAF = 267;
+	public static final int MIPS_INS_FCEQ = 268;
+	public static final int MIPS_INS_FCLASS = 269;
+	public static final int MIPS_INS_FCLE = 270;
+	public static final int MIPS_INS_FCLT = 271;
+	public static final int MIPS_INS_FCNE = 272;
+	public static final int MIPS_INS_FCOR = 273;
+	public static final int MIPS_INS_FCUEQ = 274;
+	public static final int MIPS_INS_FCULE = 275;
+	public static final int MIPS_INS_FCULT = 276;
+	public static final int MIPS_INS_FCUNE = 277;
+	public static final int MIPS_INS_FCUN = 278;
+	public static final int MIPS_INS_FDIV = 279;
+	public static final int MIPS_INS_FEXDO = 280;
+	public static final int MIPS_INS_FEXP2 = 281;
+	public static final int MIPS_INS_FEXUPL = 282;
+	public static final int MIPS_INS_FEXUPR = 283;
+	public static final int MIPS_INS_FFINT_S = 284;
+	public static final int MIPS_INS_FFINT_U = 285;
+	public static final int MIPS_INS_FFQL = 286;
+	public static final int MIPS_INS_FFQR = 287;
+	public static final int MIPS_INS_FILL = 288;
+	public static final int MIPS_INS_FLOG2 = 289;
+	public static final int MIPS_INS_FLOOR = 290;
+	public static final int MIPS_INS_FMADD = 291;
+	public static final int MIPS_INS_FMAX_A = 292;
+	public static final int MIPS_INS_FMAX = 293;
+	public static final int MIPS_INS_FMIN_A = 294;
+	public static final int MIPS_INS_FMIN = 295;
+	public static final int MIPS_INS_MOV = 296;
+	public static final int MIPS_INS_FMSUB = 297;
+	public static final int MIPS_INS_FMUL = 298;
+	public static final int MIPS_INS_MUL = 299;
+	public static final int MIPS_INS_NEG = 300;
+	public static final int MIPS_INS_FRCP = 301;
+	public static final int MIPS_INS_FRINT = 302;
+	public static final int MIPS_INS_FRSQRT = 303;
+	public static final int MIPS_INS_FSAF = 304;
+	public static final int MIPS_INS_FSEQ = 305;
+	public static final int MIPS_INS_FSLE = 306;
+	public static final int MIPS_INS_FSLT = 307;
+	public static final int MIPS_INS_FSNE = 308;
+	public static final int MIPS_INS_FSOR = 309;
+	public static final int MIPS_INS_FSQRT = 310;
+	public static final int MIPS_INS_SQRT = 311;
+	public static final int MIPS_INS_FSUB = 312;
+	public static final int MIPS_INS_SUB = 313;
+	public static final int MIPS_INS_FSUEQ = 314;
+	public static final int MIPS_INS_FSULE = 315;
+	public static final int MIPS_INS_FSULT = 316;
+	public static final int MIPS_INS_FSUNE = 317;
+	public static final int MIPS_INS_FSUN = 318;
+	public static final int MIPS_INS_FTINT_S = 319;
+	public static final int MIPS_INS_FTINT_U = 320;
+	public static final int MIPS_INS_FTQ = 321;
+	public static final int MIPS_INS_FTRUNC_S = 322;
+	public static final int MIPS_INS_FTRUNC_U = 323;
+	public static final int MIPS_INS_HADD_S = 324;
+	public static final int MIPS_INS_HADD_U = 325;
+	public static final int MIPS_INS_HSUB_S = 326;
+	public static final int MIPS_INS_HSUB_U = 327;
+	public static final int MIPS_INS_ILVEV = 328;
+	public static final int MIPS_INS_ILVL = 329;
+	public static final int MIPS_INS_ILVOD = 330;
+	public static final int MIPS_INS_ILVR = 331;
+	public static final int MIPS_INS_INS = 332;
+	public static final int MIPS_INS_INSERT = 333;
+	public static final int MIPS_INS_INSV = 334;
+	public static final int MIPS_INS_INSVE = 335;
+	public static final int MIPS_INS_J = 336;
+	public static final int MIPS_INS_JAL = 337;
+	public static final int MIPS_INS_JALR = 338;
+	public static final int MIPS_INS_JALRS16 = 339;
+	public static final int MIPS_INS_JALRS = 340;
+	public static final int MIPS_INS_JALS = 341;
+	public static final int MIPS_INS_JALX = 342;
+	public static final int MIPS_INS_JIALC = 343;
+	public static final int MIPS_INS_JIC = 344;
+	public static final int MIPS_INS_JR = 345;
+	public static final int MIPS_INS_JR16 = 346;
+	public static final int MIPS_INS_JRADDIUSP = 347;
+	public static final int MIPS_INS_JRC = 348;
+	public static final int MIPS_INS_JALRC = 349;
+	public static final int MIPS_INS_LB = 350;
+	public static final int MIPS_INS_LBU16 = 351;
+	public static final int MIPS_INS_LBUX = 352;
+	public static final int MIPS_INS_LBU = 353;
+	public static final int MIPS_INS_LD = 354;
+	public static final int MIPS_INS_LDC1 = 355;
+	public static final int MIPS_INS_LDC2 = 356;
+	public static final int MIPS_INS_LDC3 = 357;
+	public static final int MIPS_INS_LDI = 358;
+	public static final int MIPS_INS_LDL = 359;
+	public static final int MIPS_INS_LDPC = 360;
+	public static final int MIPS_INS_LDR = 361;
+	public static final int MIPS_INS_LDXC1 = 362;
+	public static final int MIPS_INS_LH = 363;
+	public static final int MIPS_INS_LHU16 = 364;
+	public static final int MIPS_INS_LHX = 365;
+	public static final int MIPS_INS_LHU = 366;
+	public static final int MIPS_INS_LI16 = 367;
+	public static final int MIPS_INS_LL = 368;
+	public static final int MIPS_INS_LLD = 369;
+	public static final int MIPS_INS_LSA = 370;
+	public static final int MIPS_INS_LUXC1 = 371;
+	public static final int MIPS_INS_LUI = 372;
+	public static final int MIPS_INS_LW = 373;
+	public static final int MIPS_INS_LW16 = 374;
+	public static final int MIPS_INS_LWC1 = 375;
+	public static final int MIPS_INS_LWC2 = 376;
+	public static final int MIPS_INS_LWC3 = 377;
+	public static final int MIPS_INS_LWL = 378;
+	public static final int MIPS_INS_LWM16 = 379;
+	public static final int MIPS_INS_LWM32 = 380;
+	public static final int MIPS_INS_LWPC = 381;
+	public static final int MIPS_INS_LWP = 382;
+	public static final int MIPS_INS_LWR = 383;
+	public static final int MIPS_INS_LWUPC = 384;
+	public static final int MIPS_INS_LWU = 385;
+	public static final int MIPS_INS_LWX = 386;
+	public static final int MIPS_INS_LWXC1 = 387;
+	public static final int MIPS_INS_LWXS = 388;
+	public static final int MIPS_INS_LI = 389;
+	public static final int MIPS_INS_MADD = 390;
+	public static final int MIPS_INS_MADDF = 391;
+	public static final int MIPS_INS_MADDR_Q = 392;
+	public static final int MIPS_INS_MADDU = 393;
+	public static final int MIPS_INS_MADDV = 394;
+	public static final int MIPS_INS_MADD_Q = 395;
+	public static final int MIPS_INS_MAQ_SA = 396;
+	public static final int MIPS_INS_MAQ_S = 397;
+	public static final int MIPS_INS_MAXA = 398;
+	public static final int MIPS_INS_MAXI_S = 399;
+	public static final int MIPS_INS_MAXI_U = 400;
+	public static final int MIPS_INS_MAX_A = 401;
+	public static final int MIPS_INS_MAX = 402;
+	public static final int MIPS_INS_MAX_S = 403;
+	public static final int MIPS_INS_MAX_U = 404;
+	public static final int MIPS_INS_MFC0 = 405;
+	public static final int MIPS_INS_MFC1 = 406;
+	public static final int MIPS_INS_MFC2 = 407;
+	public static final int MIPS_INS_MFHC1 = 408;
+	public static final int MIPS_INS_MFHI = 409;
+	public static final int MIPS_INS_MFLO = 410;
+	public static final int MIPS_INS_MINA = 411;
+	public static final int MIPS_INS_MINI_S = 412;
+	public static final int MIPS_INS_MINI_U = 413;
+	public static final int MIPS_INS_MIN_A = 414;
+	public static final int MIPS_INS_MIN = 415;
+	public static final int MIPS_INS_MIN_S = 416;
+	public static final int MIPS_INS_MIN_U = 417;
+	public static final int MIPS_INS_MOD = 418;
+	public static final int MIPS_INS_MODSUB = 419;
+	public static final int MIPS_INS_MODU = 420;
+	public static final int MIPS_INS_MOD_S = 421;
+	public static final int MIPS_INS_MOD_U = 422;
+	public static final int MIPS_INS_MOVE = 423;
+	public static final int MIPS_INS_MOVEP = 424;
+	public static final int MIPS_INS_MOVF = 425;
+	public static final int MIPS_INS_MOVN = 426;
+	public static final int MIPS_INS_MOVT = 427;
+	public static final int MIPS_INS_MOVZ = 428;
+	public static final int MIPS_INS_MSUB = 429;
+	public static final int MIPS_INS_MSUBF = 430;
+	public static final int MIPS_INS_MSUBR_Q = 431;
+	public static final int MIPS_INS_MSUBU = 432;
+	public static final int MIPS_INS_MSUBV = 433;
+	public static final int MIPS_INS_MSUB_Q = 434;
+	public static final int MIPS_INS_MTC0 = 435;
+	public static final int MIPS_INS_MTC1 = 436;
+	public static final int MIPS_INS_MTC2 = 437;
+	public static final int MIPS_INS_MTHC1 = 438;
+	public static final int MIPS_INS_MTHI = 439;
+	public static final int MIPS_INS_MTHLIP = 440;
+	public static final int MIPS_INS_MTLO = 441;
+	public static final int MIPS_INS_MTM0 = 442;
+	public static final int MIPS_INS_MTM1 = 443;
+	public static final int MIPS_INS_MTM2 = 444;
+	public static final int MIPS_INS_MTP0 = 445;
+	public static final int MIPS_INS_MTP1 = 446;
+	public static final int MIPS_INS_MTP2 = 447;
+	public static final int MIPS_INS_MUH = 448;
+	public static final int MIPS_INS_MUHU = 449;
+	public static final int MIPS_INS_MULEQ_S = 450;
+	public static final int MIPS_INS_MULEU_S = 451;
+	public static final int MIPS_INS_MULQ_RS = 452;
+	public static final int MIPS_INS_MULQ_S = 453;
+	public static final int MIPS_INS_MULR_Q = 454;
+	public static final int MIPS_INS_MULSAQ_S = 455;
+	public static final int MIPS_INS_MULSA = 456;
+	public static final int MIPS_INS_MULT = 457;
+	public static final int MIPS_INS_MULTU = 458;
+	public static final int MIPS_INS_MULU = 459;
+	public static final int MIPS_INS_MULV = 460;
+	public static final int MIPS_INS_MUL_Q = 461;
+	public static final int MIPS_INS_MUL_S = 462;
+	public static final int MIPS_INS_NLOC = 463;
+	public static final int MIPS_INS_NLZC = 464;
+	public static final int MIPS_INS_NMADD = 465;
+	public static final int MIPS_INS_NMSUB = 466;
+	public static final int MIPS_INS_NOR = 467;
+	public static final int MIPS_INS_NORI = 468;
+	public static final int MIPS_INS_NOT16 = 469;
+	public static final int MIPS_INS_NOT = 470;
+	public static final int MIPS_INS_OR = 471;
+	public static final int MIPS_INS_OR16 = 472;
+	public static final int MIPS_INS_ORI = 473;
+	public static final int MIPS_INS_PACKRL = 474;
+	public static final int MIPS_INS_PAUSE = 475;
+	public static final int MIPS_INS_PCKEV = 476;
+	public static final int MIPS_INS_PCKOD = 477;
+	public static final int MIPS_INS_PCNT = 478;
+	public static final int MIPS_INS_PICK = 479;
+	public static final int MIPS_INS_POP = 480;
+	public static final int MIPS_INS_PRECEQU = 481;
+	public static final int MIPS_INS_PRECEQ = 482;
+	public static final int MIPS_INS_PRECEU = 483;
+	public static final int MIPS_INS_PRECRQU_S = 484;
+	public static final int MIPS_INS_PRECRQ = 485;
+	public static final int MIPS_INS_PRECRQ_RS = 486;
+	public static final int MIPS_INS_PRECR = 487;
+	public static final int MIPS_INS_PRECR_SRA = 488;
+	public static final int MIPS_INS_PRECR_SRA_R = 489;
+	public static final int MIPS_INS_PREF = 490;
+	public static final int MIPS_INS_PREPEND = 491;
+	public static final int MIPS_INS_RADDU = 492;
+	public static final int MIPS_INS_RDDSP = 493;
+	public static final int MIPS_INS_RDHWR = 494;
+	public static final int MIPS_INS_REPLV = 495;
+	public static final int MIPS_INS_REPL = 496;
+	public static final int MIPS_INS_RINT = 497;
+	public static final int MIPS_INS_ROTR = 498;
+	public static final int MIPS_INS_ROTRV = 499;
+	public static final int MIPS_INS_ROUND = 500;
+	public static final int MIPS_INS_SAT_S = 501;
+	public static final int MIPS_INS_SAT_U = 502;
+	public static final int MIPS_INS_SB = 503;
+	public static final int MIPS_INS_SB16 = 504;
+	public static final int MIPS_INS_SC = 505;
+	public static final int MIPS_INS_SCD = 506;
+	public static final int MIPS_INS_SD = 507;
+	public static final int MIPS_INS_SDBBP = 508;
+	public static final int MIPS_INS_SDBBP16 = 509;
+	public static final int MIPS_INS_SDC1 = 510;
+	public static final int MIPS_INS_SDC2 = 511;
+	public static final int MIPS_INS_SDC3 = 512;
+	public static final int MIPS_INS_SDL = 513;
+	public static final int MIPS_INS_SDR = 514;
+	public static final int MIPS_INS_SDXC1 = 515;
+	public static final int MIPS_INS_SEB = 516;
+	public static final int MIPS_INS_SEH = 517;
+	public static final int MIPS_INS_SELEQZ = 518;
+	public static final int MIPS_INS_SELNEZ = 519;
+	public static final int MIPS_INS_SEL = 520;
+	public static final int MIPS_INS_SEQ = 521;
+	public static final int MIPS_INS_SEQI = 522;
+	public static final int MIPS_INS_SH = 523;
+	public static final int MIPS_INS_SH16 = 524;
+	public static final int MIPS_INS_SHF = 525;
+	public static final int MIPS_INS_SHILO = 526;
+	public static final int MIPS_INS_SHILOV = 527;
+	public static final int MIPS_INS_SHLLV = 528;
+	public static final int MIPS_INS_SHLLV_S = 529;
+	public static final int MIPS_INS_SHLL = 530;
+	public static final int MIPS_INS_SHLL_S = 531;
+	public static final int MIPS_INS_SHRAV = 532;
+	public static final int MIPS_INS_SHRAV_R = 533;
+	public static final int MIPS_INS_SHRA = 534;
+	public static final int MIPS_INS_SHRA_R = 535;
+	public static final int MIPS_INS_SHRLV = 536;
+	public static final int MIPS_INS_SHRL = 537;
+	public static final int MIPS_INS_SLDI = 538;
+	public static final int MIPS_INS_SLD = 539;
+	public static final int MIPS_INS_SLL = 540;
+	public static final int MIPS_INS_SLL16 = 541;
+	public static final int MIPS_INS_SLLI = 542;
+	public static final int MIPS_INS_SLLV = 543;
+	public static final int MIPS_INS_SLT = 544;
+	public static final int MIPS_INS_SLTI = 545;
+	public static final int MIPS_INS_SLTIU = 546;
+	public static final int MIPS_INS_SLTU = 547;
+	public static final int MIPS_INS_SNE = 548;
+	public static final int MIPS_INS_SNEI = 549;
+	public static final int MIPS_INS_SPLATI = 550;
+	public static final int MIPS_INS_SPLAT = 551;
+	public static final int MIPS_INS_SRA = 552;
+	public static final int MIPS_INS_SRAI = 553;
+	public static final int MIPS_INS_SRARI = 554;
+	public static final int MIPS_INS_SRAR = 555;
+	public static final int MIPS_INS_SRAV = 556;
+	public static final int MIPS_INS_SRL = 557;
+	public static final int MIPS_INS_SRL16 = 558;
+	public static final int MIPS_INS_SRLI = 559;
+	public static final int MIPS_INS_SRLRI = 560;
+	public static final int MIPS_INS_SRLR = 561;
+	public static final int MIPS_INS_SRLV = 562;
+	public static final int MIPS_INS_SSNOP = 563;
+	public static final int MIPS_INS_ST = 564;
+	public static final int MIPS_INS_SUBQH = 565;
+	public static final int MIPS_INS_SUBQH_R = 566;
+	public static final int MIPS_INS_SUBQ = 567;
+	public static final int MIPS_INS_SUBQ_S = 568;
+	public static final int MIPS_INS_SUBSUS_U = 569;
+	public static final int MIPS_INS_SUBSUU_S = 570;
+	public static final int MIPS_INS_SUBS_S = 571;
+	public static final int MIPS_INS_SUBS_U = 572;
+	public static final int MIPS_INS_SUBU16 = 573;
+	public static final int MIPS_INS_SUBUH = 574;
+	public static final int MIPS_INS_SUBUH_R = 575;
+	public static final int MIPS_INS_SUBU = 576;
+	public static final int MIPS_INS_SUBU_S = 577;
+	public static final int MIPS_INS_SUBVI = 578;
+	public static final int MIPS_INS_SUBV = 579;
+	public static final int MIPS_INS_SUXC1 = 580;
+	public static final int MIPS_INS_SW = 581;
+	public static final int MIPS_INS_SW16 = 582;
+	public static final int MIPS_INS_SWC1 = 583;
+	public static final int MIPS_INS_SWC2 = 584;
+	public static final int MIPS_INS_SWC3 = 585;
+	public static final int MIPS_INS_SWL = 586;
+	public static final int MIPS_INS_SWM16 = 587;
+	public static final int MIPS_INS_SWM32 = 588;
+	public static final int MIPS_INS_SWP = 589;
+	public static final int MIPS_INS_SWR = 590;
+	public static final int MIPS_INS_SWXC1 = 591;
+	public static final int MIPS_INS_SYNC = 592;
+	public static final int MIPS_INS_SYNCI = 593;
+	public static final int MIPS_INS_SYSCALL = 594;
+	public static final int MIPS_INS_TEQ = 595;
+	public static final int MIPS_INS_TEQI = 596;
+	public static final int MIPS_INS_TGE = 597;
+	public static final int MIPS_INS_TGEI = 598;
+	public static final int MIPS_INS_TGEIU = 599;
+	public static final int MIPS_INS_TGEU = 600;
+	public static final int MIPS_INS_TLBP = 601;
+	public static final int MIPS_INS_TLBR = 602;
+	public static final int MIPS_INS_TLBWI = 603;
+	public static final int MIPS_INS_TLBWR = 604;
+	public static final int MIPS_INS_TLT = 605;
+	public static final int MIPS_INS_TLTI = 606;
+	public static final int MIPS_INS_TLTIU = 607;
+	public static final int MIPS_INS_TLTU = 608;
+	public static final int MIPS_INS_TNE = 609;
+	public static final int MIPS_INS_TNEI = 610;
+	public static final int MIPS_INS_TRUNC = 611;
+	public static final int MIPS_INS_V3MULU = 612;
+	public static final int MIPS_INS_VMM0 = 613;
+	public static final int MIPS_INS_VMULU = 614;
+	public static final int MIPS_INS_VSHF = 615;
+	public static final int MIPS_INS_WAIT = 616;
+	public static final int MIPS_INS_WRDSP = 617;
+	public static final int MIPS_INS_WSBH = 618;
+	public static final int MIPS_INS_XOR = 619;
+	public static final int MIPS_INS_XOR16 = 620;
+	public static final int MIPS_INS_XORI = 621;
+
+	// some alias instructions
+	public static final int MIPS_INS_NOP = 622;
+	public static final int MIPS_INS_NEGU = 623;
+
+	// special instructions
+	public static final int MIPS_INS_JALR_HB = 624;
+	public static final int MIPS_INS_JR_HB = 625;
+	public static final int MIPS_INS_ENDING = 626;
+
+	public static final int MIPS_GRP_INVALID = 0;
+	public static final int MIPS_GRP_JUMP = 1;
+	public static final int MIPS_GRP_CALL = 2;
+	public static final int MIPS_GRP_RET = 3;
+	public static final int MIPS_GRP_INT = 4;
+	public static final int MIPS_GRP_IRET = 5;
+	public static final int MIPS_GRP_PRIVILEGE = 6;
+	public static final int MIPS_GRP_BRANCH_RELATIVE = 7;
+	public static final int MIPS_GRP_BITCOUNT = 128;
+	public static final int MIPS_GRP_DSP = 129;
+	public static final int MIPS_GRP_DSPR2 = 130;
+	public static final int MIPS_GRP_FPIDX = 131;
+	public static final int MIPS_GRP_MSA = 132;
+	public static final int MIPS_GRP_MIPS32R2 = 133;
+	public static final int MIPS_GRP_MIPS64 = 134;
+	public static final int MIPS_GRP_MIPS64R2 = 135;
+	public static final int MIPS_GRP_SEINREG = 136;
+	public static final int MIPS_GRP_STDENC = 137;
+	public static final int MIPS_GRP_SWAP = 138;
+	public static final int MIPS_GRP_MICROMIPS = 139;
+	public static final int MIPS_GRP_MIPS16MODE = 140;
+	public static final int MIPS_GRP_FP64BIT = 141;
+	public static final int MIPS_GRP_NONANSFPMATH = 142;
+	public static final int MIPS_GRP_NOTFP64BIT = 143;
+	public static final int MIPS_GRP_NOTINMICROMIPS = 144;
+	public static final int MIPS_GRP_NOTNACL = 145;
+	public static final int MIPS_GRP_NOTMIPS32R6 = 146;
+	public static final int MIPS_GRP_NOTMIPS64R6 = 147;
+	public static final int MIPS_GRP_CNMIPS = 148;
+	public static final int MIPS_GRP_MIPS32 = 149;
+	public static final int MIPS_GRP_MIPS32R6 = 150;
+	public static final int MIPS_GRP_MIPS64R6 = 151;
+	public static final int MIPS_GRP_MIPS2 = 152;
+	public static final int MIPS_GRP_MIPS3 = 153;
+	public static final int MIPS_GRP_MIPS3_32 = 154;
+	public static final int MIPS_GRP_MIPS3_32R2 = 155;
+	public static final int MIPS_GRP_MIPS4_32 = 156;
+	public static final int MIPS_GRP_MIPS4_32R2 = 157;
+	public static final int MIPS_GRP_MIPS5_32R2 = 158;
+	public static final int MIPS_GRP_GP32BIT = 159;
+	public static final int MIPS_GRP_GP64BIT = 160;
+	public static final int MIPS_GRP_ENDING = 161;
+}

thirdparty/capstone/bindings/java/capstone/Ppc.java

@@ -0,0 +1,109 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Ppc_const.*;
+
+public class Ppc {
+
+  public static class MemType extends Structure {
+    public int base;
+    public int disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "disp");
+    }
+  }
+
+  public static class CrxType extends Structure {
+    public int scale;
+    public int reg;
+    public int cond;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("scale", "reg", "cond");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public long imm;
+    public MemType mem;
+    public CrxType crx;
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+
+    public void read() {
+      readField("type");
+      if (type == PPC_OP_MEM)
+        value.setType(MemType.class);
+      if (type == PPC_OP_CRX)
+        value.setType(CrxType.class);
+      if (type == PPC_OP_IMM || type == PPC_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == PPC_OP_INVALID)
+        return;
+      readField("value");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public int bc;
+    public int bh;
+    public byte update_cr0;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[8];
+    }
+
+    public void read() {
+      readField("bc");
+      readField("bh");
+      readField("update_cr0");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("bc", "bh", "update_cr0", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public int bc;
+    public int bh;
+    public boolean updateCr0;
+
+    public Operand [] op;
+
+    public OpInfo(UnionOpInfo op_info) {
+      bc = op_info.bc;
+      bh = op_info.bh;
+      updateCr0 = (op_info.update_cr0 > 0);
+      op = op_info.op;
+    }
+  }
+}

thirdparty/capstone/bindings/java/capstone/Sparc.java

@@ -0,0 +1,92 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Sparc_const.*;
+
+public class Sparc {
+
+  public static class MemType extends Structure {
+    public byte base;
+    public byte index;
+    public int disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "index", "disp");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public int imm;
+    public MemType mem;
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+
+    public void read() {
+      readField("type");
+      if (type == SPARC_OP_MEM)
+        value.setType(MemType.class);
+      if (type == SPARC_OP_IMM || type == SPARC_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == SPARC_OP_INVALID)
+        return;
+      readField("value");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public int cc;
+    public int hint;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[4];
+    }
+
+    public void read() {
+      readField("cc");
+      readField("hint");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("cc", "hint", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public int cc;
+    public int hint;
+
+    public Operand [] op;
+
+    public OpInfo(UnionOpInfo op_info) {
+      cc = op_info.cc;
+      hint = op_info.hint;
+      op = op_info.op;
+    }
+  }
+}

thirdparty/capstone/bindings/java/capstone/Sparc_const.java

@@ -0,0 +1,433 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Sparc_const {
+
+	public static final int SPARC_CC_INVALID = 0;
+	public static final int SPARC_CC_ICC_A = 8+256;
+	public static final int SPARC_CC_ICC_N = 0+256;
+	public static final int SPARC_CC_ICC_NE = 9+256;
+	public static final int SPARC_CC_ICC_E = 1+256;
+	public static final int SPARC_CC_ICC_G = 10+256;
+	public static final int SPARC_CC_ICC_LE = 2+256;
+	public static final int SPARC_CC_ICC_GE = 11+256;
+	public static final int SPARC_CC_ICC_L = 3+256;
+	public static final int SPARC_CC_ICC_GU = 12+256;
+	public static final int SPARC_CC_ICC_LEU = 4+256;
+	public static final int SPARC_CC_ICC_CC = 13+256;
+	public static final int SPARC_CC_ICC_CS = 5+256;
+	public static final int SPARC_CC_ICC_POS = 14+256;
+	public static final int SPARC_CC_ICC_NEG = 6+256;
+	public static final int SPARC_CC_ICC_VC = 15+256;
+	public static final int SPARC_CC_ICC_VS = 7+256;
+	public static final int SPARC_CC_FCC_A = 8+16+256;
+	public static final int SPARC_CC_FCC_N = 0+16+256;
+	public static final int SPARC_CC_FCC_U = 7+16+256;
+	public static final int SPARC_CC_FCC_G = 6+16+256;
+	public static final int SPARC_CC_FCC_UG = 5+16+256;
+	public static final int SPARC_CC_FCC_L = 4+16+256;
+	public static final int SPARC_CC_FCC_UL = 3+16+256;
+	public static final int SPARC_CC_FCC_LG = 2+16+256;
+	public static final int SPARC_CC_FCC_NE = 1+16+256;
+	public static final int SPARC_CC_FCC_E = 9+16+256;
+	public static final int SPARC_CC_FCC_UE = 10+16+256;
+	public static final int SPARC_CC_FCC_GE = 11+16+256;
+	public static final int SPARC_CC_FCC_UGE = 12+16+256;
+	public static final int SPARC_CC_FCC_LE = 13+16+256;
+	public static final int SPARC_CC_FCC_ULE = 14+16+256;
+	public static final int SPARC_CC_FCC_O = 15+16+256;
+
+	public static final int SPARC_HINT_INVALID = 0;
+	public static final int SPARC_HINT_A = 1<<0;
+	public static final int SPARC_HINT_PT = 1<<1;
+	public static final int SPARC_HINT_PN = 1<<2;
+
+	public static final int SPARC_OP_INVALID = 0;
+	public static final int SPARC_OP_REG = 1;
+	public static final int SPARC_OP_IMM = 2;
+	public static final int SPARC_OP_MEM = 3;
+
+	public static final int SPARC_REG_INVALID = 0;
+	public static final int SPARC_REG_F0 = 1;
+	public static final int SPARC_REG_F1 = 2;
+	public static final int SPARC_REG_F2 = 3;
+	public static final int SPARC_REG_F3 = 4;
+	public static final int SPARC_REG_F4 = 5;
+	public static final int SPARC_REG_F5 = 6;
+	public static final int SPARC_REG_F6 = 7;
+	public static final int SPARC_REG_F7 = 8;
+	public static final int SPARC_REG_F8 = 9;
+	public static final int SPARC_REG_F9 = 10;
+	public static final int SPARC_REG_F10 = 11;
+	public static final int SPARC_REG_F11 = 12;
+	public static final int SPARC_REG_F12 = 13;
+	public static final int SPARC_REG_F13 = 14;
+	public static final int SPARC_REG_F14 = 15;
+	public static final int SPARC_REG_F15 = 16;
+	public static final int SPARC_REG_F16 = 17;
+	public static final int SPARC_REG_F17 = 18;
+	public static final int SPARC_REG_F18 = 19;
+	public static final int SPARC_REG_F19 = 20;
+	public static final int SPARC_REG_F20 = 21;
+	public static final int SPARC_REG_F21 = 22;
+	public static final int SPARC_REG_F22 = 23;
+	public static final int SPARC_REG_F23 = 24;
+	public static final int SPARC_REG_F24 = 25;
+	public static final int SPARC_REG_F25 = 26;
+	public static final int SPARC_REG_F26 = 27;
+	public static final int SPARC_REG_F27 = 28;
+	public static final int SPARC_REG_F28 = 29;
+	public static final int SPARC_REG_F29 = 30;
+	public static final int SPARC_REG_F30 = 31;
+	public static final int SPARC_REG_F31 = 32;
+	public static final int SPARC_REG_F32 = 33;
+	public static final int SPARC_REG_F34 = 34;
+	public static final int SPARC_REG_F36 = 35;
+	public static final int SPARC_REG_F38 = 36;
+	public static final int SPARC_REG_F40 = 37;
+	public static final int SPARC_REG_F42 = 38;
+	public static final int SPARC_REG_F44 = 39;
+	public static final int SPARC_REG_F46 = 40;
+	public static final int SPARC_REG_F48 = 41;
+	public static final int SPARC_REG_F50 = 42;
+	public static final int SPARC_REG_F52 = 43;
+	public static final int SPARC_REG_F54 = 44;
+	public static final int SPARC_REG_F56 = 45;
+	public static final int SPARC_REG_F58 = 46;
+	public static final int SPARC_REG_F60 = 47;
+	public static final int SPARC_REG_F62 = 48;
+	public static final int SPARC_REG_FCC0 = 49;
+	public static final int SPARC_REG_FCC1 = 50;
+	public static final int SPARC_REG_FCC2 = 51;
+	public static final int SPARC_REG_FCC3 = 52;
+	public static final int SPARC_REG_FP = 53;
+	public static final int SPARC_REG_G0 = 54;
+	public static final int SPARC_REG_G1 = 55;
+	public static final int SPARC_REG_G2 = 56;
+	public static final int SPARC_REG_G3 = 57;
+	public static final int SPARC_REG_G4 = 58;
+	public static final int SPARC_REG_G5 = 59;
+	public static final int SPARC_REG_G6 = 60;
+	public static final int SPARC_REG_G7 = 61;
+	public static final int SPARC_REG_I0 = 62;
+	public static final int SPARC_REG_I1 = 63;
+	public static final int SPARC_REG_I2 = 64;
+	public static final int SPARC_REG_I3 = 65;
+	public static final int SPARC_REG_I4 = 66;
+	public static final int SPARC_REG_I5 = 67;
+	public static final int SPARC_REG_I7 = 68;
+	public static final int SPARC_REG_ICC = 69;
+	public static final int SPARC_REG_L0 = 70;
+	public static final int SPARC_REG_L1 = 71;
+	public static final int SPARC_REG_L2 = 72;
+	public static final int SPARC_REG_L3 = 73;
+	public static final int SPARC_REG_L4 = 74;
+	public static final int SPARC_REG_L5 = 75;
+	public static final int SPARC_REG_L6 = 76;
+	public static final int SPARC_REG_L7 = 77;
+	public static final int SPARC_REG_O0 = 78;
+	public static final int SPARC_REG_O1 = 79;
+	public static final int SPARC_REG_O2 = 80;
+	public static final int SPARC_REG_O3 = 81;
+	public static final int SPARC_REG_O4 = 82;
+	public static final int SPARC_REG_O5 = 83;
+	public static final int SPARC_REG_O7 = 84;
+	public static final int SPARC_REG_SP = 85;
+	public static final int SPARC_REG_Y = 86;
+	public static final int SPARC_REG_XCC = 87;
+	public static final int SPARC_REG_ENDING = 88;
+	public static final int SPARC_REG_O6 = SPARC_REG_SP;
+	public static final int SPARC_REG_I6 = SPARC_REG_FP;
+
+	public static final int SPARC_INS_INVALID = 0;
+	public static final int SPARC_INS_ADDCC = 1;
+	public static final int SPARC_INS_ADDX = 2;
+	public static final int SPARC_INS_ADDXCC = 3;
+	public static final int SPARC_INS_ADDXC = 4;
+	public static final int SPARC_INS_ADDXCCC = 5;
+	public static final int SPARC_INS_ADD = 6;
+	public static final int SPARC_INS_ALIGNADDR = 7;
+	public static final int SPARC_INS_ALIGNADDRL = 8;
+	public static final int SPARC_INS_ANDCC = 9;
+	public static final int SPARC_INS_ANDNCC = 10;
+	public static final int SPARC_INS_ANDN = 11;
+	public static final int SPARC_INS_AND = 12;
+	public static final int SPARC_INS_ARRAY16 = 13;
+	public static final int SPARC_INS_ARRAY32 = 14;
+	public static final int SPARC_INS_ARRAY8 = 15;
+	public static final int SPARC_INS_B = 16;
+	public static final int SPARC_INS_JMP = 17;
+	public static final int SPARC_INS_BMASK = 18;
+	public static final int SPARC_INS_FB = 19;
+	public static final int SPARC_INS_BRGEZ = 20;
+	public static final int SPARC_INS_BRGZ = 21;
+	public static final int SPARC_INS_BRLEZ = 22;
+	public static final int SPARC_INS_BRLZ = 23;
+	public static final int SPARC_INS_BRNZ = 24;
+	public static final int SPARC_INS_BRZ = 25;
+	public static final int SPARC_INS_BSHUFFLE = 26;
+	public static final int SPARC_INS_CALL = 27;
+	public static final int SPARC_INS_CASX = 28;
+	public static final int SPARC_INS_CAS = 29;
+	public static final int SPARC_INS_CMASK16 = 30;
+	public static final int SPARC_INS_CMASK32 = 31;
+	public static final int SPARC_INS_CMASK8 = 32;
+	public static final int SPARC_INS_CMP = 33;
+	public static final int SPARC_INS_EDGE16 = 34;
+	public static final int SPARC_INS_EDGE16L = 35;
+	public static final int SPARC_INS_EDGE16LN = 36;
+	public static final int SPARC_INS_EDGE16N = 37;
+	public static final int SPARC_INS_EDGE32 = 38;
+	public static final int SPARC_INS_EDGE32L = 39;
+	public static final int SPARC_INS_EDGE32LN = 40;
+	public static final int SPARC_INS_EDGE32N = 41;
+	public static final int SPARC_INS_EDGE8 = 42;
+	public static final int SPARC_INS_EDGE8L = 43;
+	public static final int SPARC_INS_EDGE8LN = 44;
+	public static final int SPARC_INS_EDGE8N = 45;
+	public static final int SPARC_INS_FABSD = 46;
+	public static final int SPARC_INS_FABSQ = 47;
+	public static final int SPARC_INS_FABSS = 48;
+	public static final int SPARC_INS_FADDD = 49;
+	public static final int SPARC_INS_FADDQ = 50;
+	public static final int SPARC_INS_FADDS = 51;
+	public static final int SPARC_INS_FALIGNDATA = 52;
+	public static final int SPARC_INS_FAND = 53;
+	public static final int SPARC_INS_FANDNOT1 = 54;
+	public static final int SPARC_INS_FANDNOT1S = 55;
+	public static final int SPARC_INS_FANDNOT2 = 56;
+	public static final int SPARC_INS_FANDNOT2S = 57;
+	public static final int SPARC_INS_FANDS = 58;
+	public static final int SPARC_INS_FCHKSM16 = 59;
+	public static final int SPARC_INS_FCMPD = 60;
+	public static final int SPARC_INS_FCMPEQ16 = 61;
+	public static final int SPARC_INS_FCMPEQ32 = 62;
+	public static final int SPARC_INS_FCMPGT16 = 63;
+	public static final int SPARC_INS_FCMPGT32 = 64;
+	public static final int SPARC_INS_FCMPLE16 = 65;
+	public static final int SPARC_INS_FCMPLE32 = 66;
+	public static final int SPARC_INS_FCMPNE16 = 67;
+	public static final int SPARC_INS_FCMPNE32 = 68;
+	public static final int SPARC_INS_FCMPQ = 69;
+	public static final int SPARC_INS_FCMPS = 70;
+	public static final int SPARC_INS_FDIVD = 71;
+	public static final int SPARC_INS_FDIVQ = 72;
+	public static final int SPARC_INS_FDIVS = 73;
+	public static final int SPARC_INS_FDMULQ = 74;
+	public static final int SPARC_INS_FDTOI = 75;
+	public static final int SPARC_INS_FDTOQ = 76;
+	public static final int SPARC_INS_FDTOS = 77;
+	public static final int SPARC_INS_FDTOX = 78;
+	public static final int SPARC_INS_FEXPAND = 79;
+	public static final int SPARC_INS_FHADDD = 80;
+	public static final int SPARC_INS_FHADDS = 81;
+	public static final int SPARC_INS_FHSUBD = 82;
+	public static final int SPARC_INS_FHSUBS = 83;
+	public static final int SPARC_INS_FITOD = 84;
+	public static final int SPARC_INS_FITOQ = 85;
+	public static final int SPARC_INS_FITOS = 86;
+	public static final int SPARC_INS_FLCMPD = 87;
+	public static final int SPARC_INS_FLCMPS = 88;
+	public static final int SPARC_INS_FLUSHW = 89;
+	public static final int SPARC_INS_FMEAN16 = 90;
+	public static final int SPARC_INS_FMOVD = 91;
+	public static final int SPARC_INS_FMOVQ = 92;
+	public static final int SPARC_INS_FMOVRDGEZ = 93;
+	public static final int SPARC_INS_FMOVRQGEZ = 94;
+	public static final int SPARC_INS_FMOVRSGEZ = 95;
+	public static final int SPARC_INS_FMOVRDGZ = 96;
+	public static final int SPARC_INS_FMOVRQGZ = 97;
+	public static final int SPARC_INS_FMOVRSGZ = 98;
+	public static final int SPARC_INS_FMOVRDLEZ = 99;
+	public static final int SPARC_INS_FMOVRQLEZ = 100;
+	public static final int SPARC_INS_FMOVRSLEZ = 101;
+	public static final int SPARC_INS_FMOVRDLZ = 102;
+	public static final int SPARC_INS_FMOVRQLZ = 103;
+	public static final int SPARC_INS_FMOVRSLZ = 104;
+	public static final int SPARC_INS_FMOVRDNZ = 105;
+	public static final int SPARC_INS_FMOVRQNZ = 106;
+	public static final int SPARC_INS_FMOVRSNZ = 107;
+	public static final int SPARC_INS_FMOVRDZ = 108;
+	public static final int SPARC_INS_FMOVRQZ = 109;
+	public static final int SPARC_INS_FMOVRSZ = 110;
+	public static final int SPARC_INS_FMOVS = 111;
+	public static final int SPARC_INS_FMUL8SUX16 = 112;
+	public static final int SPARC_INS_FMUL8ULX16 = 113;
+	public static final int SPARC_INS_FMUL8X16 = 114;
+	public static final int SPARC_INS_FMUL8X16AL = 115;
+	public static final int SPARC_INS_FMUL8X16AU = 116;
+	public static final int SPARC_INS_FMULD = 117;
+	public static final int SPARC_INS_FMULD8SUX16 = 118;
+	public static final int SPARC_INS_FMULD8ULX16 = 119;
+	public static final int SPARC_INS_FMULQ = 120;
+	public static final int SPARC_INS_FMULS = 121;
+	public static final int SPARC_INS_FNADDD = 122;
+	public static final int SPARC_INS_FNADDS = 123;
+	public static final int SPARC_INS_FNAND = 124;
+	public static final int SPARC_INS_FNANDS = 125;
+	public static final int SPARC_INS_FNEGD = 126;
+	public static final int SPARC_INS_FNEGQ = 127;
+	public static final int SPARC_INS_FNEGS = 128;
+	public static final int SPARC_INS_FNHADDD = 129;
+	public static final int SPARC_INS_FNHADDS = 130;
+	public static final int SPARC_INS_FNOR = 131;
+	public static final int SPARC_INS_FNORS = 132;
+	public static final int SPARC_INS_FNOT1 = 133;
+	public static final int SPARC_INS_FNOT1S = 134;
+	public static final int SPARC_INS_FNOT2 = 135;
+	public static final int SPARC_INS_FNOT2S = 136;
+	public static final int SPARC_INS_FONE = 137;
+	public static final int SPARC_INS_FONES = 138;
+	public static final int SPARC_INS_FOR = 139;
+	public static final int SPARC_INS_FORNOT1 = 140;
+	public static final int SPARC_INS_FORNOT1S = 141;
+	public static final int SPARC_INS_FORNOT2 = 142;
+	public static final int SPARC_INS_FORNOT2S = 143;
+	public static final int SPARC_INS_FORS = 144;
+	public static final int SPARC_INS_FPACK16 = 145;
+	public static final int SPARC_INS_FPACK32 = 146;
+	public static final int SPARC_INS_FPACKFIX = 147;
+	public static final int SPARC_INS_FPADD16 = 148;
+	public static final int SPARC_INS_FPADD16S = 149;
+	public static final int SPARC_INS_FPADD32 = 150;
+	public static final int SPARC_INS_FPADD32S = 151;
+	public static final int SPARC_INS_FPADD64 = 152;
+	public static final int SPARC_INS_FPMERGE = 153;
+	public static final int SPARC_INS_FPSUB16 = 154;
+	public static final int SPARC_INS_FPSUB16S = 155;
+	public static final int SPARC_INS_FPSUB32 = 156;
+	public static final int SPARC_INS_FPSUB32S = 157;
+	public static final int SPARC_INS_FQTOD = 158;
+	public static final int SPARC_INS_FQTOI = 159;
+	public static final int SPARC_INS_FQTOS = 160;
+	public static final int SPARC_INS_FQTOX = 161;
+	public static final int SPARC_INS_FSLAS16 = 162;
+	public static final int SPARC_INS_FSLAS32 = 163;
+	public static final int SPARC_INS_FSLL16 = 164;
+	public static final int SPARC_INS_FSLL32 = 165;
+	public static final int SPARC_INS_FSMULD = 166;
+	public static final int SPARC_INS_FSQRTD = 167;
+	public static final int SPARC_INS_FSQRTQ = 168;
+	public static final int SPARC_INS_FSQRTS = 169;
+	public static final int SPARC_INS_FSRA16 = 170;
+	public static final int SPARC_INS_FSRA32 = 171;
+	public static final int SPARC_INS_FSRC1 = 172;
+	public static final int SPARC_INS_FSRC1S = 173;
+	public static final int SPARC_INS_FSRC2 = 174;
+	public static final int SPARC_INS_FSRC2S = 175;
+	public static final int SPARC_INS_FSRL16 = 176;
+	public static final int SPARC_INS_FSRL32 = 177;
+	public static final int SPARC_INS_FSTOD = 178;
+	public static final int SPARC_INS_FSTOI = 179;
+	public static final int SPARC_INS_FSTOQ = 180;
+	public static final int SPARC_INS_FSTOX = 181;
+	public static final int SPARC_INS_FSUBD = 182;
+	public static final int SPARC_INS_FSUBQ = 183;
+	public static final int SPARC_INS_FSUBS = 184;
+	public static final int SPARC_INS_FXNOR = 185;
+	public static final int SPARC_INS_FXNORS = 186;
+	public static final int SPARC_INS_FXOR = 187;
+	public static final int SPARC_INS_FXORS = 188;
+	public static final int SPARC_INS_FXTOD = 189;
+	public static final int SPARC_INS_FXTOQ = 190;
+	public static final int SPARC_INS_FXTOS = 191;
+	public static final int SPARC_INS_FZERO = 192;
+	public static final int SPARC_INS_FZEROS = 193;
+	public static final int SPARC_INS_JMPL = 194;
+	public static final int SPARC_INS_LDD = 195;
+	public static final int SPARC_INS_LD = 196;
+	public static final int SPARC_INS_LDQ = 197;
+	public static final int SPARC_INS_LDSB = 198;
+	public static final int SPARC_INS_LDSH = 199;
+	public static final int SPARC_INS_LDSW = 200;
+	public static final int SPARC_INS_LDUB = 201;
+	public static final int SPARC_INS_LDUH = 202;
+	public static final int SPARC_INS_LDX = 203;
+	public static final int SPARC_INS_LZCNT = 204;
+	public static final int SPARC_INS_MEMBAR = 205;
+	public static final int SPARC_INS_MOVDTOX = 206;
+	public static final int SPARC_INS_MOV = 207;
+	public static final int SPARC_INS_MOVRGEZ = 208;
+	public static final int SPARC_INS_MOVRGZ = 209;
+	public static final int SPARC_INS_MOVRLEZ = 210;
+	public static final int SPARC_INS_MOVRLZ = 211;
+	public static final int SPARC_INS_MOVRNZ = 212;
+	public static final int SPARC_INS_MOVRZ = 213;
+	public static final int SPARC_INS_MOVSTOSW = 214;
+	public static final int SPARC_INS_MOVSTOUW = 215;
+	public static final int SPARC_INS_MULX = 216;
+	public static final int SPARC_INS_NOP = 217;
+	public static final int SPARC_INS_ORCC = 218;
+	public static final int SPARC_INS_ORNCC = 219;
+	public static final int SPARC_INS_ORN = 220;
+	public static final int SPARC_INS_OR = 221;
+	public static final int SPARC_INS_PDIST = 222;
+	public static final int SPARC_INS_PDISTN = 223;
+	public static final int SPARC_INS_POPC = 224;
+	public static final int SPARC_INS_RD = 225;
+	public static final int SPARC_INS_RESTORE = 226;
+	public static final int SPARC_INS_RETT = 227;
+	public static final int SPARC_INS_SAVE = 228;
+	public static final int SPARC_INS_SDIVCC = 229;
+	public static final int SPARC_INS_SDIVX = 230;
+	public static final int SPARC_INS_SDIV = 231;
+	public static final int SPARC_INS_SETHI = 232;
+	public static final int SPARC_INS_SHUTDOWN = 233;
+	public static final int SPARC_INS_SIAM = 234;
+	public static final int SPARC_INS_SLLX = 235;
+	public static final int SPARC_INS_SLL = 236;
+	public static final int SPARC_INS_SMULCC = 237;
+	public static final int SPARC_INS_SMUL = 238;
+	public static final int SPARC_INS_SRAX = 239;
+	public static final int SPARC_INS_SRA = 240;
+	public static final int SPARC_INS_SRLX = 241;
+	public static final int SPARC_INS_SRL = 242;
+	public static final int SPARC_INS_STBAR = 243;
+	public static final int SPARC_INS_STB = 244;
+	public static final int SPARC_INS_STD = 245;
+	public static final int SPARC_INS_ST = 246;
+	public static final int SPARC_INS_STH = 247;
+	public static final int SPARC_INS_STQ = 248;
+	public static final int SPARC_INS_STX = 249;
+	public static final int SPARC_INS_SUBCC = 250;
+	public static final int SPARC_INS_SUBX = 251;
+	public static final int SPARC_INS_SUBXCC = 252;
+	public static final int SPARC_INS_SUB = 253;
+	public static final int SPARC_INS_SWAP = 254;
+	public static final int SPARC_INS_TADDCCTV = 255;
+	public static final int SPARC_INS_TADDCC = 256;
+	public static final int SPARC_INS_T = 257;
+	public static final int SPARC_INS_TSUBCCTV = 258;
+	public static final int SPARC_INS_TSUBCC = 259;
+	public static final int SPARC_INS_UDIVCC = 260;
+	public static final int SPARC_INS_UDIVX = 261;
+	public static final int SPARC_INS_UDIV = 262;
+	public static final int SPARC_INS_UMULCC = 263;
+	public static final int SPARC_INS_UMULXHI = 264;
+	public static final int SPARC_INS_UMUL = 265;
+	public static final int SPARC_INS_UNIMP = 266;
+	public static final int SPARC_INS_FCMPED = 267;
+	public static final int SPARC_INS_FCMPEQ = 268;
+	public static final int SPARC_INS_FCMPES = 269;
+	public static final int SPARC_INS_WR = 270;
+	public static final int SPARC_INS_XMULX = 271;
+	public static final int SPARC_INS_XMULXHI = 272;
+	public static final int SPARC_INS_XNORCC = 273;
+	public static final int SPARC_INS_XNOR = 274;
+	public static final int SPARC_INS_XORCC = 275;
+	public static final int SPARC_INS_XOR = 276;
+	public static final int SPARC_INS_RET = 277;
+	public static final int SPARC_INS_RETL = 278;
+	public static final int SPARC_INS_ENDING = 279;
+
+	public static final int SPARC_GRP_INVALID = 0;
+	public static final int SPARC_GRP_JUMP = 1;
+	public static final int SPARC_GRP_HARDQUAD = 128;
+	public static final int SPARC_GRP_V9 = 129;
+	public static final int SPARC_GRP_VIS = 130;
+	public static final int SPARC_GRP_VIS2 = 131;
+	public static final int SPARC_GRP_VIS3 = 132;
+	public static final int SPARC_GRP_32BIT = 133;
+	public static final int SPARC_GRP_64BIT = 134;
+	public static final int SPARC_GRP_ENDING = 135;
+}

thirdparty/capstone/bindings/java/capstone/Systemz.java

@@ -0,0 +1,91 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Sysz_const.*;
+
+public class Systemz {
+
+  public static class MemType extends Structure {
+    public byte base;
+    public byte index;
+    public long length;
+    public long disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "index", "length", "disp");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public long imm;
+    public MemType mem;
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+
+    public void read() {
+      readField("type");
+      if (type == SYSZ_OP_MEM)
+        value.setType(MemType.class);
+      if (type == SYSZ_OP_IMM)
+        value.setType(Long.TYPE);
+      if (type == SYSZ_OP_REG || type == SYSZ_OP_ACREG)
+        value.setType(Integer.TYPE);
+      if (type == SYSZ_OP_INVALID)
+        return;
+      readField("value");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public int cc;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[6];
+    }
+
+    public void read() {
+      readField("cc");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("cc", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public int cc;
+
+    public Operand [] op;
+
+    public OpInfo(UnionOpInfo op_info) {
+      cc = op_info.cc;
+      op = op_info.op;
+    }
+  }
+}

thirdparty/capstone/bindings/java/capstone/TMS320C64x_const.java

@@ -0,0 +1,281 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class TMS320C64x_const {
+
+	public static final int TMS320C64X_OP_INVALID = 0;
+	public static final int TMS320C64X_OP_REG = 1;
+	public static final int TMS320C64X_OP_IMM = 2;
+	public static final int TMS320C64X_OP_MEM = 3;
+	public static final int TMS320C64X_OP_REGPAIR = 64;
+
+	public static final int TMS320C64X_MEM_DISP_INVALID = 0;
+	public static final int TMS320C64X_MEM_DISP_CONSTANT = 1;
+	public static final int TMS320C64X_MEM_DISP_REGISTER = 2;
+
+	public static final int TMS320C64X_MEM_DIR_INVALID = 0;
+	public static final int TMS320C64X_MEM_DIR_FW = 1;
+	public static final int TMS320C64X_MEM_DIR_BW = 2;
+
+	public static final int TMS320C64X_MEM_MOD_INVALID = 0;
+	public static final int TMS320C64X_MEM_MOD_NO = 1;
+	public static final int TMS320C64X_MEM_MOD_PRE = 2;
+	public static final int TMS320C64X_MEM_MOD_POST = 3;
+
+	public static final int TMS320C64X_REG_INVALID = 0;
+	public static final int TMS320C64X_REG_AMR = 1;
+	public static final int TMS320C64X_REG_CSR = 2;
+	public static final int TMS320C64X_REG_DIER = 3;
+	public static final int TMS320C64X_REG_DNUM = 4;
+	public static final int TMS320C64X_REG_ECR = 5;
+	public static final int TMS320C64X_REG_GFPGFR = 6;
+	public static final int TMS320C64X_REG_GPLYA = 7;
+	public static final int TMS320C64X_REG_GPLYB = 8;
+	public static final int TMS320C64X_REG_ICR = 9;
+	public static final int TMS320C64X_REG_IER = 10;
+	public static final int TMS320C64X_REG_IERR = 11;
+	public static final int TMS320C64X_REG_ILC = 12;
+	public static final int TMS320C64X_REG_IRP = 13;
+	public static final int TMS320C64X_REG_ISR = 14;
+	public static final int TMS320C64X_REG_ISTP = 15;
+	public static final int TMS320C64X_REG_ITSR = 16;
+	public static final int TMS320C64X_REG_NRP = 17;
+	public static final int TMS320C64X_REG_NTSR = 18;
+	public static final int TMS320C64X_REG_REP = 19;
+	public static final int TMS320C64X_REG_RILC = 20;
+	public static final int TMS320C64X_REG_SSR = 21;
+	public static final int TMS320C64X_REG_TSCH = 22;
+	public static final int TMS320C64X_REG_TSCL = 23;
+	public static final int TMS320C64X_REG_TSR = 24;
+	public static final int TMS320C64X_REG_A0 = 25;
+	public static final int TMS320C64X_REG_A1 = 26;
+	public static final int TMS320C64X_REG_A2 = 27;
+	public static final int TMS320C64X_REG_A3 = 28;
+	public static final int TMS320C64X_REG_A4 = 29;
+	public static final int TMS320C64X_REG_A5 = 30;
+	public static final int TMS320C64X_REG_A6 = 31;
+	public static final int TMS320C64X_REG_A7 = 32;
+	public static final int TMS320C64X_REG_A8 = 33;
+	public static final int TMS320C64X_REG_A9 = 34;
+	public static final int TMS320C64X_REG_A10 = 35;
+	public static final int TMS320C64X_REG_A11 = 36;
+	public static final int TMS320C64X_REG_A12 = 37;
+	public static final int TMS320C64X_REG_A13 = 38;
+	public static final int TMS320C64X_REG_A14 = 39;
+	public static final int TMS320C64X_REG_A15 = 40;
+	public static final int TMS320C64X_REG_A16 = 41;
+	public static final int TMS320C64X_REG_A17 = 42;
+	public static final int TMS320C64X_REG_A18 = 43;
+	public static final int TMS320C64X_REG_A19 = 44;
+	public static final int TMS320C64X_REG_A20 = 45;
+	public static final int TMS320C64X_REG_A21 = 46;
+	public static final int TMS320C64X_REG_A22 = 47;
+	public static final int TMS320C64X_REG_A23 = 48;
+	public static final int TMS320C64X_REG_A24 = 49;
+	public static final int TMS320C64X_REG_A25 = 50;
+	public static final int TMS320C64X_REG_A26 = 51;
+	public static final int TMS320C64X_REG_A27 = 52;
+	public static final int TMS320C64X_REG_A28 = 53;
+	public static final int TMS320C64X_REG_A29 = 54;
+	public static final int TMS320C64X_REG_A30 = 55;
+	public static final int TMS320C64X_REG_A31 = 56;
+	public static final int TMS320C64X_REG_B0 = 57;
+	public static final int TMS320C64X_REG_B1 = 58;
+	public static final int TMS320C64X_REG_B2 = 59;
+	public static final int TMS320C64X_REG_B3 = 60;
+	public static final int TMS320C64X_REG_B4 = 61;
+	public static final int TMS320C64X_REG_B5 = 62;
+	public static final int TMS320C64X_REG_B6 = 63;
+	public static final int TMS320C64X_REG_B7 = 64;
+	public static final int TMS320C64X_REG_B8 = 65;
+	public static final int TMS320C64X_REG_B9 = 66;
+	public static final int TMS320C64X_REG_B10 = 67;
+	public static final int TMS320C64X_REG_B11 = 68;
+	public static final int TMS320C64X_REG_B12 = 69;
+	public static final int TMS320C64X_REG_B13 = 70;
+	public static final int TMS320C64X_REG_B14 = 71;
+	public static final int TMS320C64X_REG_B15 = 72;
+	public static final int TMS320C64X_REG_B16 = 73;
+	public static final int TMS320C64X_REG_B17 = 74;
+	public static final int TMS320C64X_REG_B18 = 75;
+	public static final int TMS320C64X_REG_B19 = 76;
+	public static final int TMS320C64X_REG_B20 = 77;
+	public static final int TMS320C64X_REG_B21 = 78;
+	public static final int TMS320C64X_REG_B22 = 79;
+	public static final int TMS320C64X_REG_B23 = 80;
+	public static final int TMS320C64X_REG_B24 = 81;
+	public static final int TMS320C64X_REG_B25 = 82;
+	public static final int TMS320C64X_REG_B26 = 83;
+	public static final int TMS320C64X_REG_B27 = 84;
+	public static final int TMS320C64X_REG_B28 = 85;
+	public static final int TMS320C64X_REG_B29 = 86;
+	public static final int TMS320C64X_REG_B30 = 87;
+	public static final int TMS320C64X_REG_B31 = 88;
+	public static final int TMS320C64X_REG_PCE1 = 89;
+	public static final int TMS320C64X_REG_ENDING = 90;
+	public static final int TMS320C64X_REG_EFR = TMS320C64X_REG_ECR;
+	public static final int TMS320C64X_REG_IFR = TMS320C64X_REG_ISR;
+
+	public static final int TMS320C64X_INS_INVALID = 0;
+	public static final int TMS320C64X_INS_ABS = 1;
+	public static final int TMS320C64X_INS_ABS2 = 2;
+	public static final int TMS320C64X_INS_ADD = 3;
+	public static final int TMS320C64X_INS_ADD2 = 4;
+	public static final int TMS320C64X_INS_ADD4 = 5;
+	public static final int TMS320C64X_INS_ADDAB = 6;
+	public static final int TMS320C64X_INS_ADDAD = 7;
+	public static final int TMS320C64X_INS_ADDAH = 8;
+	public static final int TMS320C64X_INS_ADDAW = 9;
+	public static final int TMS320C64X_INS_ADDK = 10;
+	public static final int TMS320C64X_INS_ADDKPC = 11;
+	public static final int TMS320C64X_INS_ADDU = 12;
+	public static final int TMS320C64X_INS_AND = 13;
+	public static final int TMS320C64X_INS_ANDN = 14;
+	public static final int TMS320C64X_INS_AVG2 = 15;
+	public static final int TMS320C64X_INS_AVGU4 = 16;
+	public static final int TMS320C64X_INS_B = 17;
+	public static final int TMS320C64X_INS_BDEC = 18;
+	public static final int TMS320C64X_INS_BITC4 = 19;
+	public static final int TMS320C64X_INS_BNOP = 20;
+	public static final int TMS320C64X_INS_BPOS = 21;
+	public static final int TMS320C64X_INS_CLR = 22;
+	public static final int TMS320C64X_INS_CMPEQ = 23;
+	public static final int TMS320C64X_INS_CMPEQ2 = 24;
+	public static final int TMS320C64X_INS_CMPEQ4 = 25;
+	public static final int TMS320C64X_INS_CMPGT = 26;
+	public static final int TMS320C64X_INS_CMPGT2 = 27;
+	public static final int TMS320C64X_INS_CMPGTU4 = 28;
+	public static final int TMS320C64X_INS_CMPLT = 29;
+	public static final int TMS320C64X_INS_CMPLTU = 30;
+	public static final int TMS320C64X_INS_DEAL = 31;
+	public static final int TMS320C64X_INS_DOTP2 = 32;
+	public static final int TMS320C64X_INS_DOTPN2 = 33;
+	public static final int TMS320C64X_INS_DOTPNRSU2 = 34;
+	public static final int TMS320C64X_INS_DOTPRSU2 = 35;
+	public static final int TMS320C64X_INS_DOTPSU4 = 36;
+	public static final int TMS320C64X_INS_DOTPU4 = 37;
+	public static final int TMS320C64X_INS_EXT = 38;
+	public static final int TMS320C64X_INS_EXTU = 39;
+	public static final int TMS320C64X_INS_GMPGTU = 40;
+	public static final int TMS320C64X_INS_GMPY4 = 41;
+	public static final int TMS320C64X_INS_LDB = 42;
+	public static final int TMS320C64X_INS_LDBU = 43;
+	public static final int TMS320C64X_INS_LDDW = 44;
+	public static final int TMS320C64X_INS_LDH = 45;
+	public static final int TMS320C64X_INS_LDHU = 46;
+	public static final int TMS320C64X_INS_LDNDW = 47;
+	public static final int TMS320C64X_INS_LDNW = 48;
+	public static final int TMS320C64X_INS_LDW = 49;
+	public static final int TMS320C64X_INS_LMBD = 50;
+	public static final int TMS320C64X_INS_MAX2 = 51;
+	public static final int TMS320C64X_INS_MAXU4 = 52;
+	public static final int TMS320C64X_INS_MIN2 = 53;
+	public static final int TMS320C64X_INS_MINU4 = 54;
+	public static final int TMS320C64X_INS_MPY = 55;
+	public static final int TMS320C64X_INS_MPY2 = 56;
+	public static final int TMS320C64X_INS_MPYH = 57;
+	public static final int TMS320C64X_INS_MPYHI = 58;
+	public static final int TMS320C64X_INS_MPYHIR = 59;
+	public static final int TMS320C64X_INS_MPYHL = 60;
+	public static final int TMS320C64X_INS_MPYHLU = 61;
+	public static final int TMS320C64X_INS_MPYHSLU = 62;
+	public static final int TMS320C64X_INS_MPYHSU = 63;
+	public static final int TMS320C64X_INS_MPYHU = 64;
+	public static final int TMS320C64X_INS_MPYHULS = 65;
+	public static final int TMS320C64X_INS_MPYHUS = 66;
+	public static final int TMS320C64X_INS_MPYLH = 67;
+	public static final int TMS320C64X_INS_MPYLHU = 68;
+	public static final int TMS320C64X_INS_MPYLI = 69;
+	public static final int TMS320C64X_INS_MPYLIR = 70;
+	public static final int TMS320C64X_INS_MPYLSHU = 71;
+	public static final int TMS320C64X_INS_MPYLUHS = 72;
+	public static final int TMS320C64X_INS_MPYSU = 73;
+	public static final int TMS320C64X_INS_MPYSU4 = 74;
+	public static final int TMS320C64X_INS_MPYU = 75;
+	public static final int TMS320C64X_INS_MPYU4 = 76;
+	public static final int TMS320C64X_INS_MPYUS = 77;
+	public static final int TMS320C64X_INS_MVC = 78;
+	public static final int TMS320C64X_INS_MVD = 79;
+	public static final int TMS320C64X_INS_MVK = 80;
+	public static final int TMS320C64X_INS_MVKL = 81;
+	public static final int TMS320C64X_INS_MVKLH = 82;
+	public static final int TMS320C64X_INS_NOP = 83;
+	public static final int TMS320C64X_INS_NORM = 84;
+	public static final int TMS320C64X_INS_OR = 85;
+	public static final int TMS320C64X_INS_PACK2 = 86;
+	public static final int TMS320C64X_INS_PACKH2 = 87;
+	public static final int TMS320C64X_INS_PACKH4 = 88;
+	public static final int TMS320C64X_INS_PACKHL2 = 89;
+	public static final int TMS320C64X_INS_PACKL4 = 90;
+	public static final int TMS320C64X_INS_PACKLH2 = 91;
+	public static final int TMS320C64X_INS_ROTL = 92;
+	public static final int TMS320C64X_INS_SADD = 93;
+	public static final int TMS320C64X_INS_SADD2 = 94;
+	public static final int TMS320C64X_INS_SADDU4 = 95;
+	public static final int TMS320C64X_INS_SADDUS2 = 96;
+	public static final int TMS320C64X_INS_SAT = 97;
+	public static final int TMS320C64X_INS_SET = 98;
+	public static final int TMS320C64X_INS_SHFL = 99;
+	public static final int TMS320C64X_INS_SHL = 100;
+	public static final int TMS320C64X_INS_SHLMB = 101;
+	public static final int TMS320C64X_INS_SHR = 102;
+	public static final int TMS320C64X_INS_SHR2 = 103;
+	public static final int TMS320C64X_INS_SHRMB = 104;
+	public static final int TMS320C64X_INS_SHRU = 105;
+	public static final int TMS320C64X_INS_SHRU2 = 106;
+	public static final int TMS320C64X_INS_SMPY = 107;
+	public static final int TMS320C64X_INS_SMPY2 = 108;
+	public static final int TMS320C64X_INS_SMPYH = 109;
+	public static final int TMS320C64X_INS_SMPYHL = 110;
+	public static final int TMS320C64X_INS_SMPYLH = 111;
+	public static final int TMS320C64X_INS_SPACK2 = 112;
+	public static final int TMS320C64X_INS_SPACKU4 = 113;
+	public static final int TMS320C64X_INS_SSHL = 114;
+	public static final int TMS320C64X_INS_SSHVL = 115;
+	public static final int TMS320C64X_INS_SSHVR = 116;
+	public static final int TMS320C64X_INS_SSUB = 117;
+	public static final int TMS320C64X_INS_STB = 118;
+	public static final int TMS320C64X_INS_STDW = 119;
+	public static final int TMS320C64X_INS_STH = 120;
+	public static final int TMS320C64X_INS_STNDW = 121;
+	public static final int TMS320C64X_INS_STNW = 122;
+	public static final int TMS320C64X_INS_STW = 123;
+	public static final int TMS320C64X_INS_SUB = 124;
+	public static final int TMS320C64X_INS_SUB2 = 125;
+	public static final int TMS320C64X_INS_SUB4 = 126;
+	public static final int TMS320C64X_INS_SUBAB = 127;
+	public static final int TMS320C64X_INS_SUBABS4 = 128;
+	public static final int TMS320C64X_INS_SUBAH = 129;
+	public static final int TMS320C64X_INS_SUBAW = 130;
+	public static final int TMS320C64X_INS_SUBC = 131;
+	public static final int TMS320C64X_INS_SUBU = 132;
+	public static final int TMS320C64X_INS_SWAP4 = 133;
+	public static final int TMS320C64X_INS_UNPKHU4 = 134;
+	public static final int TMS320C64X_INS_UNPKLU4 = 135;
+	public static final int TMS320C64X_INS_XOR = 136;
+	public static final int TMS320C64X_INS_XPND2 = 137;
+	public static final int TMS320C64X_INS_XPND4 = 138;
+	public static final int TMS320C64X_INS_IDLE = 139;
+	public static final int TMS320C64X_INS_MV = 140;
+	public static final int TMS320C64X_INS_NEG = 141;
+	public static final int TMS320C64X_INS_NOT = 142;
+	public static final int TMS320C64X_INS_SWAP2 = 143;
+	public static final int TMS320C64X_INS_ZERO = 144;
+	public static final int TMS320C64X_INS_ENDING = 145;
+
+	public static final int TMS320C64X_GRP_INVALID = 0;
+	public static final int TMS320C64X_GRP_JUMP = 1;
+	public static final int TMS320C64X_GRP_FUNIT_D = 128;
+	public static final int TMS320C64X_GRP_FUNIT_L = 129;
+	public static final int TMS320C64X_GRP_FUNIT_M = 130;
+	public static final int TMS320C64X_GRP_FUNIT_S = 131;
+	public static final int TMS320C64X_GRP_FUNIT_NO = 132;
+	public static final int TMS320C64X_GRP_ENDING = 133;
+
+	public static final int TMS320C64X_FUNIT_INVALID = 0;
+	public static final int TMS320C64X_FUNIT_D = 1;
+	public static final int TMS320C64X_FUNIT_L = 2;
+	public static final int TMS320C64X_FUNIT_M = 3;
+	public static final int TMS320C64X_FUNIT_S = 4;
+	public static final int TMS320C64X_FUNIT_NO = 5;
+}

thirdparty/capstone/bindings/java/capstone/Wasm_const.java

@@ -0,0 +1,195 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Wasm_const {
+
+	public static final int WASM_OP_INVALID = 0;
+	public static final int WASM_OP_NONE = 1;
+	public static final int WASM_OP_INT7 = 2;
+	public static final int WASM_OP_VARUINT32 = 3;
+	public static final int WASM_OP_VARUINT64 = 4;
+	public static final int WASM_OP_UINT32 = 5;
+	public static final int WASM_OP_UINT64 = 6;
+	public static final int WASM_OP_IMM = 7;
+	public static final int WASM_OP_BRTABLE = 8;
+	public static final int WASM_INS_UNREACHABLE = 0x0;
+	public static final int WASM_INS_NOP = 0x1;
+	public static final int WASM_INS_BLOCK = 0x2;
+	public static final int WASM_INS_LOOP = 0x3;
+	public static final int WASM_INS_IF = 0x4;
+	public static final int WASM_INS_ELSE = 0x5;
+	public static final int WASM_INS_END = 0xb;
+	public static final int WASM_INS_BR = 0xc;
+	public static final int WASM_INS_BR_IF = 0xd;
+	public static final int WASM_INS_BR_TABLE = 0xe;
+	public static final int WASM_INS_RETURN = 0xf;
+	public static final int WASM_INS_CALL = 0x10;
+	public static final int WASM_INS_CALL_INDIRECT = 0x11;
+	public static final int WASM_INS_DROP = 0x1a;
+	public static final int WASM_INS_SELECT = 0x1b;
+	public static final int WASM_INS_GET_LOCAL = 0x20;
+	public static final int WASM_INS_SET_LOCAL = 0x21;
+	public static final int WASM_INS_TEE_LOCAL = 0x22;
+	public static final int WASM_INS_GET_GLOBAL = 0x23;
+	public static final int WASM_INS_SET_GLOBAL = 0x24;
+	public static final int WASM_INS_I32_LOAD = 0x28;
+	public static final int WASM_INS_I64_LOAD = 0x29;
+	public static final int WASM_INS_F32_LOAD = 0x2a;
+	public static final int WASM_INS_F64_LOAD = 0x2b;
+	public static final int WASM_INS_I32_LOAD8_S = 0x2c;
+	public static final int WASM_INS_I32_LOAD8_U = 0x2d;
+	public static final int WASM_INS_I32_LOAD16_S = 0x2e;
+	public static final int WASM_INS_I32_LOAD16_U = 0x2f;
+	public static final int WASM_INS_I64_LOAD8_S = 0x30;
+	public static final int WASM_INS_I64_LOAD8_U = 0x31;
+	public static final int WASM_INS_I64_LOAD16_S = 0x32;
+	public static final int WASM_INS_I64_LOAD16_U = 0x33;
+	public static final int WASM_INS_I64_LOAD32_S = 0x34;
+	public static final int WASM_INS_I64_LOAD32_U = 0x35;
+	public static final int WASM_INS_I32_STORE = 0x36;
+	public static final int WASM_INS_I64_STORE = 0x37;
+	public static final int WASM_INS_F32_STORE = 0x38;
+	public static final int WASM_INS_F64_STORE = 0x39;
+	public static final int WASM_INS_I32_STORE8 = 0x3a;
+	public static final int WASM_INS_I32_STORE16 = 0x3b;
+	public static final int WASM_INS_I64_STORE8 = 0x3c;
+	public static final int WASM_INS_I64_STORE16 = 0x3d;
+	public static final int WASM_INS_I64_STORE32 = 0x3e;
+	public static final int WASM_INS_CURRENT_MEMORY = 0x3f;
+	public static final int WASM_INS_GROW_MEMORY = 0x40;
+	public static final int WASM_INS_I32_CONST = 0x41;
+	public static final int WASM_INS_I64_CONST = 0x42;
+	public static final int WASM_INS_F32_CONST = 0x43;
+	public static final int WASM_INS_F64_CONST = 0x44;
+	public static final int WASM_INS_I32_EQZ = 0x45;
+	public static final int WASM_INS_I32_EQ = 0x46;
+	public static final int WASM_INS_I32_NE = 0x47;
+	public static final int WASM_INS_I32_LT_S = 0x48;
+	public static final int WASM_INS_I32_LT_U = 0x49;
+	public static final int WASM_INS_I32_GT_S = 0x4a;
+	public static final int WASM_INS_I32_GT_U = 0x4b;
+	public static final int WASM_INS_I32_LE_S = 0x4c;
+	public static final int WASM_INS_I32_LE_U = 0x4d;
+	public static final int WASM_INS_I32_GE_S = 0x4e;
+	public static final int WASM_INS_I32_GE_U = 0x4f;
+	public static final int WASM_INS_I64_EQZ = 0x50;
+	public static final int WASM_INS_I64_EQ = 0x51;
+	public static final int WASM_INS_I64_NE = 0x52;
+	public static final int WASM_INS_I64_LT_S = 0x53;
+	public static final int WASM_INS_I64_LT_U = 0x54;
+	public static final int WASM_INS_I64_GT_U = 0x56;
+	public static final int WASM_INS_I64_LE_S = 0x57;
+	public static final int WASM_INS_I64_LE_U = 0x58;
+	public static final int WASM_INS_I64_GE_S = 0x59;
+	public static final int WASM_INS_I64_GE_U = 0x5a;
+	public static final int WASM_INS_F32_EQ = 0x5b;
+	public static final int WASM_INS_F32_NE = 0x5c;
+	public static final int WASM_INS_F32_LT = 0x5d;
+	public static final int WASM_INS_F32_GT = 0x5e;
+	public static final int WASM_INS_F32_LE = 0x5f;
+	public static final int WASM_INS_F32_GE = 0x60;
+	public static final int WASM_INS_F64_EQ = 0x61;
+	public static final int WASM_INS_F64_NE = 0x62;
+	public static final int WASM_INS_F64_LT = 0x63;
+	public static final int WASM_INS_F64_GT = 0x64;
+	public static final int WASM_INS_F64_LE = 0x65;
+	public static final int WASM_INS_F64_GE = 0x66;
+	public static final int WASM_INS_I32_CLZ = 0x67;
+	public static final int WASM_INS_I32_CTZ = 0x68;
+	public static final int WASM_INS_I32_POPCNT = 0x69;
+	public static final int WASM_INS_I32_ADD = 0x6a;
+	public static final int WASM_INS_I32_SUB = 0x6b;
+	public static final int WASM_INS_I32_MUL = 0x6c;
+	public static final int WASM_INS_I32_DIV_S = 0x6d;
+	public static final int WASM_INS_I32_DIV_U = 0x6e;
+	public static final int WASM_INS_I32_REM_S = 0x6f;
+	public static final int WASM_INS_I32_REM_U = 0x70;
+	public static final int WASM_INS_I32_AND = 0x71;
+	public static final int WASM_INS_I32_OR = 0x72;
+	public static final int WASM_INS_I32_XOR = 0x73;
+	public static final int WASM_INS_I32_SHL = 0x74;
+	public static final int WASM_INS_I32_SHR_S = 0x75;
+	public static final int WASM_INS_I32_SHR_U = 0x76;
+	public static final int WASM_INS_I32_ROTL = 0x77;
+	public static final int WASM_INS_I32_ROTR = 0x78;
+	public static final int WASM_INS_I64_CLZ = 0x79;
+	public static final int WASM_INS_I64_CTZ = 0x7a;
+	public static final int WASM_INS_I64_POPCNT = 0x7b;
+	public static final int WASM_INS_I64_ADD = 0x7c;
+	public static final int WASM_INS_I64_SUB = 0x7d;
+	public static final int WASM_INS_I64_MUL = 0x7e;
+	public static final int WASM_INS_I64_DIV_S = 0x7f;
+	public static final int WASM_INS_I64_DIV_U = 0x80;
+	public static final int WASM_INS_I64_REM_S = 0x81;
+	public static final int WASM_INS_I64_REM_U = 0x82;
+	public static final int WASM_INS_I64_AND = 0x83;
+	public static final int WASM_INS_I64_OR = 0x84;
+	public static final int WASM_INS_I64_XOR = 0x85;
+	public static final int WASM_INS_I64_SHL = 0x86;
+	public static final int WASM_INS_I64_SHR_S = 0x87;
+	public static final int WASM_INS_I64_SHR_U = 0x88;
+	public static final int WASM_INS_I64_ROTL = 0x89;
+	public static final int WASM_INS_I64_ROTR = 0x8a;
+	public static final int WASM_INS_F32_ABS = 0x8b;
+	public static final int WASM_INS_F32_NEG = 0x8c;
+	public static final int WASM_INS_F32_CEIL = 0x8d;
+	public static final int WASM_INS_F32_FLOOR = 0x8e;
+	public static final int WASM_INS_F32_TRUNC = 0x8f;
+	public static final int WASM_INS_F32_NEAREST = 0x90;
+	public static final int WASM_INS_F32_SQRT = 0x91;
+	public static final int WASM_INS_F32_ADD = 0x92;
+	public static final int WASM_INS_F32_SUB = 0x93;
+	public static final int WASM_INS_F32_MUL = 0x94;
+	public static final int WASM_INS_F32_DIV = 0x95;
+	public static final int WASM_INS_F32_MIN = 0x96;
+	public static final int WASM_INS_F32_MAX = 0x97;
+	public static final int WASM_INS_F32_COPYSIGN = 0x98;
+	public static final int WASM_INS_F64_ABS = 0x99;
+	public static final int WASM_INS_F64_NEG = 0x9a;
+	public static final int WASM_INS_F64_CEIL = 0x9b;
+	public static final int WASM_INS_F64_FLOOR = 0x9c;
+	public static final int WASM_INS_F64_TRUNC = 0x9d;
+	public static final int WASM_INS_F64_NEAREST = 0x9e;
+	public static final int WASM_INS_F64_SQRT = 0x9f;
+	public static final int WASM_INS_F64_ADD = 0xa0;
+	public static final int WASM_INS_F64_SUB = 0xa1;
+	public static final int WASM_INS_F64_MUL = 0xa2;
+	public static final int WASM_INS_F64_DIV = 0xa3;
+	public static final int WASM_INS_F64_MIN = 0xa4;
+	public static final int WASM_INS_F64_MAX = 0xa5;
+	public static final int WASM_INS_F64_COPYSIGN = 0xa6;
+	public static final int WASM_INS_I32_WARP_I64 = 0xa7;
+	public static final int WASM_INS_I32_TRUNC_U_F32 = 0xa9;
+	public static final int WASM_INS_I32_TRUNC_S_F64 = 0xaa;
+	public static final int WASM_INS_I32_TRUNC_U_F64 = 0xab;
+	public static final int WASM_INS_I64_EXTEND_S_I32 = 0xac;
+	public static final int WASM_INS_I64_EXTEND_U_I32 = 0xad;
+	public static final int WASM_INS_I64_TRUNC_S_F32 = 0xae;
+	public static final int WASM_INS_I64_TRUNC_U_F32 = 0xaf;
+	public static final int WASM_INS_I64_TRUNC_S_F64 = 0xb0;
+	public static final int WASM_INS_I64_TRUNC_U_F64 = 0xb1;
+	public static final int WASM_INS_F32_CONVERT_S_I32 = 0xb2;
+	public static final int WASM_INS_F32_CONVERT_U_I32 = 0xb3;
+	public static final int WASM_INS_F32_CONVERT_S_I64 = 0xb4;
+	public static final int WASM_INS_F32_CONVERT_U_I64 = 0xb5;
+	public static final int WASM_INS_F32_DEMOTE_F64 = 0xb6;
+	public static final int WASM_INS_F64_CONVERT_S_I32 = 0xb7;
+	public static final int WASM_INS_F64_CONVERT_U_I32 = 0xb8;
+	public static final int WASM_INS_F64_CONVERT_S_I64 = 0xb9;
+	public static final int WASM_INS_F64_CONVERT_U_I64 = 0xba;
+	public static final int WASM_INS_F64_PROMOTE_F32 = 0xbb;
+	public static final int WASM_INS_I32_REINTERPRET_F32 = 0xbc;
+	public static final int WASM_INS_I64_REINTERPRET_F64 = 0xbd;
+	public static final int WASM_INS_F32_REINTERPRET_I32 = 0xbe;
+	public static final int WASM_INS_F64_REINTERPRET_I64 = 0xbf;
+	public static final int WASM_INS_INVALID = 512;
+	public static final int WASM_INS_ENDING = 513;
+
+	public static final int WASM_GRP_INVALID = 0;
+	public static final int WASM_GRP_NUMBERIC = 8;
+	public static final int WASM_GRP_PARAMETRIC = 9;
+	public static final int WASM_GRP_VARIABLE = 10;
+	public static final int WASM_GRP_MEMORY = 11;
+	public static final int WASM_GRP_CONTROL = 12;
+	public static final int WASM_GRP_ENDING = 13;
+}

thirdparty/capstone/bindings/java/capstone/X86.java

@@ -0,0 +1,165 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.X86_const.*;
+
+public class X86 {
+
+  public static class MemType extends Structure {
+    public int segment;
+    public int base;
+    public int index;
+    public int scale;
+    public long disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("segment", "base", "index", "scale", "disp");
+    }
+  }
+  
+  public static class Encoding extends Structure {
+    public byte modrmOffset;
+    public byte dispOffset;
+    public byte dispSize;
+    public byte immOffset;
+    public byte immSize;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("modrmOffset", "dispOffset", "dispSize", "immOffset", "immSize");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public long imm;
+    public MemType mem;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("reg", "imm", "mem");
+    }
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+    public byte size;
+    public byte access;
+    public int avx_bcast;
+    public boolean avx_zero_opmask;
+
+    public void read() {
+      super.read();
+      if (type == X86_OP_MEM)
+        value.setType(MemType.class);
+      if (type == X86_OP_IMM)
+        value.setType(Long.TYPE);
+      if (type == X86_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == X86_OP_INVALID)
+        return;
+      readField("value");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value", "size", "access", "avx_bcast", "avx_zero_opmask");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public byte [] prefix;
+    public byte [] opcode;
+    public byte rex;
+    public byte addr_size;
+    public byte modrm;
+    public byte sib;
+    public long disp;
+    public int sib_index;
+    public byte sib_scale;
+    public int sib_base;
+    public int xop_cc;
+    public int sse_cc;
+    public int avx_cc;
+    public byte avx_sae;
+    public int avx_rm;
+    public long eflags;
+
+    public byte op_count;
+
+    public Operand [] op;
+    
+    public Encoding encoding;
+
+    public UnionOpInfo() {
+      op = new Operand[8];
+      opcode = new byte[4];
+      prefix = new byte[4];
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("prefix", "opcode", "rex", "addr_size",
+          "modrm", "sib", "disp", "sib_index", "sib_scale", "sib_base", "xop_cc", "sse_cc", "avx_cc", "avx_sae", "avx_rm", "eflags", "op_count", "op", "encoding");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public byte [] prefix;
+    public byte [] opcode;
+    public byte opSize;
+    public byte rex;
+    public byte addrSize;
+    public byte dispSize;
+    public byte immSize;
+    public byte modrm;
+    public byte sib;
+    public long disp;
+    public int sibIndex;
+    public byte sibScale;
+    public int sibBase;
+    public int xopCC;
+    public int sseCC;
+    public int avxCC;
+    public boolean avxSae;
+    public int avxRm;
+    public long eflags;
+
+    public Operand[] op;
+    
+    public Encoding encoding;
+
+    public OpInfo(UnionOpInfo e) {
+      prefix = e.prefix;
+      opcode = e.opcode;
+      rex = e.rex;
+      addrSize = e.addr_size;
+      modrm = e.modrm;
+      sib = e.sib;
+      disp = e.disp;
+      sibIndex = e.sib_index;
+      sibScale = e.sib_scale;
+      sibBase = e.sib_base;
+      xopCC = e.xop_cc;
+      sseCC = e.sse_cc;
+      avxCC = e.avx_cc;
+      avxSae = e.avx_sae > 0;
+      avxRm = e.avx_rm;
+      eflags = e.eflags;
+      op = new Operand[e.op_count];
+      for (int i=0; i<e.op_count; i++)
+        op[i] = e.op[i];
+      encoding = e.encoding;
+    }
+  }
+}

thirdparty/capstone/bindings/java/capstone/Xcore.java

@@ -0,0 +1,83 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Xcore_const.*;
+
+public class Xcore {
+
+  public static class MemType extends Structure {
+    public byte base;
+    public byte index;
+    public int disp;
+    public int direct;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "index", "disp", "direct");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public int imm;
+    public MemType mem;
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+
+    public void read() {
+      readField("type");
+      if (type == XCORE_OP_MEM)
+        value.setType(MemType.class);
+      if (type == XCORE_OP_IMM || type == XCORE_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == XCORE_OP_INVALID)
+        return;
+      readField("value");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public byte op_count;
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[8];
+    }
+
+    public void read() {
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public Operand [] op;
+
+    public OpInfo(UnionOpInfo op_info) {
+      op = op_info.op;
+    }
+  }
+}

thirdparty/capstone/bindings/java/capstone/Xcore_const.java

@@ -0,0 +1,165 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Xcore_const {
+
+	public static final int XCORE_OP_INVALID = 0;
+	public static final int XCORE_OP_REG = 1;
+	public static final int XCORE_OP_IMM = 2;
+	public static final int XCORE_OP_MEM = 3;
+
+	public static final int XCORE_REG_INVALID = 0;
+	public static final int XCORE_REG_CP = 1;
+	public static final int XCORE_REG_DP = 2;
+	public static final int XCORE_REG_LR = 3;
+	public static final int XCORE_REG_SP = 4;
+	public static final int XCORE_REG_R0 = 5;
+	public static final int XCORE_REG_R1 = 6;
+	public static final int XCORE_REG_R2 = 7;
+	public static final int XCORE_REG_R3 = 8;
+	public static final int XCORE_REG_R4 = 9;
+	public static final int XCORE_REG_R5 = 10;
+	public static final int XCORE_REG_R6 = 11;
+	public static final int XCORE_REG_R7 = 12;
+	public static final int XCORE_REG_R8 = 13;
+	public static final int XCORE_REG_R9 = 14;
+	public static final int XCORE_REG_R10 = 15;
+	public static final int XCORE_REG_R11 = 16;
+	public static final int XCORE_REG_PC = 17;
+	public static final int XCORE_REG_SCP = 18;
+	public static final int XCORE_REG_SSR = 19;
+	public static final int XCORE_REG_ET = 20;
+	public static final int XCORE_REG_ED = 21;
+	public static final int XCORE_REG_SED = 22;
+	public static final int XCORE_REG_KEP = 23;
+	public static final int XCORE_REG_KSP = 24;
+	public static final int XCORE_REG_ID = 25;
+	public static final int XCORE_REG_ENDING = 26;
+
+	public static final int XCORE_INS_INVALID = 0;
+	public static final int XCORE_INS_ADD = 1;
+	public static final int XCORE_INS_ANDNOT = 2;
+	public static final int XCORE_INS_AND = 3;
+	public static final int XCORE_INS_ASHR = 4;
+	public static final int XCORE_INS_BAU = 5;
+	public static final int XCORE_INS_BITREV = 6;
+	public static final int XCORE_INS_BLA = 7;
+	public static final int XCORE_INS_BLAT = 8;
+	public static final int XCORE_INS_BL = 9;
+	public static final int XCORE_INS_BF = 10;
+	public static final int XCORE_INS_BT = 11;
+	public static final int XCORE_INS_BU = 12;
+	public static final int XCORE_INS_BRU = 13;
+	public static final int XCORE_INS_BYTEREV = 14;
+	public static final int XCORE_INS_CHKCT = 15;
+	public static final int XCORE_INS_CLRE = 16;
+	public static final int XCORE_INS_CLRPT = 17;
+	public static final int XCORE_INS_CLRSR = 18;
+	public static final int XCORE_INS_CLZ = 19;
+	public static final int XCORE_INS_CRC8 = 20;
+	public static final int XCORE_INS_CRC32 = 21;
+	public static final int XCORE_INS_DCALL = 22;
+	public static final int XCORE_INS_DENTSP = 23;
+	public static final int XCORE_INS_DGETREG = 24;
+	public static final int XCORE_INS_DIVS = 25;
+	public static final int XCORE_INS_DIVU = 26;
+	public static final int XCORE_INS_DRESTSP = 27;
+	public static final int XCORE_INS_DRET = 28;
+	public static final int XCORE_INS_ECALLF = 29;
+	public static final int XCORE_INS_ECALLT = 30;
+	public static final int XCORE_INS_EDU = 31;
+	public static final int XCORE_INS_EEF = 32;
+	public static final int XCORE_INS_EET = 33;
+	public static final int XCORE_INS_EEU = 34;
+	public static final int XCORE_INS_ENDIN = 35;
+	public static final int XCORE_INS_ENTSP = 36;
+	public static final int XCORE_INS_EQ = 37;
+	public static final int XCORE_INS_EXTDP = 38;
+	public static final int XCORE_INS_EXTSP = 39;
+	public static final int XCORE_INS_FREER = 40;
+	public static final int XCORE_INS_FREET = 41;
+	public static final int XCORE_INS_GETD = 42;
+	public static final int XCORE_INS_GET = 43;
+	public static final int XCORE_INS_GETN = 44;
+	public static final int XCORE_INS_GETR = 45;
+	public static final int XCORE_INS_GETSR = 46;
+	public static final int XCORE_INS_GETST = 47;
+	public static final int XCORE_INS_GETTS = 48;
+	public static final int XCORE_INS_INCT = 49;
+	public static final int XCORE_INS_INIT = 50;
+	public static final int XCORE_INS_INPW = 51;
+	public static final int XCORE_INS_INSHR = 52;
+	public static final int XCORE_INS_INT = 53;
+	public static final int XCORE_INS_IN = 54;
+	public static final int XCORE_INS_KCALL = 55;
+	public static final int XCORE_INS_KENTSP = 56;
+	public static final int XCORE_INS_KRESTSP = 57;
+	public static final int XCORE_INS_KRET = 58;
+	public static final int XCORE_INS_LADD = 59;
+	public static final int XCORE_INS_LD16S = 60;
+	public static final int XCORE_INS_LD8U = 61;
+	public static final int XCORE_INS_LDA16 = 62;
+	public static final int XCORE_INS_LDAP = 63;
+	public static final int XCORE_INS_LDAW = 64;
+	public static final int XCORE_INS_LDC = 65;
+	public static final int XCORE_INS_LDW = 66;
+	public static final int XCORE_INS_LDIVU = 67;
+	public static final int XCORE_INS_LMUL = 68;
+	public static final int XCORE_INS_LSS = 69;
+	public static final int XCORE_INS_LSUB = 70;
+	public static final int XCORE_INS_LSU = 71;
+	public static final int XCORE_INS_MACCS = 72;
+	public static final int XCORE_INS_MACCU = 73;
+	public static final int XCORE_INS_MJOIN = 74;
+	public static final int XCORE_INS_MKMSK = 75;
+	public static final int XCORE_INS_MSYNC = 76;
+	public static final int XCORE_INS_MUL = 77;
+	public static final int XCORE_INS_NEG = 78;
+	public static final int XCORE_INS_NOT = 79;
+	public static final int XCORE_INS_OR = 80;
+	public static final int XCORE_INS_OUTCT = 81;
+	public static final int XCORE_INS_OUTPW = 82;
+	public static final int XCORE_INS_OUTSHR = 83;
+	public static final int XCORE_INS_OUTT = 84;
+	public static final int XCORE_INS_OUT = 85;
+	public static final int XCORE_INS_PEEK = 86;
+	public static final int XCORE_INS_REMS = 87;
+	public static final int XCORE_INS_REMU = 88;
+	public static final int XCORE_INS_RETSP = 89;
+	public static final int XCORE_INS_SETCLK = 90;
+	public static final int XCORE_INS_SET = 91;
+	public static final int XCORE_INS_SETC = 92;
+	public static final int XCORE_INS_SETD = 93;
+	public static final int XCORE_INS_SETEV = 94;
+	public static final int XCORE_INS_SETN = 95;
+	public static final int XCORE_INS_SETPSC = 96;
+	public static final int XCORE_INS_SETPT = 97;
+	public static final int XCORE_INS_SETRDY = 98;
+	public static final int XCORE_INS_SETSR = 99;
+	public static final int XCORE_INS_SETTW = 100;
+	public static final int XCORE_INS_SETV = 101;
+	public static final int XCORE_INS_SEXT = 102;
+	public static final int XCORE_INS_SHL = 103;
+	public static final int XCORE_INS_SHR = 104;
+	public static final int XCORE_INS_SSYNC = 105;
+	public static final int XCORE_INS_ST16 = 106;
+	public static final int XCORE_INS_ST8 = 107;
+	public static final int XCORE_INS_STW = 108;
+	public static final int XCORE_INS_SUB = 109;
+	public static final int XCORE_INS_SYNCR = 110;
+	public static final int XCORE_INS_TESTCT = 111;
+	public static final int XCORE_INS_TESTLCL = 112;
+	public static final int XCORE_INS_TESTWCT = 113;
+	public static final int XCORE_INS_TSETMR = 114;
+	public static final int XCORE_INS_START = 115;
+	public static final int XCORE_INS_WAITEF = 116;
+	public static final int XCORE_INS_WAITET = 117;
+	public static final int XCORE_INS_WAITEU = 118;
+	public static final int XCORE_INS_XOR = 119;
+	public static final int XCORE_INS_ZEXT = 120;
+	public static final int XCORE_INS_ENDING = 121;
+
+	public static final int XCORE_GRP_INVALID = 0;
+	public static final int XCORE_GRP_JUMP = 1;
+	public static final int XCORE_GRP_ENDING = 2;
+}

thirdparty/capstone/bindings/java/run.sh

@@ -0,0 +1,26 @@
+#!/bin/sh
+JNA=/usr/share/java/jna.jar
+
+if [ ! -f ${JNA} ]; then
+  if [ ! -f /usr/share/java/jna/jna.jar ]; then
+    echo "*** Unable to find jna.jar *** ";
+    exit;
+  else
+    JNA=/usr/share/java/jna/jna.jar;
+  fi
+fi
+
+case "$1" in
+  "") java -classpath ${JNA}:. TestBasic ;;
+  "testbasic") java -classpath ${JNA}:. TestBasic ;;
+  "arm") java -classpath ${JNA}:. TestArm ;;
+  "arm64") java -classpath ${JNA}:. TestArm64 ;;
+  "mips") java -classpath ${JNA}:. TestMips ;;
+  "x86") java -classpath ${JNA}:. TestX86 ;;
+  "xcore") java -classpath ${JNA}:. TestXcore; ;;
+  "ppc") java -classpath ${JNA}:. TestPpc ;;
+  "sparc") java -classpath ${JNA}:. TestSparc ;;
+  "systemz") java -classpath ${JNA}:. TestSystemz ;;
+  "m680x") java -classpath ${JNA}:. TestM680x ;;
+  * ) echo "Usage: ./run.sh [arm|arm64|m680x|mips|ppc|sparc|systemz|x86]"; exit 1;;
+esac

thirdparty/capstone/bindings/ocaml/Makefile

@@ -0,0 +1,299 @@
+# Capstone Disassembler Engine
+# By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015
+
+LIB = capstone
+FLAGS = '-Wall -Wextra -Wwrite-strings'
+PYTHON2 ?= python
+
+all: arm_const.cmxa arm64_const.cmxa m680x_const.cmxa mips_const.cmxa ppc_const.cmxa sparc_const.cmxa sysz_const.cmxa x86_const.cmxa xcore_const.cmxa arm.cmxa arm64.cmxa m680x.cmxa mips.cmxa ppc.cmxa x86.cmxa sparc.cmxa systemz.cmxa xcore.cmxa capstone.cmxa test_basic.cmx test_detail.cmx test_x86.cmx test_arm.cmx test_aarch64.cmx test_mips.cmx test_ppc.cmx test_sparc.cmx test_systemz.cmx test_xcore.cmx test_m680x.cmx ocaml.o
+	ocamlopt -o test_basic -ccopt $(FLAGS) ocaml.o capstone.cmx test_basic.cmx -cclib -l$(LIB)
+	ocamlopt -o test_detail -ccopt $(FLAGS) capstone.cmx ocaml.o test_detail.cmx -cclib -l$(LIB)
+	ocamlopt -o test_x86 -ccopt $(FLAGS) capstone.cmx ocaml.o x86.cmx x86_const.cmx test_x86.cmx -cclib -l$(LIB)
+	ocamlopt -o test_arm -ccopt $(FLAGS) capstone.cmx ocaml.o arm.cmx arm_const.cmx test_arm.cmx -cclib -l$(LIB)
+	ocamlopt -o test_aarch64 -ccopt $(FLAGS) capstone.cmx ocaml.o arm64.cmx arm64_const.cmx test_aarch64.cmx -cclib -l$(LIB)
+	ocamlopt -o test_mips -ccopt $(FLAGS) capstone.cmx ocaml.o mips.cmx mips_const.cmx test_mips.cmx -cclib -l$(LIB)
+	ocamlopt -o test_ppc -ccopt $(FLAGS) capstone.cmx ocaml.o ppc.cmx ppc_const.cmx test_ppc.cmx -cclib -l$(LIB)
+	ocamlopt -o test_sparc -ccopt $(FLAGS) capstone.cmx ocaml.o sparc.cmx sparc_const.cmx test_sparc.cmx -cclib -l$(LIB)
+	ocamlopt -o test_systemz -ccopt $(FLAGS) capstone.cmx ocaml.o systemz.cmx sysz_const.cmx test_systemz.cmx -cclib -l$(LIB)
+	ocamlopt -o test_xcore -ccopt $(FLAGS) capstone.cmx ocaml.o xcore.cmx xcore_const.cmx test_xcore.cmx -cclib -l$(LIB)
+	ocamlopt -o test_m680x -ccopt $(FLAGS) capstone.cmx ocaml.o m680x.cmx m680x_const.cmx test_m680x.cmx -cclib -l$(LIB)
+
+
+test_basic.cmx: test_basic.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_detail.cmx: test_detail.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_x86.cmx: test_x86.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_arm.cmx: test_arm.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_aarch64.cmx: test_aarch64.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_mips.cmx: test_mips.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_ppc.cmx: test_ppc.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_sparc.cmx: test_sparc.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_systemz.cmx: test_systemz.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_xcore.cmx: test_xcore.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_m680x.cmx: test_m680x.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+ocaml.o: ocaml.c
+	ocamlc -ccopt $(FLAGS) -c $<
+
+capstone.mli: capstone.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+capstone.cmi: capstone.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+capstone.cmx: capstone.ml capstone.cmi
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+capstone.cmxa: capstone.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $< -cclib -lsb_ocaml -cclib -l$(LIB)
+
+x86.mli: x86.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+x86.cmi: x86.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+x86.cmx: x86.ml x86.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+x86.cmxa: x86.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+x86_const.mli: x86_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+x86_const.cmi: x86_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+x86_const.cmx: x86_const.ml x86_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+x86_const.cmxa: x86_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+arm.mli: arm.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+arm.cmi: arm.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+arm.cmx: arm.ml arm.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+arm.cmxa: arm.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+arm_const.mli: arm_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+arm_const.cmi: arm_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+arm_const.cmx: arm_const.ml arm_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+arm_const.cmxa: arm_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+arm64.mli: arm64.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+arm64.cmi: arm64.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+arm64.cmx: arm64.ml arm64.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+arm64.cmxa: arm64.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+arm64_const.mli: arm64_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+arm64_const.cmi: arm64_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+arm64_const.cmx: arm64_const.ml arm64_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+arm64_const.cmxa: arm64_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+m680x.mli: m680x.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+m680x.cmi: m680x.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+m680x.cmx: m680x.ml m680x.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+m680x.cmxa: m680x.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+m680x_const.mli: m680x_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+m680x_const.cmi: m680x_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+m680x_const.cmx: m680x_const.ml m680x_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+m680x_const.cmxa: m680x_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+mips.mli: mips.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+mips.cmi: mips.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+mips.cmx: mips.ml mips.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+mips.cmxa: mips.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+mips_const.mli: mips_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+mips_const.cmi: mips_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+mips_const.cmx: mips_const.ml mips_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+mips_const.cmxa: mips_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+ppc.mli: ppc.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+ppc.cmi: ppc.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+ppc.cmx: ppc.ml ppc.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+ppc.cmxa: ppc.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+ppc_const.mli: ppc_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+ppc_const.cmi: ppc_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+ppc_const.cmx: ppc_const.ml ppc_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+ppc_const.cmxa: ppc_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+sparc.mli: sparc.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+sparc.cmi: sparc.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+sparc.cmx: sparc.ml sparc.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+sparc.cmxa: sparc.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+sparc_const.mli: sparc_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+sparc_const.cmi: sparc_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+sparc_const.cmx: sparc_const.ml sparc_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+sparc_const.cmxa: sparc_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+systemz.mli: systemz.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+systemz.cmi: systemz.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+systemz.cmx: systemz.ml systemz.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+systemz.cmxa: systemz.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+sysz_const.mli: sysz_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+sysz_const.cmi: sysz_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+sysz_const.cmx: sysz_const.ml sysz_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+sysz_const.cmxa: sysz_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+xcore.mli: xcore.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+xcore.cmi: xcore.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+xcore.cmx: xcore.ml xcore.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+xcore.cmxa: xcore.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+xcore_const.mli: xcore_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+xcore_const.cmi: xcore_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+xcore_const.cmx: xcore_const.ml xcore_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+xcore_const.cmxa: xcore_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+clean:
+	rm -f *.[oa] *.so *.cm[ixoa] *.cmxa *.mli test_basic test_detail test_x86 test_arm test_aarch64 test_mips test_ppc test_sparc test_systemz test_xcore test_m680x
+
+gen_const:
+	cd .. && $(PYTHON2) const_generator.py ocaml
+
+TESTS = test_basic test_detail test_arm test_aarch64 test_m680x test_mips test_ppc
+TESTS += test_sparc test_systemz test_x86 test_xcore
+check:
+	@for t in $(TESTS); do \
+		echo Check $$t ... ; \
+		./$$t > /dev/null && echo OK || echo FAILED; \
+	done
+

thirdparty/capstone/bindings/ocaml/README

@@ -0,0 +1,23 @@
+To compile Ocaml binding, Ocaml toolchain is needed. On Ubuntu Linux,
+you can install Ocaml with:
+
+    $ sudo apt-get install ocaml-nox
+
+To compile Ocaml binding, simply run "make" on the command line.
+
+
+This directory also contains some test code to show how to use Capstone API.
+
+- test_basic.ml
+  This code shows the most simple form of API where we only want to get basic
+  information out of disassembled instruction, such as address, mnemonic and
+  operand string.
+
+- test_detail.ml:
+  This code shows how to access to architecture-neutral information in disassembled
+  instructions, such as implicit registers read/written, or groups of instructions
+  that this instruction belong to.
+
+- test_<arch>.ml
+  These code show how to access architecture-specific information for each
+  architecture.

thirdparty/capstone/bindings/ocaml/arm.ml

@@ -0,0 +1,55 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Arm_const
+
+let _CS_OP_ARCH = 5;;
+let _CS_OP_CIMM = _CS_OP_ARCH         (* C-Immediate *)
+let _CS_OP_PIMM = _CS_OP_ARCH + 1     (* P-Immediate *)
+
+
+(* architecture specific info of instruction *)
+type arm_op_shift = {
+	shift_type: int;	(* TODO: covert this to pattern like arm_op_value? *)
+	shift_value: int;
+}
+
+type arm_op_mem = {
+	base: int;
+	index: int;
+	scale: int;
+	disp: int;
+	lshift: int;
+}
+
+type arm_op_value =
+	| ARM_OP_INVALID of int
+	| ARM_OP_REG of int
+	| ARM_OP_CIMM of int
+	| ARM_OP_PIMM of int
+	| ARM_OP_IMM of int
+	| ARM_OP_FP of float
+	| ARM_OP_MEM of arm_op_mem
+	| ARM_OP_SETEND of int
+
+type arm_op = {
+	vector_index: int;
+	shift: arm_op_shift;
+	value: arm_op_value;
+	subtracted: bool;
+	access: int;
+	neon_lane: int;
+}
+
+type cs_arm = {
+	usermode: bool;
+	vector_size: int;
+	vector_data: int;
+	cps_mode: int;
+	cps_flag: int;
+	cc: int;
+	update_flags: bool;
+	writeback: bool;
+	mem_barrier: int;
+	operands: arm_op array;
+}

thirdparty/capstone/bindings/ocaml/arm64.ml

@@ -0,0 +1,45 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Arm64_const
+
+(* architecture specific info of instruction *)
+type arm64_op_shift = {
+	shift_type: int;
+	shift_value: int;
+}
+
+type arm64_op_mem = {
+	base: int;
+	index: int;
+	disp: int
+}
+
+type arm64_op_value =
+	| ARM64_OP_INVALID of int
+	| ARM64_OP_REG of int
+	| ARM64_OP_CIMM of int
+	| ARM64_OP_IMM of int
+	| ARM64_OP_FP of float
+	| ARM64_OP_MEM of arm64_op_mem
+	| ARM64_OP_REG_MRS of int
+	| ARM64_OP_REG_MSR of int
+	| ARM64_OP_PSTATE of int
+	| ARM64_OP_SYS of int
+	| ARM64_OP_PREFETCH of int
+	| ARM64_OP_BARRIER of int
+
+type arm64_op = {
+	vector_index: int;
+	vas: int;
+	shift: arm64_op_shift;
+	ext: int;
+	value: arm64_op_value;
+}
+
+type cs_arm64 = {
+	cc: int;
+	update_flags: bool;
+	writeback: bool;
+	operands: arm64_op array;
+}

thirdparty/capstone/bindings/ocaml/arm_const.ml

@@ -0,0 +1,830 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.ml] *)
+
+let _ARM_SFT_INVALID = 0;;
+let _ARM_SFT_ASR = 1;;
+let _ARM_SFT_LSL = 2;;
+let _ARM_SFT_LSR = 3;;
+let _ARM_SFT_ROR = 4;;
+let _ARM_SFT_RRX = 5;;
+let _ARM_SFT_ASR_REG = 6;;
+let _ARM_SFT_LSL_REG = 7;;
+let _ARM_SFT_LSR_REG = 8;;
+let _ARM_SFT_ROR_REG = 9;;
+let _ARM_SFT_RRX_REG = 10;;
+
+let _ARM_CC_INVALID = 0;;
+let _ARM_CC_EQ = 1;;
+let _ARM_CC_NE = 2;;
+let _ARM_CC_HS = 3;;
+let _ARM_CC_LO = 4;;
+let _ARM_CC_MI = 5;;
+let _ARM_CC_PL = 6;;
+let _ARM_CC_VS = 7;;
+let _ARM_CC_VC = 8;;
+let _ARM_CC_HI = 9;;
+let _ARM_CC_LS = 10;;
+let _ARM_CC_GE = 11;;
+let _ARM_CC_LT = 12;;
+let _ARM_CC_GT = 13;;
+let _ARM_CC_LE = 14;;
+let _ARM_CC_AL = 15;;
+
+let _ARM_SYSREG_INVALID = 0;;
+let _ARM_SYSREG_SPSR_C = 1;;
+let _ARM_SYSREG_SPSR_X = 2;;
+let _ARM_SYSREG_SPSR_S = 4;;
+let _ARM_SYSREG_SPSR_F = 8;;
+let _ARM_SYSREG_CPSR_C = 16;;
+let _ARM_SYSREG_CPSR_X = 32;;
+let _ARM_SYSREG_CPSR_S = 64;;
+let _ARM_SYSREG_CPSR_F = 128;;
+let _ARM_SYSREG_APSR = 256;;
+let _ARM_SYSREG_APSR_G = 257;;
+let _ARM_SYSREG_APSR_NZCVQ = 258;;
+let _ARM_SYSREG_APSR_NZCVQG = 259;;
+let _ARM_SYSREG_IAPSR = 260;;
+let _ARM_SYSREG_IAPSR_G = 261;;
+let _ARM_SYSREG_IAPSR_NZCVQG = 262;;
+let _ARM_SYSREG_IAPSR_NZCVQ = 263;;
+let _ARM_SYSREG_EAPSR = 264;;
+let _ARM_SYSREG_EAPSR_G = 265;;
+let _ARM_SYSREG_EAPSR_NZCVQG = 266;;
+let _ARM_SYSREG_EAPSR_NZCVQ = 267;;
+let _ARM_SYSREG_XPSR = 268;;
+let _ARM_SYSREG_XPSR_G = 269;;
+let _ARM_SYSREG_XPSR_NZCVQG = 270;;
+let _ARM_SYSREG_XPSR_NZCVQ = 271;;
+let _ARM_SYSREG_IPSR = 272;;
+let _ARM_SYSREG_EPSR = 273;;
+let _ARM_SYSREG_IEPSR = 274;;
+let _ARM_SYSREG_MSP = 275;;
+let _ARM_SYSREG_PSP = 276;;
+let _ARM_SYSREG_PRIMASK = 277;;
+let _ARM_SYSREG_BASEPRI = 278;;
+let _ARM_SYSREG_BASEPRI_MAX = 279;;
+let _ARM_SYSREG_FAULTMASK = 280;;
+let _ARM_SYSREG_CONTROL = 281;;
+let _ARM_SYSREG_MSPLIM = 282;;
+let _ARM_SYSREG_PSPLIM = 283;;
+let _ARM_SYSREG_MSP_NS = 284;;
+let _ARM_SYSREG_PSP_NS = 285;;
+let _ARM_SYSREG_MSPLIM_NS = 286;;
+let _ARM_SYSREG_PSPLIM_NS = 287;;
+let _ARM_SYSREG_PRIMASK_NS = 288;;
+let _ARM_SYSREG_BASEPRI_NS = 289;;
+let _ARM_SYSREG_FAULTMASK_NS = 290;;
+let _ARM_SYSREG_CONTROL_NS = 291;;
+let _ARM_SYSREG_SP_NS = 292;;
+let _ARM_SYSREG_R8_USR = 293;;
+let _ARM_SYSREG_R9_USR = 294;;
+let _ARM_SYSREG_R10_USR = 295;;
+let _ARM_SYSREG_R11_USR = 296;;
+let _ARM_SYSREG_R12_USR = 297;;
+let _ARM_SYSREG_SP_USR = 298;;
+let _ARM_SYSREG_LR_USR = 299;;
+let _ARM_SYSREG_R8_FIQ = 300;;
+let _ARM_SYSREG_R9_FIQ = 301;;
+let _ARM_SYSREG_R10_FIQ = 302;;
+let _ARM_SYSREG_R11_FIQ = 303;;
+let _ARM_SYSREG_R12_FIQ = 304;;
+let _ARM_SYSREG_SP_FIQ = 305;;
+let _ARM_SYSREG_LR_FIQ = 306;;
+let _ARM_SYSREG_LR_IRQ = 307;;
+let _ARM_SYSREG_SP_IRQ = 308;;
+let _ARM_SYSREG_LR_SVC = 309;;
+let _ARM_SYSREG_SP_SVC = 310;;
+let _ARM_SYSREG_LR_ABT = 311;;
+let _ARM_SYSREG_SP_ABT = 312;;
+let _ARM_SYSREG_LR_UND = 313;;
+let _ARM_SYSREG_SP_UND = 314;;
+let _ARM_SYSREG_LR_MON = 315;;
+let _ARM_SYSREG_SP_MON = 316;;
+let _ARM_SYSREG_ELR_HYP = 317;;
+let _ARM_SYSREG_SP_HYP = 318;;
+let _ARM_SYSREG_SPSR_FIQ = 319;;
+let _ARM_SYSREG_SPSR_IRQ = 320;;
+let _ARM_SYSREG_SPSR_SVC = 321;;
+let _ARM_SYSREG_SPSR_ABT = 322;;
+let _ARM_SYSREG_SPSR_UND = 323;;
+let _ARM_SYSREG_SPSR_MON = 324;;
+let _ARM_SYSREG_SPSR_HYP = 325;;
+
+let _ARM_MB_INVALID = 0;;
+let _ARM_MB_RESERVED_0 = 1;;
+let _ARM_MB_OSHLD = 2;;
+let _ARM_MB_OSHST = 3;;
+let _ARM_MB_OSH = 4;;
+let _ARM_MB_RESERVED_4 = 5;;
+let _ARM_MB_NSHLD = 6;;
+let _ARM_MB_NSHST = 7;;
+let _ARM_MB_NSH = 8;;
+let _ARM_MB_RESERVED_8 = 9;;
+let _ARM_MB_ISHLD = 10;;
+let _ARM_MB_ISHST = 11;;
+let _ARM_MB_ISH = 12;;
+let _ARM_MB_RESERVED_12 = 13;;
+let _ARM_MB_LD = 14;;
+let _ARM_MB_ST = 15;;
+let _ARM_MB_SY = 16;;
+
+let _ARM_OP_INVALID = 0;;
+let _ARM_OP_REG = 1;;
+let _ARM_OP_IMM = 2;;
+let _ARM_OP_MEM = 3;;
+let _ARM_OP_FP = 4;;
+let _ARM_OP_CIMM = 64;;
+let _ARM_OP_PIMM = 65;;
+let _ARM_OP_SETEND = 66;;
+let _ARM_OP_SYSREG = 67;;
+
+let _ARM_SETEND_INVALID = 0;;
+let _ARM_SETEND_BE = 1;;
+let _ARM_SETEND_LE = 2;;
+
+let _ARM_CPSMODE_INVALID = 0;;
+let _ARM_CPSMODE_IE = 2;;
+let _ARM_CPSMODE_ID = 3;;
+
+let _ARM_CPSFLAG_INVALID = 0;;
+let _ARM_CPSFLAG_F = 1;;
+let _ARM_CPSFLAG_I = 2;;
+let _ARM_CPSFLAG_A = 4;;
+let _ARM_CPSFLAG_NONE = 16;;
+
+let _ARM_VECTORDATA_INVALID = 0;;
+let _ARM_VECTORDATA_I8 = 1;;
+let _ARM_VECTORDATA_I16 = 2;;
+let _ARM_VECTORDATA_I32 = 3;;
+let _ARM_VECTORDATA_I64 = 4;;
+let _ARM_VECTORDATA_S8 = 5;;
+let _ARM_VECTORDATA_S16 = 6;;
+let _ARM_VECTORDATA_S32 = 7;;
+let _ARM_VECTORDATA_S64 = 8;;
+let _ARM_VECTORDATA_U8 = 9;;
+let _ARM_VECTORDATA_U16 = 10;;
+let _ARM_VECTORDATA_U32 = 11;;
+let _ARM_VECTORDATA_U64 = 12;;
+let _ARM_VECTORDATA_P8 = 13;;
+let _ARM_VECTORDATA_F16 = 14;;
+let _ARM_VECTORDATA_F32 = 15;;
+let _ARM_VECTORDATA_F64 = 16;;
+let _ARM_VECTORDATA_F16F64 = 17;;
+let _ARM_VECTORDATA_F64F16 = 18;;
+let _ARM_VECTORDATA_F32F16 = 19;;
+let _ARM_VECTORDATA_F16F32 = 20;;
+let _ARM_VECTORDATA_F64F32 = 21;;
+let _ARM_VECTORDATA_F32F64 = 22;;
+let _ARM_VECTORDATA_S32F32 = 23;;
+let _ARM_VECTORDATA_U32F32 = 24;;
+let _ARM_VECTORDATA_F32S32 = 25;;
+let _ARM_VECTORDATA_F32U32 = 26;;
+let _ARM_VECTORDATA_F64S16 = 27;;
+let _ARM_VECTORDATA_F32S16 = 28;;
+let _ARM_VECTORDATA_F64S32 = 29;;
+let _ARM_VECTORDATA_S16F64 = 30;;
+let _ARM_VECTORDATA_S16F32 = 31;;
+let _ARM_VECTORDATA_S32F64 = 32;;
+let _ARM_VECTORDATA_U16F64 = 33;;
+let _ARM_VECTORDATA_U16F32 = 34;;
+let _ARM_VECTORDATA_U32F64 = 35;;
+let _ARM_VECTORDATA_F64U16 = 36;;
+let _ARM_VECTORDATA_F32U16 = 37;;
+let _ARM_VECTORDATA_F64U32 = 38;;
+let _ARM_VECTORDATA_F16U16 = 39;;
+let _ARM_VECTORDATA_U16F16 = 40;;
+let _ARM_VECTORDATA_F16U32 = 41;;
+let _ARM_VECTORDATA_U32F16 = 42;;
+
+let _ARM_REG_INVALID = 0;;
+let _ARM_REG_APSR = 1;;
+let _ARM_REG_APSR_NZCV = 2;;
+let _ARM_REG_CPSR = 3;;
+let _ARM_REG_FPEXC = 4;;
+let _ARM_REG_FPINST = 5;;
+let _ARM_REG_FPSCR = 6;;
+let _ARM_REG_FPSCR_NZCV = 7;;
+let _ARM_REG_FPSID = 8;;
+let _ARM_REG_ITSTATE = 9;;
+let _ARM_REG_LR = 10;;
+let _ARM_REG_PC = 11;;
+let _ARM_REG_SP = 12;;
+let _ARM_REG_SPSR = 13;;
+let _ARM_REG_D0 = 14;;
+let _ARM_REG_D1 = 15;;
+let _ARM_REG_D2 = 16;;
+let _ARM_REG_D3 = 17;;
+let _ARM_REG_D4 = 18;;
+let _ARM_REG_D5 = 19;;
+let _ARM_REG_D6 = 20;;
+let _ARM_REG_D7 = 21;;
+let _ARM_REG_D8 = 22;;
+let _ARM_REG_D9 = 23;;
+let _ARM_REG_D10 = 24;;
+let _ARM_REG_D11 = 25;;
+let _ARM_REG_D12 = 26;;
+let _ARM_REG_D13 = 27;;
+let _ARM_REG_D14 = 28;;
+let _ARM_REG_D15 = 29;;
+let _ARM_REG_D16 = 30;;
+let _ARM_REG_D17 = 31;;
+let _ARM_REG_D18 = 32;;
+let _ARM_REG_D19 = 33;;
+let _ARM_REG_D20 = 34;;
+let _ARM_REG_D21 = 35;;
+let _ARM_REG_D22 = 36;;
+let _ARM_REG_D23 = 37;;
+let _ARM_REG_D24 = 38;;
+let _ARM_REG_D25 = 39;;
+let _ARM_REG_D26 = 40;;
+let _ARM_REG_D27 = 41;;
+let _ARM_REG_D28 = 42;;
+let _ARM_REG_D29 = 43;;
+let _ARM_REG_D30 = 44;;
+let _ARM_REG_D31 = 45;;
+let _ARM_REG_FPINST2 = 46;;
+let _ARM_REG_MVFR0 = 47;;
+let _ARM_REG_MVFR1 = 48;;
+let _ARM_REG_MVFR2 = 49;;
+let _ARM_REG_Q0 = 50;;
+let _ARM_REG_Q1 = 51;;
+let _ARM_REG_Q2 = 52;;
+let _ARM_REG_Q3 = 53;;
+let _ARM_REG_Q4 = 54;;
+let _ARM_REG_Q5 = 55;;
+let _ARM_REG_Q6 = 56;;
+let _ARM_REG_Q7 = 57;;
+let _ARM_REG_Q8 = 58;;
+let _ARM_REG_Q9 = 59;;
+let _ARM_REG_Q10 = 60;;
+let _ARM_REG_Q11 = 61;;
+let _ARM_REG_Q12 = 62;;
+let _ARM_REG_Q13 = 63;;
+let _ARM_REG_Q14 = 64;;
+let _ARM_REG_Q15 = 65;;
+let _ARM_REG_R0 = 66;;
+let _ARM_REG_R1 = 67;;
+let _ARM_REG_R2 = 68;;
+let _ARM_REG_R3 = 69;;
+let _ARM_REG_R4 = 70;;
+let _ARM_REG_R5 = 71;;
+let _ARM_REG_R6 = 72;;
+let _ARM_REG_R7 = 73;;
+let _ARM_REG_R8 = 74;;
+let _ARM_REG_R9 = 75;;
+let _ARM_REG_R10 = 76;;
+let _ARM_REG_R11 = 77;;
+let _ARM_REG_R12 = 78;;
+let _ARM_REG_S0 = 79;;
+let _ARM_REG_S1 = 80;;
+let _ARM_REG_S2 = 81;;
+let _ARM_REG_S3 = 82;;
+let _ARM_REG_S4 = 83;;
+let _ARM_REG_S5 = 84;;
+let _ARM_REG_S6 = 85;;
+let _ARM_REG_S7 = 86;;
+let _ARM_REG_S8 = 87;;
+let _ARM_REG_S9 = 88;;
+let _ARM_REG_S10 = 89;;
+let _ARM_REG_S11 = 90;;
+let _ARM_REG_S12 = 91;;
+let _ARM_REG_S13 = 92;;
+let _ARM_REG_S14 = 93;;
+let _ARM_REG_S15 = 94;;
+let _ARM_REG_S16 = 95;;
+let _ARM_REG_S17 = 96;;
+let _ARM_REG_S18 = 97;;
+let _ARM_REG_S19 = 98;;
+let _ARM_REG_S20 = 99;;
+let _ARM_REG_S21 = 100;;
+let _ARM_REG_S22 = 101;;
+let _ARM_REG_S23 = 102;;
+let _ARM_REG_S24 = 103;;
+let _ARM_REG_S25 = 104;;
+let _ARM_REG_S26 = 105;;
+let _ARM_REG_S27 = 106;;
+let _ARM_REG_S28 = 107;;
+let _ARM_REG_S29 = 108;;
+let _ARM_REG_S30 = 109;;
+let _ARM_REG_S31 = 110;;
+let _ARM_REG_ENDING = 111;;
+let _ARM_REG_R13 = _ARM_REG_SP;;
+let _ARM_REG_R14 = _ARM_REG_LR;;
+let _ARM_REG_R15 = _ARM_REG_PC;;
+let _ARM_REG_SB = _ARM_REG_R9;;
+let _ARM_REG_SL = _ARM_REG_R10;;
+let _ARM_REG_FP = _ARM_REG_R11;;
+let _ARM_REG_IP = _ARM_REG_R12;;
+
+let _ARM_INS_INVALID = 0;;
+let _ARM_INS_ADC = 1;;
+let _ARM_INS_ADD = 2;;
+let _ARM_INS_ADDW = 3;;
+let _ARM_INS_ADR = 4;;
+let _ARM_INS_AESD = 5;;
+let _ARM_INS_AESE = 6;;
+let _ARM_INS_AESIMC = 7;;
+let _ARM_INS_AESMC = 8;;
+let _ARM_INS_AND = 9;;
+let _ARM_INS_ASR = 10;;
+let _ARM_INS_B = 11;;
+let _ARM_INS_BFC = 12;;
+let _ARM_INS_BFI = 13;;
+let _ARM_INS_BIC = 14;;
+let _ARM_INS_BKPT = 15;;
+let _ARM_INS_BL = 16;;
+let _ARM_INS_BLX = 17;;
+let _ARM_INS_BLXNS = 18;;
+let _ARM_INS_BX = 19;;
+let _ARM_INS_BXJ = 20;;
+let _ARM_INS_BXNS = 21;;
+let _ARM_INS_CBNZ = 22;;
+let _ARM_INS_CBZ = 23;;
+let _ARM_INS_CDP = 24;;
+let _ARM_INS_CDP2 = 25;;
+let _ARM_INS_CLREX = 26;;
+let _ARM_INS_CLZ = 27;;
+let _ARM_INS_CMN = 28;;
+let _ARM_INS_CMP = 29;;
+let _ARM_INS_CPS = 30;;
+let _ARM_INS_CRC32B = 31;;
+let _ARM_INS_CRC32CB = 32;;
+let _ARM_INS_CRC32CH = 33;;
+let _ARM_INS_CRC32CW = 34;;
+let _ARM_INS_CRC32H = 35;;
+let _ARM_INS_CRC32W = 36;;
+let _ARM_INS_CSDB = 37;;
+let _ARM_INS_DBG = 38;;
+let _ARM_INS_DCPS1 = 39;;
+let _ARM_INS_DCPS2 = 40;;
+let _ARM_INS_DCPS3 = 41;;
+let _ARM_INS_DFB = 42;;
+let _ARM_INS_DMB = 43;;
+let _ARM_INS_DSB = 44;;
+let _ARM_INS_EOR = 45;;
+let _ARM_INS_ERET = 46;;
+let _ARM_INS_ESB = 47;;
+let _ARM_INS_FADDD = 48;;
+let _ARM_INS_FADDS = 49;;
+let _ARM_INS_FCMPZD = 50;;
+let _ARM_INS_FCMPZS = 51;;
+let _ARM_INS_FCONSTD = 52;;
+let _ARM_INS_FCONSTS = 53;;
+let _ARM_INS_FLDMDBX = 54;;
+let _ARM_INS_FLDMIAX = 55;;
+let _ARM_INS_FMDHR = 56;;
+let _ARM_INS_FMDLR = 57;;
+let _ARM_INS_FMSTAT = 58;;
+let _ARM_INS_FSTMDBX = 59;;
+let _ARM_INS_FSTMIAX = 60;;
+let _ARM_INS_FSUBD = 61;;
+let _ARM_INS_FSUBS = 62;;
+let _ARM_INS_HINT = 63;;
+let _ARM_INS_HLT = 64;;
+let _ARM_INS_HVC = 65;;
+let _ARM_INS_ISB = 66;;
+let _ARM_INS_IT = 67;;
+let _ARM_INS_LDA = 68;;
+let _ARM_INS_LDAB = 69;;
+let _ARM_INS_LDAEX = 70;;
+let _ARM_INS_LDAEXB = 71;;
+let _ARM_INS_LDAEXD = 72;;
+let _ARM_INS_LDAEXH = 73;;
+let _ARM_INS_LDAH = 74;;
+let _ARM_INS_LDC = 75;;
+let _ARM_INS_LDC2 = 76;;
+let _ARM_INS_LDC2L = 77;;
+let _ARM_INS_LDCL = 78;;
+let _ARM_INS_LDM = 79;;
+let _ARM_INS_LDMDA = 80;;
+let _ARM_INS_LDMDB = 81;;
+let _ARM_INS_LDMIB = 82;;
+let _ARM_INS_LDR = 83;;
+let _ARM_INS_LDRB = 84;;
+let _ARM_INS_LDRBT = 85;;
+let _ARM_INS_LDRD = 86;;
+let _ARM_INS_LDREX = 87;;
+let _ARM_INS_LDREXB = 88;;
+let _ARM_INS_LDREXD = 89;;
+let _ARM_INS_LDREXH = 90;;
+let _ARM_INS_LDRH = 91;;
+let _ARM_INS_LDRHT = 92;;
+let _ARM_INS_LDRSB = 93;;
+let _ARM_INS_LDRSBT = 94;;
+let _ARM_INS_LDRSH = 95;;
+let _ARM_INS_LDRSHT = 96;;
+let _ARM_INS_LDRT = 97;;
+let _ARM_INS_LSL = 98;;
+let _ARM_INS_LSR = 99;;
+let _ARM_INS_MCR = 100;;
+let _ARM_INS_MCR2 = 101;;
+let _ARM_INS_MCRR = 102;;
+let _ARM_INS_MCRR2 = 103;;
+let _ARM_INS_MLA = 104;;
+let _ARM_INS_MLS = 105;;
+let _ARM_INS_MOV = 106;;
+let _ARM_INS_MOVS = 107;;
+let _ARM_INS_MOVT = 108;;
+let _ARM_INS_MOVW = 109;;
+let _ARM_INS_MRC = 110;;
+let _ARM_INS_MRC2 = 111;;
+let _ARM_INS_MRRC = 112;;
+let _ARM_INS_MRRC2 = 113;;
+let _ARM_INS_MRS = 114;;
+let _ARM_INS_MSR = 115;;
+let _ARM_INS_MUL = 116;;
+let _ARM_INS_MVN = 117;;
+let _ARM_INS_NEG = 118;;
+let _ARM_INS_NOP = 119;;
+let _ARM_INS_ORN = 120;;
+let _ARM_INS_ORR = 121;;
+let _ARM_INS_PKHBT = 122;;
+let _ARM_INS_PKHTB = 123;;
+let _ARM_INS_PLD = 124;;
+let _ARM_INS_PLDW = 125;;
+let _ARM_INS_PLI = 126;;
+let _ARM_INS_POP = 127;;
+let _ARM_INS_PUSH = 128;;
+let _ARM_INS_QADD = 129;;
+let _ARM_INS_QADD16 = 130;;
+let _ARM_INS_QADD8 = 131;;
+let _ARM_INS_QASX = 132;;
+let _ARM_INS_QDADD = 133;;
+let _ARM_INS_QDSUB = 134;;
+let _ARM_INS_QSAX = 135;;
+let _ARM_INS_QSUB = 136;;
+let _ARM_INS_QSUB16 = 137;;
+let _ARM_INS_QSUB8 = 138;;
+let _ARM_INS_RBIT = 139;;
+let _ARM_INS_REV = 140;;
+let _ARM_INS_REV16 = 141;;
+let _ARM_INS_REVSH = 142;;
+let _ARM_INS_RFEDA = 143;;
+let _ARM_INS_RFEDB = 144;;
+let _ARM_INS_RFEIA = 145;;
+let _ARM_INS_RFEIB = 146;;
+let _ARM_INS_ROR = 147;;
+let _ARM_INS_RRX = 148;;
+let _ARM_INS_RSB = 149;;
+let _ARM_INS_RSC = 150;;
+let _ARM_INS_SADD16 = 151;;
+let _ARM_INS_SADD8 = 152;;
+let _ARM_INS_SASX = 153;;
+let _ARM_INS_SBC = 154;;
+let _ARM_INS_SBFX = 155;;
+let _ARM_INS_SDIV = 156;;
+let _ARM_INS_SEL = 157;;
+let _ARM_INS_SETEND = 158;;
+let _ARM_INS_SETPAN = 159;;
+let _ARM_INS_SEV = 160;;
+let _ARM_INS_SEVL = 161;;
+let _ARM_INS_SG = 162;;
+let _ARM_INS_SHA1C = 163;;
+let _ARM_INS_SHA1H = 164;;
+let _ARM_INS_SHA1M = 165;;
+let _ARM_INS_SHA1P = 166;;
+let _ARM_INS_SHA1SU0 = 167;;
+let _ARM_INS_SHA1SU1 = 168;;
+let _ARM_INS_SHA256H = 169;;
+let _ARM_INS_SHA256H2 = 170;;
+let _ARM_INS_SHA256SU0 = 171;;
+let _ARM_INS_SHA256SU1 = 172;;
+let _ARM_INS_SHADD16 = 173;;
+let _ARM_INS_SHADD8 = 174;;
+let _ARM_INS_SHASX = 175;;
+let _ARM_INS_SHSAX = 176;;
+let _ARM_INS_SHSUB16 = 177;;
+let _ARM_INS_SHSUB8 = 178;;
+let _ARM_INS_SMC = 179;;
+let _ARM_INS_SMLABB = 180;;
+let _ARM_INS_SMLABT = 181;;
+let _ARM_INS_SMLAD = 182;;
+let _ARM_INS_SMLADX = 183;;
+let _ARM_INS_SMLAL = 184;;
+let _ARM_INS_SMLALBB = 185;;
+let _ARM_INS_SMLALBT = 186;;
+let _ARM_INS_SMLALD = 187;;
+let _ARM_INS_SMLALDX = 188;;
+let _ARM_INS_SMLALTB = 189;;
+let _ARM_INS_SMLALTT = 190;;
+let _ARM_INS_SMLATB = 191;;
+let _ARM_INS_SMLATT = 192;;
+let _ARM_INS_SMLAWB = 193;;
+let _ARM_INS_SMLAWT = 194;;
+let _ARM_INS_SMLSD = 195;;
+let _ARM_INS_SMLSDX = 196;;
+let _ARM_INS_SMLSLD = 197;;
+let _ARM_INS_SMLSLDX = 198;;
+let _ARM_INS_SMMLA = 199;;
+let _ARM_INS_SMMLAR = 200;;
+let _ARM_INS_SMMLS = 201;;
+let _ARM_INS_SMMLSR = 202;;
+let _ARM_INS_SMMUL = 203;;
+let _ARM_INS_SMMULR = 204;;
+let _ARM_INS_SMUAD = 205;;
+let _ARM_INS_SMUADX = 206;;
+let _ARM_INS_SMULBB = 207;;
+let _ARM_INS_SMULBT = 208;;
+let _ARM_INS_SMULL = 209;;
+let _ARM_INS_SMULTB = 210;;
+let _ARM_INS_SMULTT = 211;;
+let _ARM_INS_SMULWB = 212;;
+let _ARM_INS_SMULWT = 213;;
+let _ARM_INS_SMUSD = 214;;
+let _ARM_INS_SMUSDX = 215;;
+let _ARM_INS_SRSDA = 216;;
+let _ARM_INS_SRSDB = 217;;
+let _ARM_INS_SRSIA = 218;;
+let _ARM_INS_SRSIB = 219;;
+let _ARM_INS_SSAT = 220;;
+let _ARM_INS_SSAT16 = 221;;
+let _ARM_INS_SSAX = 222;;
+let _ARM_INS_SSUB16 = 223;;
+let _ARM_INS_SSUB8 = 224;;
+let _ARM_INS_STC = 225;;
+let _ARM_INS_STC2 = 226;;
+let _ARM_INS_STC2L = 227;;
+let _ARM_INS_STCL = 228;;
+let _ARM_INS_STL = 229;;
+let _ARM_INS_STLB = 230;;
+let _ARM_INS_STLEX = 231;;
+let _ARM_INS_STLEXB = 232;;
+let _ARM_INS_STLEXD = 233;;
+let _ARM_INS_STLEXH = 234;;
+let _ARM_INS_STLH = 235;;
+let _ARM_INS_STM = 236;;
+let _ARM_INS_STMDA = 237;;
+let _ARM_INS_STMDB = 238;;
+let _ARM_INS_STMIB = 239;;
+let _ARM_INS_STR = 240;;
+let _ARM_INS_STRB = 241;;
+let _ARM_INS_STRBT = 242;;
+let _ARM_INS_STRD = 243;;
+let _ARM_INS_STREX = 244;;
+let _ARM_INS_STREXB = 245;;
+let _ARM_INS_STREXD = 246;;
+let _ARM_INS_STREXH = 247;;
+let _ARM_INS_STRH = 248;;
+let _ARM_INS_STRHT = 249;;
+let _ARM_INS_STRT = 250;;
+let _ARM_INS_SUB = 251;;
+let _ARM_INS_SUBS = 252;;
+let _ARM_INS_SUBW = 253;;
+let _ARM_INS_SVC = 254;;
+let _ARM_INS_SWP = 255;;
+let _ARM_INS_SWPB = 256;;
+let _ARM_INS_SXTAB = 257;;
+let _ARM_INS_SXTAB16 = 258;;
+let _ARM_INS_SXTAH = 259;;
+let _ARM_INS_SXTB = 260;;
+let _ARM_INS_SXTB16 = 261;;
+let _ARM_INS_SXTH = 262;;
+let _ARM_INS_TBB = 263;;
+let _ARM_INS_TBH = 264;;
+let _ARM_INS_TEQ = 265;;
+let _ARM_INS_TRAP = 266;;
+let _ARM_INS_TSB = 267;;
+let _ARM_INS_TST = 268;;
+let _ARM_INS_TT = 269;;
+let _ARM_INS_TTA = 270;;
+let _ARM_INS_TTAT = 271;;
+let _ARM_INS_TTT = 272;;
+let _ARM_INS_UADD16 = 273;;
+let _ARM_INS_UADD8 = 274;;
+let _ARM_INS_UASX = 275;;
+let _ARM_INS_UBFX = 276;;
+let _ARM_INS_UDF = 277;;
+let _ARM_INS_UDIV = 278;;
+let _ARM_INS_UHADD16 = 279;;
+let _ARM_INS_UHADD8 = 280;;
+let _ARM_INS_UHASX = 281;;
+let _ARM_INS_UHSAX = 282;;
+let _ARM_INS_UHSUB16 = 283;;
+let _ARM_INS_UHSUB8 = 284;;
+let _ARM_INS_UMAAL = 285;;
+let _ARM_INS_UMLAL = 286;;
+let _ARM_INS_UMULL = 287;;
+let _ARM_INS_UQADD16 = 288;;
+let _ARM_INS_UQADD8 = 289;;
+let _ARM_INS_UQASX = 290;;
+let _ARM_INS_UQSAX = 291;;
+let _ARM_INS_UQSUB16 = 292;;
+let _ARM_INS_UQSUB8 = 293;;
+let _ARM_INS_USAD8 = 294;;
+let _ARM_INS_USADA8 = 295;;
+let _ARM_INS_USAT = 296;;
+let _ARM_INS_USAT16 = 297;;
+let _ARM_INS_USAX = 298;;
+let _ARM_INS_USUB16 = 299;;
+let _ARM_INS_USUB8 = 300;;
+let _ARM_INS_UXTAB = 301;;
+let _ARM_INS_UXTAB16 = 302;;
+let _ARM_INS_UXTAH = 303;;
+let _ARM_INS_UXTB = 304;;
+let _ARM_INS_UXTB16 = 305;;
+let _ARM_INS_UXTH = 306;;
+let _ARM_INS_VABA = 307;;
+let _ARM_INS_VABAL = 308;;
+let _ARM_INS_VABD = 309;;
+let _ARM_INS_VABDL = 310;;
+let _ARM_INS_VABS = 311;;
+let _ARM_INS_VACGE = 312;;
+let _ARM_INS_VACGT = 313;;
+let _ARM_INS_VACLE = 314;;
+let _ARM_INS_VACLT = 315;;
+let _ARM_INS_VADD = 316;;
+let _ARM_INS_VADDHN = 317;;
+let _ARM_INS_VADDL = 318;;
+let _ARM_INS_VADDW = 319;;
+let _ARM_INS_VAND = 320;;
+let _ARM_INS_VBIC = 321;;
+let _ARM_INS_VBIF = 322;;
+let _ARM_INS_VBIT = 323;;
+let _ARM_INS_VBSL = 324;;
+let _ARM_INS_VCADD = 325;;
+let _ARM_INS_VCEQ = 326;;
+let _ARM_INS_VCGE = 327;;
+let _ARM_INS_VCGT = 328;;
+let _ARM_INS_VCLE = 329;;
+let _ARM_INS_VCLS = 330;;
+let _ARM_INS_VCLT = 331;;
+let _ARM_INS_VCLZ = 332;;
+let _ARM_INS_VCMLA = 333;;
+let _ARM_INS_VCMP = 334;;
+let _ARM_INS_VCMPE = 335;;
+let _ARM_INS_VCNT = 336;;
+let _ARM_INS_VCVT = 337;;
+let _ARM_INS_VCVTA = 338;;
+let _ARM_INS_VCVTB = 339;;
+let _ARM_INS_VCVTM = 340;;
+let _ARM_INS_VCVTN = 341;;
+let _ARM_INS_VCVTP = 342;;
+let _ARM_INS_VCVTR = 343;;
+let _ARM_INS_VCVTT = 344;;
+let _ARM_INS_VDIV = 345;;
+let _ARM_INS_VDUP = 346;;
+let _ARM_INS_VEOR = 347;;
+let _ARM_INS_VEXT = 348;;
+let _ARM_INS_VFMA = 349;;
+let _ARM_INS_VFMS = 350;;
+let _ARM_INS_VFNMA = 351;;
+let _ARM_INS_VFNMS = 352;;
+let _ARM_INS_VHADD = 353;;
+let _ARM_INS_VHSUB = 354;;
+let _ARM_INS_VINS = 355;;
+let _ARM_INS_VJCVT = 356;;
+let _ARM_INS_VLD1 = 357;;
+let _ARM_INS_VLD2 = 358;;
+let _ARM_INS_VLD3 = 359;;
+let _ARM_INS_VLD4 = 360;;
+let _ARM_INS_VLDMDB = 361;;
+let _ARM_INS_VLDMIA = 362;;
+let _ARM_INS_VLDR = 363;;
+let _ARM_INS_VLLDM = 364;;
+let _ARM_INS_VLSTM = 365;;
+let _ARM_INS_VMAX = 366;;
+let _ARM_INS_VMAXNM = 367;;
+let _ARM_INS_VMIN = 368;;
+let _ARM_INS_VMINNM = 369;;
+let _ARM_INS_VMLA = 370;;
+let _ARM_INS_VMLAL = 371;;
+let _ARM_INS_VMLS = 372;;
+let _ARM_INS_VMLSL = 373;;
+let _ARM_INS_VMOV = 374;;
+let _ARM_INS_VMOVL = 375;;
+let _ARM_INS_VMOVN = 376;;
+let _ARM_INS_VMOVX = 377;;
+let _ARM_INS_VMRS = 378;;
+let _ARM_INS_VMSR = 379;;
+let _ARM_INS_VMUL = 380;;
+let _ARM_INS_VMULL = 381;;
+let _ARM_INS_VMVN = 382;;
+let _ARM_INS_VNEG = 383;;
+let _ARM_INS_VNMLA = 384;;
+let _ARM_INS_VNMLS = 385;;
+let _ARM_INS_VNMUL = 386;;
+let _ARM_INS_VORN = 387;;
+let _ARM_INS_VORR = 388;;
+let _ARM_INS_VPADAL = 389;;
+let _ARM_INS_VPADD = 390;;
+let _ARM_INS_VPADDL = 391;;
+let _ARM_INS_VPMAX = 392;;
+let _ARM_INS_VPMIN = 393;;
+let _ARM_INS_VPOP = 394;;
+let _ARM_INS_VPUSH = 395;;
+let _ARM_INS_VQABS = 396;;
+let _ARM_INS_VQADD = 397;;
+let _ARM_INS_VQDMLAL = 398;;
+let _ARM_INS_VQDMLSL = 399;;
+let _ARM_INS_VQDMULH = 400;;
+let _ARM_INS_VQDMULL = 401;;
+let _ARM_INS_VQMOVN = 402;;
+let _ARM_INS_VQMOVUN = 403;;
+let _ARM_INS_VQNEG = 404;;
+let _ARM_INS_VQRDMLAH = 405;;
+let _ARM_INS_VQRDMLSH = 406;;
+let _ARM_INS_VQRDMULH = 407;;
+let _ARM_INS_VQRSHL = 408;;
+let _ARM_INS_VQRSHRN = 409;;
+let _ARM_INS_VQRSHRUN = 410;;
+let _ARM_INS_VQSHL = 411;;
+let _ARM_INS_VQSHLU = 412;;
+let _ARM_INS_VQSHRN = 413;;
+let _ARM_INS_VQSHRUN = 414;;
+let _ARM_INS_VQSUB = 415;;
+let _ARM_INS_VRADDHN = 416;;
+let _ARM_INS_VRECPE = 417;;
+let _ARM_INS_VRECPS = 418;;
+let _ARM_INS_VREV16 = 419;;
+let _ARM_INS_VREV32 = 420;;
+let _ARM_INS_VREV64 = 421;;
+let _ARM_INS_VRHADD = 422;;
+let _ARM_INS_VRINTA = 423;;
+let _ARM_INS_VRINTM = 424;;
+let _ARM_INS_VRINTN = 425;;
+let _ARM_INS_VRINTP = 426;;
+let _ARM_INS_VRINTR = 427;;
+let _ARM_INS_VRINTX = 428;;
+let _ARM_INS_VRINTZ = 429;;
+let _ARM_INS_VRSHL = 430;;
+let _ARM_INS_VRSHR = 431;;
+let _ARM_INS_VRSHRN = 432;;
+let _ARM_INS_VRSQRTE = 433;;
+let _ARM_INS_VRSQRTS = 434;;
+let _ARM_INS_VRSRA = 435;;
+let _ARM_INS_VRSUBHN = 436;;
+let _ARM_INS_VSDOT = 437;;
+let _ARM_INS_VSELEQ = 438;;
+let _ARM_INS_VSELGE = 439;;
+let _ARM_INS_VSELGT = 440;;
+let _ARM_INS_VSELVS = 441;;
+let _ARM_INS_VSHL = 442;;
+let _ARM_INS_VSHLL = 443;;
+let _ARM_INS_VSHR = 444;;
+let _ARM_INS_VSHRN = 445;;
+let _ARM_INS_VSLI = 446;;
+let _ARM_INS_VSQRT = 447;;
+let _ARM_INS_VSRA = 448;;
+let _ARM_INS_VSRI = 449;;
+let _ARM_INS_VST1 = 450;;
+let _ARM_INS_VST2 = 451;;
+let _ARM_INS_VST3 = 452;;
+let _ARM_INS_VST4 = 453;;
+let _ARM_INS_VSTMDB = 454;;
+let _ARM_INS_VSTMIA = 455;;
+let _ARM_INS_VSTR = 456;;
+let _ARM_INS_VSUB = 457;;
+let _ARM_INS_VSUBHN = 458;;
+let _ARM_INS_VSUBL = 459;;
+let _ARM_INS_VSUBW = 460;;
+let _ARM_INS_VSWP = 461;;
+let _ARM_INS_VTBL = 462;;
+let _ARM_INS_VTBX = 463;;
+let _ARM_INS_VTRN = 464;;
+let _ARM_INS_VTST = 465;;
+let _ARM_INS_VUDOT = 466;;
+let _ARM_INS_VUZP = 467;;
+let _ARM_INS_VZIP = 468;;
+let _ARM_INS_WFE = 469;;
+let _ARM_INS_WFI = 470;;
+let _ARM_INS_YIELD = 471;;
+let _ARM_INS_ENDING = 472;;
+
+let _ARM_GRP_INVALID = 0;;
+let _ARM_GRP_JUMP = 1;;
+let _ARM_GRP_CALL = 2;;
+let _ARM_GRP_INT = 4;;
+let _ARM_GRP_PRIVILEGE = 6;;
+let _ARM_GRP_BRANCH_RELATIVE = 7;;
+let _ARM_GRP_CRYPTO = 128;;
+let _ARM_GRP_DATABARRIER = 129;;
+let _ARM_GRP_DIVIDE = 130;;
+let _ARM_GRP_FPARMV8 = 131;;
+let _ARM_GRP_MULTPRO = 132;;
+let _ARM_GRP_NEON = 133;;
+let _ARM_GRP_T2EXTRACTPACK = 134;;
+let _ARM_GRP_THUMB2DSP = 135;;
+let _ARM_GRP_TRUSTZONE = 136;;
+let _ARM_GRP_V4T = 137;;
+let _ARM_GRP_V5T = 138;;
+let _ARM_GRP_V5TE = 139;;
+let _ARM_GRP_V6 = 140;;
+let _ARM_GRP_V6T2 = 141;;
+let _ARM_GRP_V7 = 142;;
+let _ARM_GRP_V8 = 143;;
+let _ARM_GRP_VFP2 = 144;;
+let _ARM_GRP_VFP3 = 145;;
+let _ARM_GRP_VFP4 = 146;;
+let _ARM_GRP_ARM = 147;;
+let _ARM_GRP_MCLASS = 148;;
+let _ARM_GRP_NOTMCLASS = 149;;
+let _ARM_GRP_THUMB = 150;;
+let _ARM_GRP_THUMB1ONLY = 151;;
+let _ARM_GRP_THUMB2 = 152;;
+let _ARM_GRP_PREV8 = 153;;
+let _ARM_GRP_FPVMLX = 154;;
+let _ARM_GRP_MULOPS = 155;;
+let _ARM_GRP_CRC = 156;;
+let _ARM_GRP_DPVFP = 157;;
+let _ARM_GRP_V6M = 158;;
+let _ARM_GRP_VIRTUALIZATION = 159;;
+let _ARM_GRP_ENDING = 160;;

thirdparty/capstone/bindings/ocaml/capstone.ml

@@ -0,0 +1,217 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Arm
+open Arm64
+open Mips
+open Ppc
+open X86
+open Sparc
+open Systemz
+open Xcore
+open M680x
+open Printf	(* debug *)
+
+(* Hardware architectures *)
+type arch =
+  | CS_ARCH_ARM
+  | CS_ARCH_ARM64
+  | CS_ARCH_MIPS
+  | CS_ARCH_X86
+  | CS_ARCH_PPC
+  | CS_ARCH_SPARC
+  | CS_ARCH_SYSZ
+  | CS_ARCH_XCORE
+  | CS_ARCH_M68K
+  | CS_ARCH_TMS320C64X
+  | CS_ARCH_M680X
+
+(* Hardware modes *)
+type mode =
+  |	CS_MODE_LITTLE_ENDIAN	(* little-endian mode (default mode) *)
+  |	CS_MODE_ARM			(* ARM mode *)
+  |	CS_MODE_16			(* 16-bit mode (for X86) *)
+  |	CS_MODE_32			(* 32-bit mode (for X86) *)
+  |	CS_MODE_64			(* 64-bit mode (for X86, PPC) *)
+  |	CS_MODE_THUMB		(* ARM's Thumb mode, including Thumb-2 *)
+  |	CS_MODE_MCLASS		(* ARM's MClass mode *)
+  |	CS_MODE_V8    		(* ARMv8 A32 encodings for ARM *)
+  |	CS_MODE_MICRO		(* MicroMips mode (MIPS architecture) *)
+  |	CS_MODE_MIPS3		(* Mips3 mode (MIPS architecture) *)
+  |	CS_MODE_MIPS32R6	(* Mips32-R6 mode (MIPS architecture) *)
+  |	CS_MODE_MIPS2		(* Mips2 mode (MIPS architecture) *)
+  |	CS_MODE_V9			(* SparcV9 mode (Sparc architecture) *)
+  |	CS_MODE_BIG_ENDIAN	(* big-endian mode *)
+  |	CS_MODE_MIPS32		(* Mips32 mode (for Mips) *)
+  |	CS_MODE_MIPS64		(* Mips64 mode (for Mips) *)
+  |	CS_MODE_QPX			(* Quad Processing eXtensions mode (PowerPC) *)
+  |	CS_MODE_SPE			(* Signal Processing Engine mode (PowerPC) *)
+  |	CS_MODE_BOOKE		(* Book-E mode (PowerPC) *)
+  |	CS_MODE_PS			(* Paired-singles mode (PowerPC) *)
+  |	CS_MODE_M680X_6301	(* M680X Hitachi 6301,6303 mode *)
+  |	CS_MODE_M680X_6309	(* M680X Hitachi 6309 mode *)
+  |	CS_MODE_M680X_6800	(* M680X Motorola 6800,6802 mode *)
+  |	CS_MODE_M680X_6801	(* M680X Motorola 6801,6803 mode *)
+  |	CS_MODE_M680X_6805	(* M680X Motorola 6805 mode *)
+  |	CS_MODE_M680X_6808	(* M680X Motorola 6808 mode *)
+  |	CS_MODE_M680X_6809	(* M680X Motorola 6809 mode *)
+  |	CS_MODE_M680X_6811	(* M680X Motorola/Freescale 68HC11 mode *)
+  |	CS_MODE_M680X_CPU12	(* M680X Motorola/Freescale/NXP CPU12 mode *)
+  |	CS_MODE_M680X_HCS08	(* M680X Freescale HCS08 mode *)
+
+
+
+(* Runtime option for the disassembled engine *)
+type opt_type =
+  |	CS_OPT_SYNTAX		(*  Assembly output syntax *)
+  |	CS_OPT_DETAIL		(* Break down instruction structure into details *)
+  |	CS_OPT_MODE		(* Change engine's mode at run-time *)
+  |	CS_OPT_MEM		(* User-defined dynamic memory related functions *)
+  |	CS_OPT_SKIPDATA		(* Skip data when disassembling. Then engine is in SKIPDATA mode. *)
+  |	CS_OPT_SKIPDATA_SETUP 	(* Setup user-defined function for SKIPDATA option *)
+
+
+(* Common instruction operand access types - to be consistent across all architectures. *)
+(* It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE *)
+let _CS_AC_INVALID = 0;;	(* Uninitialized/invalid access type. *)
+let _CS_AC_READ    = 1 lsl 0;; (* Operand read from memory or register. *)
+let _CS_AC_WRITE   = 1 lsl 1;; (* Operand write to memory or register. *)
+
+(* Runtime option value (associated with option type above) *)
+let _CS_OPT_OFF = 0L;; (* Turn OFF an option - default option of CS_OPT_DETAIL, CS_OPT_SKIPDATA. *)
+let _CS_OPT_ON = 3L;;  (* Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA). *)
+let _CS_OPT_SYNTAX_DEFAULT = 0L;; (* Default asm syntax (CS_OPT_SYNTAX). *)
+let _CS_OPT_SYNTAX_INTEL = 1L;; (* X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX). *)
+let _CS_OPT_SYNTAX_ATT = 2L;; (* X86 ATT asm syntax (CS_OPT_SYNTAX). *)
+let _CS_OPT_SYNTAX_NOREGNAME = 3L;; (* Prints register name with only number (CS_OPT_SYNTAX) *)
+
+(* Common instruction operand types - to be consistent across all architectures. *)
+let _CS_OP_INVALID = 0;;  (* uninitialized/invalid operand. *)
+let _CS_OP_REG     = 1;;  (* Register operand. *)
+let _CS_OP_IMM     = 2;;  (* Immediate operand. *)
+let _CS_OP_MEM     = 3;;  (* Memory operand. *)
+let _CS_OP_FP      = 4;;  (* Floating-Point operand. *)
+
+(* Common instruction groups - to be consistent across all architectures. *)
+let _CS_GRP_INVALID = 0;;  (* uninitialized/invalid group. *)
+let _CS_GRP_JUMP    = 1;;  (* all jump instructions (conditional+direct+indirect jumps) *)
+let _CS_GRP_CALL    = 2;;  (* all call instructions *)
+let _CS_GRP_RET     = 3;;  (* all return instructions *)
+let _CS_GRP_INT     = 4;;  (* all interrupt instructions (int+syscall) *)
+let _CS_GRP_IRET    = 5;;  (* all interrupt return instructions *)
+let _CS_GRP_PRIVILEGE = 6;;  (* all privileged instructions *)
+
+type cs_arch =
+	| CS_INFO_ARM of cs_arm
+	| CS_INFO_ARM64 of cs_arm64
+	| CS_INFO_MIPS of cs_mips
+	| CS_INFO_X86 of cs_x86
+	| CS_INFO_PPC of cs_ppc
+	| CS_INFO_SPARC of cs_sparc
+	| CS_INFO_SYSZ of cs_sysz
+	| CS_INFO_XCORE of cs_xcore
+	| CS_INFO_M680X of cs_m680x
+
+
+type csh = {
+	h: Int64.t;
+	a: arch;
+}
+
+type cs_insn0 = {
+	id: int;
+	address: int;
+	size: int;
+	bytes: int array;
+	mnemonic: string;
+	op_str: string;
+	regs_read: int array;
+	regs_write: int array;
+	groups: int array;
+	arch: cs_arch;
+}
+
+external _cs_open: arch -> mode list -> Int64.t option = "ocaml_open"
+external cs_disasm_quick: arch -> mode list -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm"
+external _cs_disasm_internal: arch -> Int64.t -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm_internal"
+external _cs_reg_name: Int64.t -> int -> string = "ocaml_register_name"
+external _cs_insn_name: Int64.t -> int -> string = "ocaml_instruction_name"
+external _cs_group_name: Int64.t -> int -> string = "ocaml_group_name"
+external cs_version: unit -> int = "ocaml_version"
+external _cs_option: Int64.t -> opt_type -> Int64.t -> int = "ocaml_option"
+external _cs_close: Int64.t -> int = "ocaml_close"
+
+
+let cs_open _arch _mode: csh = (
+	let _handle = _cs_open _arch _mode in (
+	match _handle with
+	| None -> { h = 0L; a = _arch }
+	| Some v -> { h = v; a = _arch }
+	);
+);;
+
+let cs_close handle = (
+	_cs_close handle.h;
+)
+
+let cs_option handle opt value = (
+	_cs_option handle.h opt value;
+);;
+
+let cs_disasm handle code address count = (
+	_cs_disasm_internal handle.a handle.h code address count;
+);;
+
+let cs_reg_name handle id = (
+	_cs_reg_name handle.h id;
+);;
+
+let cs_insn_name handle id = (
+	_cs_insn_name handle.h id;
+);;
+
+let cs_group_name handle id = (
+	_cs_group_name handle.h id;
+);;
+
+class cs_insn c a =
+	let csh = c in
+	let (id, address, size, bytes, mnemonic, op_str, regs_read,
+        regs_write, groups, arch) =
+        (a.id, a.address, a.size, a.bytes, a.mnemonic, a.op_str,
+        a.regs_read, a.regs_write, a.groups, a.arch) in
+	object
+		method id = id;
+		method address = address;
+		method size = size;
+	        method bytes = bytes;
+		method mnemonic = mnemonic;
+		method op_str = op_str;
+		method regs_read = regs_read;
+		method regs_write = regs_write;
+		method groups = groups;
+		method arch = arch;
+		method reg_name id = _cs_reg_name csh.h id;
+		method insn_name id = _cs_insn_name csh.h id;
+		method group_name id = _cs_group_name csh.h id;
+	end;;
+
+let cs_insn_group handle insn group_id =
+	List.exists (fun g -> g == group_id) (Array.to_list insn.groups);;
+
+let cs_reg_read handle insn reg_id =
+	List.exists (fun g -> g == reg_id) (Array.to_list insn.regs_read);;
+
+let cs_reg_write handle insn reg_id =
+	List.exists (fun g -> g == reg_id) (Array.to_list insn.regs_write);;
+
+
+class cs a m =
+	let mode = m and arch = a in
+	let handle = cs_open arch mode in
+	object
+		method disasm code offset count =
+			let insns = (_cs_disasm_internal arch handle.h code offset count) in
+			List.map (fun x -> new cs_insn handle x) insns;
+
+	end;;

thirdparty/capstone/bindings/ocaml/evm_const.ml

@@ -0,0 +1,151 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [evm_const.ml] *)
+
+let _EVM_INS_STOP = 0;;
+let _EVM_INS_ADD = 1;;
+let _EVM_INS_MUL = 2;;
+let _EVM_INS_SUB = 3;;
+let _EVM_INS_DIV = 4;;
+let _EVM_INS_SDIV = 5;;
+let _EVM_INS_MOD = 6;;
+let _EVM_INS_SMOD = 7;;
+let _EVM_INS_ADDMOD = 8;;
+let _EVM_INS_MULMOD = 9;;
+let _EVM_INS_EXP = 10;;
+let _EVM_INS_SIGNEXTEND = 11;;
+let _EVM_INS_LT = 16;;
+let _EVM_INS_GT = 17;;
+let _EVM_INS_SLT = 18;;
+let _EVM_INS_SGT = 19;;
+let _EVM_INS_EQ = 20;;
+let _EVM_INS_ISZERO = 21;;
+let _EVM_INS_AND = 22;;
+let _EVM_INS_OR = 23;;
+let _EVM_INS_XOR = 24;;
+let _EVM_INS_NOT = 25;;
+let _EVM_INS_BYTE = 26;;
+let _EVM_INS_SHA3 = 32;;
+let _EVM_INS_ADDRESS = 48;;
+let _EVM_INS_BALANCE = 49;;
+let _EVM_INS_ORIGIN = 50;;
+let _EVM_INS_CALLER = 51;;
+let _EVM_INS_CALLVALUE = 52;;
+let _EVM_INS_CALLDATALOAD = 53;;
+let _EVM_INS_CALLDATASIZE = 54;;
+let _EVM_INS_CALLDATACOPY = 55;;
+let _EVM_INS_CODESIZE = 56;;
+let _EVM_INS_CODECOPY = 57;;
+let _EVM_INS_GASPRICE = 58;;
+let _EVM_INS_EXTCODESIZE = 59;;
+let _EVM_INS_EXTCODECOPY = 60;;
+let _EVM_INS_RETURNDATASIZE = 61;;
+let _EVM_INS_RETURNDATACOPY = 62;;
+let _EVM_INS_BLOCKHASH = 64;;
+let _EVM_INS_COINBASE = 65;;
+let _EVM_INS_TIMESTAMP = 66;;
+let _EVM_INS_NUMBER = 67;;
+let _EVM_INS_DIFFICULTY = 68;;
+let _EVM_INS_GASLIMIT = 69;;
+let _EVM_INS_POP = 80;;
+let _EVM_INS_MLOAD = 81;;
+let _EVM_INS_MSTORE = 82;;
+let _EVM_INS_MSTORE8 = 83;;
+let _EVM_INS_SLOAD = 84;;
+let _EVM_INS_SSTORE = 85;;
+let _EVM_INS_JUMP = 86;;
+let _EVM_INS_JUMPI = 87;;
+let _EVM_INS_PC = 88;;
+let _EVM_INS_MSIZE = 89;;
+let _EVM_INS_GAS = 90;;
+let _EVM_INS_JUMPDEST = 91;;
+let _EVM_INS_PUSH1 = 96;;
+let _EVM_INS_PUSH2 = 97;;
+let _EVM_INS_PUSH3 = 98;;
+let _EVM_INS_PUSH4 = 99;;
+let _EVM_INS_PUSH5 = 100;;
+let _EVM_INS_PUSH6 = 101;;
+let _EVM_INS_PUSH7 = 102;;
+let _EVM_INS_PUSH8 = 103;;
+let _EVM_INS_PUSH9 = 104;;
+let _EVM_INS_PUSH10 = 105;;
+let _EVM_INS_PUSH11 = 106;;
+let _EVM_INS_PUSH12 = 107;;
+let _EVM_INS_PUSH13 = 108;;
+let _EVM_INS_PUSH14 = 109;;
+let _EVM_INS_PUSH15 = 110;;
+let _EVM_INS_PUSH16 = 111;;
+let _EVM_INS_PUSH17 = 112;;
+let _EVM_INS_PUSH18 = 113;;
+let _EVM_INS_PUSH19 = 114;;
+let _EVM_INS_PUSH20 = 115;;
+let _EVM_INS_PUSH21 = 116;;
+let _EVM_INS_PUSH22 = 117;;
+let _EVM_INS_PUSH23 = 118;;
+let _EVM_INS_PUSH24 = 119;;
+let _EVM_INS_PUSH25 = 120;;
+let _EVM_INS_PUSH26 = 121;;
+let _EVM_INS_PUSH27 = 122;;
+let _EVM_INS_PUSH28 = 123;;
+let _EVM_INS_PUSH29 = 124;;
+let _EVM_INS_PUSH30 = 125;;
+let _EVM_INS_PUSH31 = 126;;
+let _EVM_INS_PUSH32 = 127;;
+let _EVM_INS_DUP1 = 128;;
+let _EVM_INS_DUP2 = 129;;
+let _EVM_INS_DUP3 = 130;;
+let _EVM_INS_DUP4 = 131;;
+let _EVM_INS_DUP5 = 132;;
+let _EVM_INS_DUP6 = 133;;
+let _EVM_INS_DUP7 = 134;;
+let _EVM_INS_DUP8 = 135;;
+let _EVM_INS_DUP9 = 136;;
+let _EVM_INS_DUP10 = 137;;
+let _EVM_INS_DUP11 = 138;;
+let _EVM_INS_DUP12 = 139;;
+let _EVM_INS_DUP13 = 140;;
+let _EVM_INS_DUP14 = 141;;
+let _EVM_INS_DUP15 = 142;;
+let _EVM_INS_DUP16 = 143;;
+let _EVM_INS_SWAP1 = 144;;
+let _EVM_INS_SWAP2 = 145;;
+let _EVM_INS_SWAP3 = 146;;
+let _EVM_INS_SWAP4 = 147;;
+let _EVM_INS_SWAP5 = 148;;
+let _EVM_INS_SWAP6 = 149;;
+let _EVM_INS_SWAP7 = 150;;
+let _EVM_INS_SWAP8 = 151;;
+let _EVM_INS_SWAP9 = 152;;
+let _EVM_INS_SWAP10 = 153;;
+let _EVM_INS_SWAP11 = 154;;
+let _EVM_INS_SWAP12 = 155;;
+let _EVM_INS_SWAP13 = 156;;
+let _EVM_INS_SWAP14 = 157;;
+let _EVM_INS_SWAP15 = 158;;
+let _EVM_INS_SWAP16 = 159;;
+let _EVM_INS_LOG0 = 160;;
+let _EVM_INS_LOG1 = 161;;
+let _EVM_INS_LOG2 = 162;;
+let _EVM_INS_LOG3 = 163;;
+let _EVM_INS_LOG4 = 164;;
+let _EVM_INS_CREATE = 240;;
+let _EVM_INS_CALL = 241;;
+let _EVM_INS_CALLCODE = 242;;
+let _EVM_INS_RETURN = 243;;
+let _EVM_INS_DELEGATECALL = 244;;
+let _EVM_INS_CALLBLACKBOX = 245;;
+let _EVM_INS_STATICCALL = 250;;
+let _EVM_INS_REVERT = 253;;
+let _EVM_INS_SUICIDE = 255;;
+let _EVM_INS_INVALID = 512;;
+let _EVM_INS_ENDING = 513;;
+
+let _EVM_GRP_INVALID = 0;;
+let _EVM_GRP_JUMP = 1;;
+let _EVM_GRP_MATH = 8;;
+let _EVM_GRP_STACK_WRITE = 9;;
+let _EVM_GRP_STACK_READ = 10;;
+let _EVM_GRP_MEM_WRITE = 11;;
+let _EVM_GRP_MEM_READ = 12;;
+let _EVM_GRP_STORE_WRITE = 13;;
+let _EVM_GRP_STORE_READ = 14;;
+let _EVM_GRP_HALT = 15;;
+let _EVM_GRP_ENDING = 16;;

thirdparty/capstone/bindings/ocaml/m680x.ml

@@ -0,0 +1,48 @@
+(* Capstone Disassembly Engine
+ * M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 *)
+
+open M680x_const
+
+
+(* architecture specific info of instruction *)
+type m680x_op_idx = {
+	base_reg: int;
+	offset_reg: int;
+	offset: int;
+	offset_addr: int;
+	offset_bits: int;
+	inc_dec: int;
+	flags: int;
+}
+
+type m680x_op_rel = {
+	addr_rel: int;
+	offset: int;
+}
+
+type m680x_op_ext = {
+	addr_ext: int;
+	indirect: bool;
+}
+
+type m680x_op_value =
+	| M680X_OP_INVALID of int
+	| M680X_OP_IMMEDIATE of int
+	| M680X_OP_REGISTER of int
+	| M680X_OP_INDEXED of m680x_op_idx
+	| M680X_OP_RELATIVE of m680x_op_rel
+	| M680X_OP_EXTENDED of m680x_op_ext
+	| M680X_OP_DIRECT of int
+	| M680X_OP_CONSTANT of int
+
+type m680x_op = {
+	value: m680x_op_value;
+	size: int;
+	access: int;
+}
+
+type cs_m680x = {
+	flags: int;
+	operands: m680x_op array;
+}
+

thirdparty/capstone/bindings/ocaml/m680x_const.ml

@@ -0,0 +1,415 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m680x_const.ml] *)
+let _M680X_OPERAND_COUNT = 9;;
+
+let _M680X_REG_INVALID = 0;;
+let _M680X_REG_A = 1;;
+let _M680X_REG_B = 2;;
+let _M680X_REG_E = 3;;
+let _M680X_REG_F = 4;;
+let _M680X_REG_0 = 5;;
+let _M680X_REG_D = 6;;
+let _M680X_REG_W = 7;;
+let _M680X_REG_CC = 8;;
+let _M680X_REG_DP = 9;;
+let _M680X_REG_MD = 10;;
+let _M680X_REG_HX = 11;;
+let _M680X_REG_H = 12;;
+let _M680X_REG_X = 13;;
+let _M680X_REG_Y = 14;;
+let _M680X_REG_S = 15;;
+let _M680X_REG_U = 16;;
+let _M680X_REG_V = 17;;
+let _M680X_REG_Q = 18;;
+let _M680X_REG_PC = 19;;
+let _M680X_REG_TMP2 = 20;;
+let _M680X_REG_TMP3 = 21;;
+let _M680X_REG_ENDING = 22;;
+
+let _M680X_OP_INVALID = 0;;
+let _M680X_OP_REGISTER = 1;;
+let _M680X_OP_IMMEDIATE = 2;;
+let _M680X_OP_INDEXED = 3;;
+let _M680X_OP_EXTENDED = 4;;
+let _M680X_OP_DIRECT = 5;;
+let _M680X_OP_RELATIVE = 6;;
+let _M680X_OP_CONSTANT = 7;;
+
+let _M680X_OFFSET_NONE = 0;;
+let _M680X_OFFSET_BITS_5 = 5;;
+let _M680X_OFFSET_BITS_8 = 8;;
+let _M680X_OFFSET_BITS_9 = 9;;
+let _M680X_OFFSET_BITS_16 = 16;;
+let _M680X_IDX_INDIRECT = 1;;
+let _M680X_IDX_NO_COMMA = 2;;
+let _M680X_IDX_POST_INC_DEC = 4;;
+
+let _M680X_GRP_INVALID = 0;;
+let _M680X_GRP_JUMP = 1;;
+let _M680X_GRP_CALL = 2;;
+let _M680X_GRP_RET = 3;;
+let _M680X_GRP_INT = 4;;
+let _M680X_GRP_IRET = 5;;
+let _M680X_GRP_PRIV = 6;;
+let _M680X_GRP_BRAREL = 7;;
+let _M680X_GRP_ENDING = 8;;
+let _M680X_FIRST_OP_IN_MNEM = 1;;
+let _M680X_SECOND_OP_IN_MNEM = 2;;
+
+let _M680X_INS_INVLD = 0;;
+let _M680X_INS_ABA = 1;;
+let _M680X_INS_ABX = 2;;
+let _M680X_INS_ABY = 3;;
+let _M680X_INS_ADC = 4;;
+let _M680X_INS_ADCA = 5;;
+let _M680X_INS_ADCB = 6;;
+let _M680X_INS_ADCD = 7;;
+let _M680X_INS_ADCR = 8;;
+let _M680X_INS_ADD = 9;;
+let _M680X_INS_ADDA = 10;;
+let _M680X_INS_ADDB = 11;;
+let _M680X_INS_ADDD = 12;;
+let _M680X_INS_ADDE = 13;;
+let _M680X_INS_ADDF = 14;;
+let _M680X_INS_ADDR = 15;;
+let _M680X_INS_ADDW = 16;;
+let _M680X_INS_AIM = 17;;
+let _M680X_INS_AIS = 18;;
+let _M680X_INS_AIX = 19;;
+let _M680X_INS_AND = 20;;
+let _M680X_INS_ANDA = 21;;
+let _M680X_INS_ANDB = 22;;
+let _M680X_INS_ANDCC = 23;;
+let _M680X_INS_ANDD = 24;;
+let _M680X_INS_ANDR = 25;;
+let _M680X_INS_ASL = 26;;
+let _M680X_INS_ASLA = 27;;
+let _M680X_INS_ASLB = 28;;
+let _M680X_INS_ASLD = 29;;
+let _M680X_INS_ASR = 30;;
+let _M680X_INS_ASRA = 31;;
+let _M680X_INS_ASRB = 32;;
+let _M680X_INS_ASRD = 33;;
+let _M680X_INS_ASRX = 34;;
+let _M680X_INS_BAND = 35;;
+let _M680X_INS_BCC = 36;;
+let _M680X_INS_BCLR = 37;;
+let _M680X_INS_BCS = 38;;
+let _M680X_INS_BEOR = 39;;
+let _M680X_INS_BEQ = 40;;
+let _M680X_INS_BGE = 41;;
+let _M680X_INS_BGND = 42;;
+let _M680X_INS_BGT = 43;;
+let _M680X_INS_BHCC = 44;;
+let _M680X_INS_BHCS = 45;;
+let _M680X_INS_BHI = 46;;
+let _M680X_INS_BIAND = 47;;
+let _M680X_INS_BIEOR = 48;;
+let _M680X_INS_BIH = 49;;
+let _M680X_INS_BIL = 50;;
+let _M680X_INS_BIOR = 51;;
+let _M680X_INS_BIT = 52;;
+let _M680X_INS_BITA = 53;;
+let _M680X_INS_BITB = 54;;
+let _M680X_INS_BITD = 55;;
+let _M680X_INS_BITMD = 56;;
+let _M680X_INS_BLE = 57;;
+let _M680X_INS_BLS = 58;;
+let _M680X_INS_BLT = 59;;
+let _M680X_INS_BMC = 60;;
+let _M680X_INS_BMI = 61;;
+let _M680X_INS_BMS = 62;;
+let _M680X_INS_BNE = 63;;
+let _M680X_INS_BOR = 64;;
+let _M680X_INS_BPL = 65;;
+let _M680X_INS_BRCLR = 66;;
+let _M680X_INS_BRSET = 67;;
+let _M680X_INS_BRA = 68;;
+let _M680X_INS_BRN = 69;;
+let _M680X_INS_BSET = 70;;
+let _M680X_INS_BSR = 71;;
+let _M680X_INS_BVC = 72;;
+let _M680X_INS_BVS = 73;;
+let _M680X_INS_CALL = 74;;
+let _M680X_INS_CBA = 75;;
+let _M680X_INS_CBEQ = 76;;
+let _M680X_INS_CBEQA = 77;;
+let _M680X_INS_CBEQX = 78;;
+let _M680X_INS_CLC = 79;;
+let _M680X_INS_CLI = 80;;
+let _M680X_INS_CLR = 81;;
+let _M680X_INS_CLRA = 82;;
+let _M680X_INS_CLRB = 83;;
+let _M680X_INS_CLRD = 84;;
+let _M680X_INS_CLRE = 85;;
+let _M680X_INS_CLRF = 86;;
+let _M680X_INS_CLRH = 87;;
+let _M680X_INS_CLRW = 88;;
+let _M680X_INS_CLRX = 89;;
+let _M680X_INS_CLV = 90;;
+let _M680X_INS_CMP = 91;;
+let _M680X_INS_CMPA = 92;;
+let _M680X_INS_CMPB = 93;;
+let _M680X_INS_CMPD = 94;;
+let _M680X_INS_CMPE = 95;;
+let _M680X_INS_CMPF = 96;;
+let _M680X_INS_CMPR = 97;;
+let _M680X_INS_CMPS = 98;;
+let _M680X_INS_CMPU = 99;;
+let _M680X_INS_CMPW = 100;;
+let _M680X_INS_CMPX = 101;;
+let _M680X_INS_CMPY = 102;;
+let _M680X_INS_COM = 103;;
+let _M680X_INS_COMA = 104;;
+let _M680X_INS_COMB = 105;;
+let _M680X_INS_COMD = 106;;
+let _M680X_INS_COME = 107;;
+let _M680X_INS_COMF = 108;;
+let _M680X_INS_COMW = 109;;
+let _M680X_INS_COMX = 110;;
+let _M680X_INS_CPD = 111;;
+let _M680X_INS_CPHX = 112;;
+let _M680X_INS_CPS = 113;;
+let _M680X_INS_CPX = 114;;
+let _M680X_INS_CPY = 115;;
+let _M680X_INS_CWAI = 116;;
+let _M680X_INS_DAA = 117;;
+let _M680X_INS_DBEQ = 118;;
+let _M680X_INS_DBNE = 119;;
+let _M680X_INS_DBNZ = 120;;
+let _M680X_INS_DBNZA = 121;;
+let _M680X_INS_DBNZX = 122;;
+let _M680X_INS_DEC = 123;;
+let _M680X_INS_DECA = 124;;
+let _M680X_INS_DECB = 125;;
+let _M680X_INS_DECD = 126;;
+let _M680X_INS_DECE = 127;;
+let _M680X_INS_DECF = 128;;
+let _M680X_INS_DECW = 129;;
+let _M680X_INS_DECX = 130;;
+let _M680X_INS_DES = 131;;
+let _M680X_INS_DEX = 132;;
+let _M680X_INS_DEY = 133;;
+let _M680X_INS_DIV = 134;;
+let _M680X_INS_DIVD = 135;;
+let _M680X_INS_DIVQ = 136;;
+let _M680X_INS_EDIV = 137;;
+let _M680X_INS_EDIVS = 138;;
+let _M680X_INS_EIM = 139;;
+let _M680X_INS_EMACS = 140;;
+let _M680X_INS_EMAXD = 141;;
+let _M680X_INS_EMAXM = 142;;
+let _M680X_INS_EMIND = 143;;
+let _M680X_INS_EMINM = 144;;
+let _M680X_INS_EMUL = 145;;
+let _M680X_INS_EMULS = 146;;
+let _M680X_INS_EOR = 147;;
+let _M680X_INS_EORA = 148;;
+let _M680X_INS_EORB = 149;;
+let _M680X_INS_EORD = 150;;
+let _M680X_INS_EORR = 151;;
+let _M680X_INS_ETBL = 152;;
+let _M680X_INS_EXG = 153;;
+let _M680X_INS_FDIV = 154;;
+let _M680X_INS_IBEQ = 155;;
+let _M680X_INS_IBNE = 156;;
+let _M680X_INS_IDIV = 157;;
+let _M680X_INS_IDIVS = 158;;
+let _M680X_INS_ILLGL = 159;;
+let _M680X_INS_INC = 160;;
+let _M680X_INS_INCA = 161;;
+let _M680X_INS_INCB = 162;;
+let _M680X_INS_INCD = 163;;
+let _M680X_INS_INCE = 164;;
+let _M680X_INS_INCF = 165;;
+let _M680X_INS_INCW = 166;;
+let _M680X_INS_INCX = 167;;
+let _M680X_INS_INS = 168;;
+let _M680X_INS_INX = 169;;
+let _M680X_INS_INY = 170;;
+let _M680X_INS_JMP = 171;;
+let _M680X_INS_JSR = 172;;
+let _M680X_INS_LBCC = 173;;
+let _M680X_INS_LBCS = 174;;
+let _M680X_INS_LBEQ = 175;;
+let _M680X_INS_LBGE = 176;;
+let _M680X_INS_LBGT = 177;;
+let _M680X_INS_LBHI = 178;;
+let _M680X_INS_LBLE = 179;;
+let _M680X_INS_LBLS = 180;;
+let _M680X_INS_LBLT = 181;;
+let _M680X_INS_LBMI = 182;;
+let _M680X_INS_LBNE = 183;;
+let _M680X_INS_LBPL = 184;;
+let _M680X_INS_LBRA = 185;;
+let _M680X_INS_LBRN = 186;;
+let _M680X_INS_LBSR = 187;;
+let _M680X_INS_LBVC = 188;;
+let _M680X_INS_LBVS = 189;;
+let _M680X_INS_LDA = 190;;
+let _M680X_INS_LDAA = 191;;
+let _M680X_INS_LDAB = 192;;
+let _M680X_INS_LDB = 193;;
+let _M680X_INS_LDBT = 194;;
+let _M680X_INS_LDD = 195;;
+let _M680X_INS_LDE = 196;;
+let _M680X_INS_LDF = 197;;
+let _M680X_INS_LDHX = 198;;
+let _M680X_INS_LDMD = 199;;
+let _M680X_INS_LDQ = 200;;
+let _M680X_INS_LDS = 201;;
+let _M680X_INS_LDU = 202;;
+let _M680X_INS_LDW = 203;;
+let _M680X_INS_LDX = 204;;
+let _M680X_INS_LDY = 205;;
+let _M680X_INS_LEAS = 206;;
+let _M680X_INS_LEAU = 207;;
+let _M680X_INS_LEAX = 208;;
+let _M680X_INS_LEAY = 209;;
+let _M680X_INS_LSL = 210;;
+let _M680X_INS_LSLA = 211;;
+let _M680X_INS_LSLB = 212;;
+let _M680X_INS_LSLD = 213;;
+let _M680X_INS_LSLX = 214;;
+let _M680X_INS_LSR = 215;;
+let _M680X_INS_LSRA = 216;;
+let _M680X_INS_LSRB = 217;;
+let _M680X_INS_LSRD = 218;;
+let _M680X_INS_LSRW = 219;;
+let _M680X_INS_LSRX = 220;;
+let _M680X_INS_MAXA = 221;;
+let _M680X_INS_MAXM = 222;;
+let _M680X_INS_MEM = 223;;
+let _M680X_INS_MINA = 224;;
+let _M680X_INS_MINM = 225;;
+let _M680X_INS_MOV = 226;;
+let _M680X_INS_MOVB = 227;;
+let _M680X_INS_MOVW = 228;;
+let _M680X_INS_MUL = 229;;
+let _M680X_INS_MULD = 230;;
+let _M680X_INS_NEG = 231;;
+let _M680X_INS_NEGA = 232;;
+let _M680X_INS_NEGB = 233;;
+let _M680X_INS_NEGD = 234;;
+let _M680X_INS_NEGX = 235;;
+let _M680X_INS_NOP = 236;;
+let _M680X_INS_NSA = 237;;
+let _M680X_INS_OIM = 238;;
+let _M680X_INS_ORA = 239;;
+let _M680X_INS_ORAA = 240;;
+let _M680X_INS_ORAB = 241;;
+let _M680X_INS_ORB = 242;;
+let _M680X_INS_ORCC = 243;;
+let _M680X_INS_ORD = 244;;
+let _M680X_INS_ORR = 245;;
+let _M680X_INS_PSHA = 246;;
+let _M680X_INS_PSHB = 247;;
+let _M680X_INS_PSHC = 248;;
+let _M680X_INS_PSHD = 249;;
+let _M680X_INS_PSHH = 250;;
+let _M680X_INS_PSHS = 251;;
+let _M680X_INS_PSHSW = 252;;
+let _M680X_INS_PSHU = 253;;
+let _M680X_INS_PSHUW = 254;;
+let _M680X_INS_PSHX = 255;;
+let _M680X_INS_PSHY = 256;;
+let _M680X_INS_PULA = 257;;
+let _M680X_INS_PULB = 258;;
+let _M680X_INS_PULC = 259;;
+let _M680X_INS_PULD = 260;;
+let _M680X_INS_PULH = 261;;
+let _M680X_INS_PULS = 262;;
+let _M680X_INS_PULSW = 263;;
+let _M680X_INS_PULU = 264;;
+let _M680X_INS_PULUW = 265;;
+let _M680X_INS_PULX = 266;;
+let _M680X_INS_PULY = 267;;
+let _M680X_INS_REV = 268;;
+let _M680X_INS_REVW = 269;;
+let _M680X_INS_ROL = 270;;
+let _M680X_INS_ROLA = 271;;
+let _M680X_INS_ROLB = 272;;
+let _M680X_INS_ROLD = 273;;
+let _M680X_INS_ROLW = 274;;
+let _M680X_INS_ROLX = 275;;
+let _M680X_INS_ROR = 276;;
+let _M680X_INS_RORA = 277;;
+let _M680X_INS_RORB = 278;;
+let _M680X_INS_RORD = 279;;
+let _M680X_INS_RORW = 280;;
+let _M680X_INS_RORX = 281;;
+let _M680X_INS_RSP = 282;;
+let _M680X_INS_RTC = 283;;
+let _M680X_INS_RTI = 284;;
+let _M680X_INS_RTS = 285;;
+let _M680X_INS_SBA = 286;;
+let _M680X_INS_SBC = 287;;
+let _M680X_INS_SBCA = 288;;
+let _M680X_INS_SBCB = 289;;
+let _M680X_INS_SBCD = 290;;
+let _M680X_INS_SBCR = 291;;
+let _M680X_INS_SEC = 292;;
+let _M680X_INS_SEI = 293;;
+let _M680X_INS_SEV = 294;;
+let _M680X_INS_SEX = 295;;
+let _M680X_INS_SEXW = 296;;
+let _M680X_INS_SLP = 297;;
+let _M680X_INS_STA = 298;;
+let _M680X_INS_STAA = 299;;
+let _M680X_INS_STAB = 300;;
+let _M680X_INS_STB = 301;;
+let _M680X_INS_STBT = 302;;
+let _M680X_INS_STD = 303;;
+let _M680X_INS_STE = 304;;
+let _M680X_INS_STF = 305;;
+let _M680X_INS_STOP = 306;;
+let _M680X_INS_STHX = 307;;
+let _M680X_INS_STQ = 308;;
+let _M680X_INS_STS = 309;;
+let _M680X_INS_STU = 310;;
+let _M680X_INS_STW = 311;;
+let _M680X_INS_STX = 312;;
+let _M680X_INS_STY = 313;;
+let _M680X_INS_SUB = 314;;
+let _M680X_INS_SUBA = 315;;
+let _M680X_INS_SUBB = 316;;
+let _M680X_INS_SUBD = 317;;
+let _M680X_INS_SUBE = 318;;
+let _M680X_INS_SUBF = 319;;
+let _M680X_INS_SUBR = 320;;
+let _M680X_INS_SUBW = 321;;
+let _M680X_INS_SWI = 322;;
+let _M680X_INS_SWI2 = 323;;
+let _M680X_INS_SWI3 = 324;;
+let _M680X_INS_SYNC = 325;;
+let _M680X_INS_TAB = 326;;
+let _M680X_INS_TAP = 327;;
+let _M680X_INS_TAX = 328;;
+let _M680X_INS_TBA = 329;;
+let _M680X_INS_TBEQ = 330;;
+let _M680X_INS_TBL = 331;;
+let _M680X_INS_TBNE = 332;;
+let _M680X_INS_TEST = 333;;
+let _M680X_INS_TFM = 334;;
+let _M680X_INS_TFR = 335;;
+let _M680X_INS_TIM = 336;;
+let _M680X_INS_TPA = 337;;
+let _M680X_INS_TST = 338;;
+let _M680X_INS_TSTA = 339;;
+let _M680X_INS_TSTB = 340;;
+let _M680X_INS_TSTD = 341;;
+let _M680X_INS_TSTE = 342;;
+let _M680X_INS_TSTF = 343;;
+let _M680X_INS_TSTW = 344;;
+let _M680X_INS_TSTX = 345;;
+let _M680X_INS_TSX = 346;;
+let _M680X_INS_TSY = 347;;
+let _M680X_INS_TXA = 348;;
+let _M680X_INS_TXS = 349;;
+let _M680X_INS_TYS = 350;;
+let _M680X_INS_WAI = 351;;
+let _M680X_INS_WAIT = 352;;
+let _M680X_INS_WAV = 353;;
+let _M680X_INS_WAVR = 354;;
+let _M680X_INS_XGDX = 355;;
+let _M680X_INS_XGDY = 356;;
+let _M680X_INS_ENDING = 357;;

thirdparty/capstone/bindings/ocaml/m68k_const.ml

@@ -0,0 +1,485 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m68k_const.ml] *)
+let _M68K_OPERAND_COUNT = 4;;
+
+let _M68K_REG_INVALID = 0;;
+let _M68K_REG_D0 = 1;;
+let _M68K_REG_D1 = 2;;
+let _M68K_REG_D2 = 3;;
+let _M68K_REG_D3 = 4;;
+let _M68K_REG_D4 = 5;;
+let _M68K_REG_D5 = 6;;
+let _M68K_REG_D6 = 7;;
+let _M68K_REG_D7 = 8;;
+let _M68K_REG_A0 = 9;;
+let _M68K_REG_A1 = 10;;
+let _M68K_REG_A2 = 11;;
+let _M68K_REG_A3 = 12;;
+let _M68K_REG_A4 = 13;;
+let _M68K_REG_A5 = 14;;
+let _M68K_REG_A6 = 15;;
+let _M68K_REG_A7 = 16;;
+let _M68K_REG_FP0 = 17;;
+let _M68K_REG_FP1 = 18;;
+let _M68K_REG_FP2 = 19;;
+let _M68K_REG_FP3 = 20;;
+let _M68K_REG_FP4 = 21;;
+let _M68K_REG_FP5 = 22;;
+let _M68K_REG_FP6 = 23;;
+let _M68K_REG_FP7 = 24;;
+let _M68K_REG_PC = 25;;
+let _M68K_REG_SR = 26;;
+let _M68K_REG_CCR = 27;;
+let _M68K_REG_SFC = 28;;
+let _M68K_REG_DFC = 29;;
+let _M68K_REG_USP = 30;;
+let _M68K_REG_VBR = 31;;
+let _M68K_REG_CACR = 32;;
+let _M68K_REG_CAAR = 33;;
+let _M68K_REG_MSP = 34;;
+let _M68K_REG_ISP = 35;;
+let _M68K_REG_TC = 36;;
+let _M68K_REG_ITT0 = 37;;
+let _M68K_REG_ITT1 = 38;;
+let _M68K_REG_DTT0 = 39;;
+let _M68K_REG_DTT1 = 40;;
+let _M68K_REG_MMUSR = 41;;
+let _M68K_REG_URP = 42;;
+let _M68K_REG_SRP = 43;;
+let _M68K_REG_FPCR = 44;;
+let _M68K_REG_FPSR = 45;;
+let _M68K_REG_FPIAR = 46;;
+let _M68K_REG_ENDING = 47;;
+
+let _M68K_AM_NONE = 0;;
+let _M68K_AM_REG_DIRECT_DATA = 1;;
+let _M68K_AM_REG_DIRECT_ADDR = 2;;
+let _M68K_AM_REGI_ADDR = 3;;
+let _M68K_AM_REGI_ADDR_POST_INC = 4;;
+let _M68K_AM_REGI_ADDR_PRE_DEC = 5;;
+let _M68K_AM_REGI_ADDR_DISP = 6;;
+let _M68K_AM_AREGI_INDEX_8_BIT_DISP = 7;;
+let _M68K_AM_AREGI_INDEX_BASE_DISP = 8;;
+let _M68K_AM_MEMI_POST_INDEX = 9;;
+let _M68K_AM_MEMI_PRE_INDEX = 10;;
+let _M68K_AM_PCI_DISP = 11;;
+let _M68K_AM_PCI_INDEX_8_BIT_DISP = 12;;
+let _M68K_AM_PCI_INDEX_BASE_DISP = 13;;
+let _M68K_AM_PC_MEMI_POST_INDEX = 14;;
+let _M68K_AM_PC_MEMI_PRE_INDEX = 15;;
+let _M68K_AM_ABSOLUTE_DATA_SHORT = 16;;
+let _M68K_AM_ABSOLUTE_DATA_LONG = 17;;
+let _M68K_AM_IMMEDIATE = 18;;
+let _M68K_AM_BRANCH_DISPLACEMENT = 19;;
+
+let _M68K_OP_INVALID = 0;;
+let _M68K_OP_REG = 1;;
+let _M68K_OP_IMM = 2;;
+let _M68K_OP_MEM = 3;;
+let _M68K_OP_FP_SINGLE = 4;;
+let _M68K_OP_FP_DOUBLE = 5;;
+let _M68K_OP_REG_BITS = 6;;
+let _M68K_OP_REG_PAIR = 7;;
+let _M68K_OP_BR_DISP = 8;;
+
+let _M68K_OP_BR_DISP_SIZE_INVALID = 0;;
+let _M68K_OP_BR_DISP_SIZE_BYTE = 1;;
+let _M68K_OP_BR_DISP_SIZE_WORD = 2;;
+let _M68K_OP_BR_DISP_SIZE_LONG = 4;;
+
+let _M68K_CPU_SIZE_NONE = 0;;
+let _M68K_CPU_SIZE_BYTE = 1;;
+let _M68K_CPU_SIZE_WORD = 2;;
+let _M68K_CPU_SIZE_LONG = 4;;
+
+let _M68K_FPU_SIZE_NONE = 0;;
+let _M68K_FPU_SIZE_SINGLE = 4;;
+let _M68K_FPU_SIZE_DOUBLE = 8;;
+let _M68K_FPU_SIZE_EXTENDED = 12;;
+
+let _M68K_SIZE_TYPE_INVALID = 0;;
+let _M68K_SIZE_TYPE_CPU = 1;;
+let _M68K_SIZE_TYPE_FPU = 2;;
+
+let _M68K_INS_INVALID = 0;;
+let _M68K_INS_ABCD = 1;;
+let _M68K_INS_ADD = 2;;
+let _M68K_INS_ADDA = 3;;
+let _M68K_INS_ADDI = 4;;
+let _M68K_INS_ADDQ = 5;;
+let _M68K_INS_ADDX = 6;;
+let _M68K_INS_AND = 7;;
+let _M68K_INS_ANDI = 8;;
+let _M68K_INS_ASL = 9;;
+let _M68K_INS_ASR = 10;;
+let _M68K_INS_BHS = 11;;
+let _M68K_INS_BLO = 12;;
+let _M68K_INS_BHI = 13;;
+let _M68K_INS_BLS = 14;;
+let _M68K_INS_BCC = 15;;
+let _M68K_INS_BCS = 16;;
+let _M68K_INS_BNE = 17;;
+let _M68K_INS_BEQ = 18;;
+let _M68K_INS_BVC = 19;;
+let _M68K_INS_BVS = 20;;
+let _M68K_INS_BPL = 21;;
+let _M68K_INS_BMI = 22;;
+let _M68K_INS_BGE = 23;;
+let _M68K_INS_BLT = 24;;
+let _M68K_INS_BGT = 25;;
+let _M68K_INS_BLE = 26;;
+let _M68K_INS_BRA = 27;;
+let _M68K_INS_BSR = 28;;
+let _M68K_INS_BCHG = 29;;
+let _M68K_INS_BCLR = 30;;
+let _M68K_INS_BSET = 31;;
+let _M68K_INS_BTST = 32;;
+let _M68K_INS_BFCHG = 33;;
+let _M68K_INS_BFCLR = 34;;
+let _M68K_INS_BFEXTS = 35;;
+let _M68K_INS_BFEXTU = 36;;
+let _M68K_INS_BFFFO = 37;;
+let _M68K_INS_BFINS = 38;;
+let _M68K_INS_BFSET = 39;;
+let _M68K_INS_BFTST = 40;;
+let _M68K_INS_BKPT = 41;;
+let _M68K_INS_CALLM = 42;;
+let _M68K_INS_CAS = 43;;
+let _M68K_INS_CAS2 = 44;;
+let _M68K_INS_CHK = 45;;
+let _M68K_INS_CHK2 = 46;;
+let _M68K_INS_CLR = 47;;
+let _M68K_INS_CMP = 48;;
+let _M68K_INS_CMPA = 49;;
+let _M68K_INS_CMPI = 50;;
+let _M68K_INS_CMPM = 51;;
+let _M68K_INS_CMP2 = 52;;
+let _M68K_INS_CINVL = 53;;
+let _M68K_INS_CINVP = 54;;
+let _M68K_INS_CINVA = 55;;
+let _M68K_INS_CPUSHL = 56;;
+let _M68K_INS_CPUSHP = 57;;
+let _M68K_INS_CPUSHA = 58;;
+let _M68K_INS_DBT = 59;;
+let _M68K_INS_DBF = 60;;
+let _M68K_INS_DBHI = 61;;
+let _M68K_INS_DBLS = 62;;
+let _M68K_INS_DBCC = 63;;
+let _M68K_INS_DBCS = 64;;
+let _M68K_INS_DBNE = 65;;
+let _M68K_INS_DBEQ = 66;;
+let _M68K_INS_DBVC = 67;;
+let _M68K_INS_DBVS = 68;;
+let _M68K_INS_DBPL = 69;;
+let _M68K_INS_DBMI = 70;;
+let _M68K_INS_DBGE = 71;;
+let _M68K_INS_DBLT = 72;;
+let _M68K_INS_DBGT = 73;;
+let _M68K_INS_DBLE = 74;;
+let _M68K_INS_DBRA = 75;;
+let _M68K_INS_DIVS = 76;;
+let _M68K_INS_DIVSL = 77;;
+let _M68K_INS_DIVU = 78;;
+let _M68K_INS_DIVUL = 79;;
+let _M68K_INS_EOR = 80;;
+let _M68K_INS_EORI = 81;;
+let _M68K_INS_EXG = 82;;
+let _M68K_INS_EXT = 83;;
+let _M68K_INS_EXTB = 84;;
+let _M68K_INS_FABS = 85;;
+let _M68K_INS_FSABS = 86;;
+let _M68K_INS_FDABS = 87;;
+let _M68K_INS_FACOS = 88;;
+let _M68K_INS_FADD = 89;;
+let _M68K_INS_FSADD = 90;;
+let _M68K_INS_FDADD = 91;;
+let _M68K_INS_FASIN = 92;;
+let _M68K_INS_FATAN = 93;;
+let _M68K_INS_FATANH = 94;;
+let _M68K_INS_FBF = 95;;
+let _M68K_INS_FBEQ = 96;;
+let _M68K_INS_FBOGT = 97;;
+let _M68K_INS_FBOGE = 98;;
+let _M68K_INS_FBOLT = 99;;
+let _M68K_INS_FBOLE = 100;;
+let _M68K_INS_FBOGL = 101;;
+let _M68K_INS_FBOR = 102;;
+let _M68K_INS_FBUN = 103;;
+let _M68K_INS_FBUEQ = 104;;
+let _M68K_INS_FBUGT = 105;;
+let _M68K_INS_FBUGE = 106;;
+let _M68K_INS_FBULT = 107;;
+let _M68K_INS_FBULE = 108;;
+let _M68K_INS_FBNE = 109;;
+let _M68K_INS_FBT = 110;;
+let _M68K_INS_FBSF = 111;;
+let _M68K_INS_FBSEQ = 112;;
+let _M68K_INS_FBGT = 113;;
+let _M68K_INS_FBGE = 114;;
+let _M68K_INS_FBLT = 115;;
+let _M68K_INS_FBLE = 116;;
+let _M68K_INS_FBGL = 117;;
+let _M68K_INS_FBGLE = 118;;
+let _M68K_INS_FBNGLE = 119;;
+let _M68K_INS_FBNGL = 120;;
+let _M68K_INS_FBNLE = 121;;
+let _M68K_INS_FBNLT = 122;;
+let _M68K_INS_FBNGE = 123;;
+let _M68K_INS_FBNGT = 124;;
+let _M68K_INS_FBSNE = 125;;
+let _M68K_INS_FBST = 126;;
+let _M68K_INS_FCMP = 127;;
+let _M68K_INS_FCOS = 128;;
+let _M68K_INS_FCOSH = 129;;
+let _M68K_INS_FDBF = 130;;
+let _M68K_INS_FDBEQ = 131;;
+let _M68K_INS_FDBOGT = 132;;
+let _M68K_INS_FDBOGE = 133;;
+let _M68K_INS_FDBOLT = 134;;
+let _M68K_INS_FDBOLE = 135;;
+let _M68K_INS_FDBOGL = 136;;
+let _M68K_INS_FDBOR = 137;;
+let _M68K_INS_FDBUN = 138;;
+let _M68K_INS_FDBUEQ = 139;;
+let _M68K_INS_FDBUGT = 140;;
+let _M68K_INS_FDBUGE = 141;;
+let _M68K_INS_FDBULT = 142;;
+let _M68K_INS_FDBULE = 143;;
+let _M68K_INS_FDBNE = 144;;
+let _M68K_INS_FDBT = 145;;
+let _M68K_INS_FDBSF = 146;;
+let _M68K_INS_FDBSEQ = 147;;
+let _M68K_INS_FDBGT = 148;;
+let _M68K_INS_FDBGE = 149;;
+let _M68K_INS_FDBLT = 150;;
+let _M68K_INS_FDBLE = 151;;
+let _M68K_INS_FDBGL = 152;;
+let _M68K_INS_FDBGLE = 153;;
+let _M68K_INS_FDBNGLE = 154;;
+let _M68K_INS_FDBNGL = 155;;
+let _M68K_INS_FDBNLE = 156;;
+let _M68K_INS_FDBNLT = 157;;
+let _M68K_INS_FDBNGE = 158;;
+let _M68K_INS_FDBNGT = 159;;
+let _M68K_INS_FDBSNE = 160;;
+let _M68K_INS_FDBST = 161;;
+let _M68K_INS_FDIV = 162;;
+let _M68K_INS_FSDIV = 163;;
+let _M68K_INS_FDDIV = 164;;
+let _M68K_INS_FETOX = 165;;
+let _M68K_INS_FETOXM1 = 166;;
+let _M68K_INS_FGETEXP = 167;;
+let _M68K_INS_FGETMAN = 168;;
+let _M68K_INS_FINT = 169;;
+let _M68K_INS_FINTRZ = 170;;
+let _M68K_INS_FLOG10 = 171;;
+let _M68K_INS_FLOG2 = 172;;
+let _M68K_INS_FLOGN = 173;;
+let _M68K_INS_FLOGNP1 = 174;;
+let _M68K_INS_FMOD = 175;;
+let _M68K_INS_FMOVE = 176;;
+let _M68K_INS_FSMOVE = 177;;
+let _M68K_INS_FDMOVE = 178;;
+let _M68K_INS_FMOVECR = 179;;
+let _M68K_INS_FMOVEM = 180;;
+let _M68K_INS_FMUL = 181;;
+let _M68K_INS_FSMUL = 182;;
+let _M68K_INS_FDMUL = 183;;
+let _M68K_INS_FNEG = 184;;
+let _M68K_INS_FSNEG = 185;;
+let _M68K_INS_FDNEG = 186;;
+let _M68K_INS_FNOP = 187;;
+let _M68K_INS_FREM = 188;;
+let _M68K_INS_FRESTORE = 189;;
+let _M68K_INS_FSAVE = 190;;
+let _M68K_INS_FSCALE = 191;;
+let _M68K_INS_FSGLDIV = 192;;
+let _M68K_INS_FSGLMUL = 193;;
+let _M68K_INS_FSIN = 194;;
+let _M68K_INS_FSINCOS = 195;;
+let _M68K_INS_FSINH = 196;;
+let _M68K_INS_FSQRT = 197;;
+let _M68K_INS_FSSQRT = 198;;
+let _M68K_INS_FDSQRT = 199;;
+let _M68K_INS_FSF = 200;;
+let _M68K_INS_FSBEQ = 201;;
+let _M68K_INS_FSOGT = 202;;
+let _M68K_INS_FSOGE = 203;;
+let _M68K_INS_FSOLT = 204;;
+let _M68K_INS_FSOLE = 205;;
+let _M68K_INS_FSOGL = 206;;
+let _M68K_INS_FSOR = 207;;
+let _M68K_INS_FSUN = 208;;
+let _M68K_INS_FSUEQ = 209;;
+let _M68K_INS_FSUGT = 210;;
+let _M68K_INS_FSUGE = 211;;
+let _M68K_INS_FSULT = 212;;
+let _M68K_INS_FSULE = 213;;
+let _M68K_INS_FSNE = 214;;
+let _M68K_INS_FST = 215;;
+let _M68K_INS_FSSF = 216;;
+let _M68K_INS_FSSEQ = 217;;
+let _M68K_INS_FSGT = 218;;
+let _M68K_INS_FSGE = 219;;
+let _M68K_INS_FSLT = 220;;
+let _M68K_INS_FSLE = 221;;
+let _M68K_INS_FSGL = 222;;
+let _M68K_INS_FSGLE = 223;;
+let _M68K_INS_FSNGLE = 224;;
+let _M68K_INS_FSNGL = 225;;
+let _M68K_INS_FSNLE = 226;;
+let _M68K_INS_FSNLT = 227;;
+let _M68K_INS_FSNGE = 228;;
+let _M68K_INS_FSNGT = 229;;
+let _M68K_INS_FSSNE = 230;;
+let _M68K_INS_FSST = 231;;
+let _M68K_INS_FSUB = 232;;
+let _M68K_INS_FSSUB = 233;;
+let _M68K_INS_FDSUB = 234;;
+let _M68K_INS_FTAN = 235;;
+let _M68K_INS_FTANH = 236;;
+let _M68K_INS_FTENTOX = 237;;
+let _M68K_INS_FTRAPF = 238;;
+let _M68K_INS_FTRAPEQ = 239;;
+let _M68K_INS_FTRAPOGT = 240;;
+let _M68K_INS_FTRAPOGE = 241;;
+let _M68K_INS_FTRAPOLT = 242;;
+let _M68K_INS_FTRAPOLE = 243;;
+let _M68K_INS_FTRAPOGL = 244;;
+let _M68K_INS_FTRAPOR = 245;;
+let _M68K_INS_FTRAPUN = 246;;
+let _M68K_INS_FTRAPUEQ = 247;;
+let _M68K_INS_FTRAPUGT = 248;;
+let _M68K_INS_FTRAPUGE = 249;;
+let _M68K_INS_FTRAPULT = 250;;
+let _M68K_INS_FTRAPULE = 251;;
+let _M68K_INS_FTRAPNE = 252;;
+let _M68K_INS_FTRAPT = 253;;
+let _M68K_INS_FTRAPSF = 254;;
+let _M68K_INS_FTRAPSEQ = 255;;
+let _M68K_INS_FTRAPGT = 256;;
+let _M68K_INS_FTRAPGE = 257;;
+let _M68K_INS_FTRAPLT = 258;;
+let _M68K_INS_FTRAPLE = 259;;
+let _M68K_INS_FTRAPGL = 260;;
+let _M68K_INS_FTRAPGLE = 261;;
+let _M68K_INS_FTRAPNGLE = 262;;
+let _M68K_INS_FTRAPNGL = 263;;
+let _M68K_INS_FTRAPNLE = 264;;
+let _M68K_INS_FTRAPNLT = 265;;
+let _M68K_INS_FTRAPNGE = 266;;
+let _M68K_INS_FTRAPNGT = 267;;
+let _M68K_INS_FTRAPSNE = 268;;
+let _M68K_INS_FTRAPST = 269;;
+let _M68K_INS_FTST = 270;;
+let _M68K_INS_FTWOTOX = 271;;
+let _M68K_INS_HALT = 272;;
+let _M68K_INS_ILLEGAL = 273;;
+let _M68K_INS_JMP = 274;;
+let _M68K_INS_JSR = 275;;
+let _M68K_INS_LEA = 276;;
+let _M68K_INS_LINK = 277;;
+let _M68K_INS_LPSTOP = 278;;
+let _M68K_INS_LSL = 279;;
+let _M68K_INS_LSR = 280;;
+let _M68K_INS_MOVE = 281;;
+let _M68K_INS_MOVEA = 282;;
+let _M68K_INS_MOVEC = 283;;
+let _M68K_INS_MOVEM = 284;;
+let _M68K_INS_MOVEP = 285;;
+let _M68K_INS_MOVEQ = 286;;
+let _M68K_INS_MOVES = 287;;
+let _M68K_INS_MOVE16 = 288;;
+let _M68K_INS_MULS = 289;;
+let _M68K_INS_MULU = 290;;
+let _M68K_INS_NBCD = 291;;
+let _M68K_INS_NEG = 292;;
+let _M68K_INS_NEGX = 293;;
+let _M68K_INS_NOP = 294;;
+let _M68K_INS_NOT = 295;;
+let _M68K_INS_OR = 296;;
+let _M68K_INS_ORI = 297;;
+let _M68K_INS_PACK = 298;;
+let _M68K_INS_PEA = 299;;
+let _M68K_INS_PFLUSH = 300;;
+let _M68K_INS_PFLUSHA = 301;;
+let _M68K_INS_PFLUSHAN = 302;;
+let _M68K_INS_PFLUSHN = 303;;
+let _M68K_INS_PLOADR = 304;;
+let _M68K_INS_PLOADW = 305;;
+let _M68K_INS_PLPAR = 306;;
+let _M68K_INS_PLPAW = 307;;
+let _M68K_INS_PMOVE = 308;;
+let _M68K_INS_PMOVEFD = 309;;
+let _M68K_INS_PTESTR = 310;;
+let _M68K_INS_PTESTW = 311;;
+let _M68K_INS_PULSE = 312;;
+let _M68K_INS_REMS = 313;;
+let _M68K_INS_REMU = 314;;
+let _M68K_INS_RESET = 315;;
+let _M68K_INS_ROL = 316;;
+let _M68K_INS_ROR = 317;;
+let _M68K_INS_ROXL = 318;;
+let _M68K_INS_ROXR = 319;;
+let _M68K_INS_RTD = 320;;
+let _M68K_INS_RTE = 321;;
+let _M68K_INS_RTM = 322;;
+let _M68K_INS_RTR = 323;;
+let _M68K_INS_RTS = 324;;
+let _M68K_INS_SBCD = 325;;
+let _M68K_INS_ST = 326;;
+let _M68K_INS_SF = 327;;
+let _M68K_INS_SHI = 328;;
+let _M68K_INS_SLS = 329;;
+let _M68K_INS_SCC = 330;;
+let _M68K_INS_SHS = 331;;
+let _M68K_INS_SCS = 332;;
+let _M68K_INS_SLO = 333;;
+let _M68K_INS_SNE = 334;;
+let _M68K_INS_SEQ = 335;;
+let _M68K_INS_SVC = 336;;
+let _M68K_INS_SVS = 337;;
+let _M68K_INS_SPL = 338;;
+let _M68K_INS_SMI = 339;;
+let _M68K_INS_SGE = 340;;
+let _M68K_INS_SLT = 341;;
+let _M68K_INS_SGT = 342;;
+let _M68K_INS_SLE = 343;;
+let _M68K_INS_STOP = 344;;
+let _M68K_INS_SUB = 345;;
+let _M68K_INS_SUBA = 346;;
+let _M68K_INS_SUBI = 347;;
+let _M68K_INS_SUBQ = 348;;
+let _M68K_INS_SUBX = 349;;
+let _M68K_INS_SWAP = 350;;
+let _M68K_INS_TAS = 351;;
+let _M68K_INS_TRAP = 352;;
+let _M68K_INS_TRAPV = 353;;
+let _M68K_INS_TRAPT = 354;;
+let _M68K_INS_TRAPF = 355;;
+let _M68K_INS_TRAPHI = 356;;
+let _M68K_INS_TRAPLS = 357;;
+let _M68K_INS_TRAPCC = 358;;
+let _M68K_INS_TRAPHS = 359;;
+let _M68K_INS_TRAPCS = 360;;
+let _M68K_INS_TRAPLO = 361;;
+let _M68K_INS_TRAPNE = 362;;
+let _M68K_INS_TRAPEQ = 363;;
+let _M68K_INS_TRAPVC = 364;;
+let _M68K_INS_TRAPVS = 365;;
+let _M68K_INS_TRAPPL = 366;;
+let _M68K_INS_TRAPMI = 367;;
+let _M68K_INS_TRAPGE = 368;;
+let _M68K_INS_TRAPLT = 369;;
+let _M68K_INS_TRAPGT = 370;;
+let _M68K_INS_TRAPLE = 371;;
+let _M68K_INS_TST = 372;;
+let _M68K_INS_UNLK = 373;;
+let _M68K_INS_UNPK = 374;;
+let _M68K_INS_ENDING = 375;;
+
+let _M68K_GRP_INVALID = 0;;
+let _M68K_GRP_JUMP = 1;;
+let _M68K_GRP_RET = 3;;
+let _M68K_GRP_IRET = 5;;
+let _M68K_GRP_BRANCH_RELATIVE = 7;;
+let _M68K_GRP_ENDING = 8;;

thirdparty/capstone/bindings/ocaml/mips.ml

@@ -0,0 +1,24 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Mips_const
+
+(* architecture specific info of instruction *)
+type mips_op_mem = {
+	base: int;
+	disp: int
+}
+
+type mips_op_value =
+	| MIPS_OP_INVALID of int
+	| MIPS_OP_REG of int
+	| MIPS_OP_IMM of int
+	| MIPS_OP_MEM of mips_op_mem
+
+type mips_op = {
+	value: mips_op_value;
+}
+
+type cs_mips = {
+	operands: mips_op array;
+}

thirdparty/capstone/bindings/ocaml/mips_const.ml

@@ -0,0 +1,861 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.ml] *)
+
+let _MIPS_OP_INVALID = 0;;
+let _MIPS_OP_REG = 1;;
+let _MIPS_OP_IMM = 2;;
+let _MIPS_OP_MEM = 3;;
+
+let _MIPS_REG_INVALID = 0;;
+let _MIPS_REG_PC = 1;;
+let _MIPS_REG_0 = 2;;
+let _MIPS_REG_1 = 3;;
+let _MIPS_REG_2 = 4;;
+let _MIPS_REG_3 = 5;;
+let _MIPS_REG_4 = 6;;
+let _MIPS_REG_5 = 7;;
+let _MIPS_REG_6 = 8;;
+let _MIPS_REG_7 = 9;;
+let _MIPS_REG_8 = 10;;
+let _MIPS_REG_9 = 11;;
+let _MIPS_REG_10 = 12;;
+let _MIPS_REG_11 = 13;;
+let _MIPS_REG_12 = 14;;
+let _MIPS_REG_13 = 15;;
+let _MIPS_REG_14 = 16;;
+let _MIPS_REG_15 = 17;;
+let _MIPS_REG_16 = 18;;
+let _MIPS_REG_17 = 19;;
+let _MIPS_REG_18 = 20;;
+let _MIPS_REG_19 = 21;;
+let _MIPS_REG_20 = 22;;
+let _MIPS_REG_21 = 23;;
+let _MIPS_REG_22 = 24;;
+let _MIPS_REG_23 = 25;;
+let _MIPS_REG_24 = 26;;
+let _MIPS_REG_25 = 27;;
+let _MIPS_REG_26 = 28;;
+let _MIPS_REG_27 = 29;;
+let _MIPS_REG_28 = 30;;
+let _MIPS_REG_29 = 31;;
+let _MIPS_REG_30 = 32;;
+let _MIPS_REG_31 = 33;;
+let _MIPS_REG_DSPCCOND = 34;;
+let _MIPS_REG_DSPCARRY = 35;;
+let _MIPS_REG_DSPEFI = 36;;
+let _MIPS_REG_DSPOUTFLAG = 37;;
+let _MIPS_REG_DSPOUTFLAG16_19 = 38;;
+let _MIPS_REG_DSPOUTFLAG20 = 39;;
+let _MIPS_REG_DSPOUTFLAG21 = 40;;
+let _MIPS_REG_DSPOUTFLAG22 = 41;;
+let _MIPS_REG_DSPOUTFLAG23 = 42;;
+let _MIPS_REG_DSPPOS = 43;;
+let _MIPS_REG_DSPSCOUNT = 44;;
+let _MIPS_REG_AC0 = 45;;
+let _MIPS_REG_AC1 = 46;;
+let _MIPS_REG_AC2 = 47;;
+let _MIPS_REG_AC3 = 48;;
+let _MIPS_REG_CC0 = 49;;
+let _MIPS_REG_CC1 = 50;;
+let _MIPS_REG_CC2 = 51;;
+let _MIPS_REG_CC3 = 52;;
+let _MIPS_REG_CC4 = 53;;
+let _MIPS_REG_CC5 = 54;;
+let _MIPS_REG_CC6 = 55;;
+let _MIPS_REG_CC7 = 56;;
+let _MIPS_REG_F0 = 57;;
+let _MIPS_REG_F1 = 58;;
+let _MIPS_REG_F2 = 59;;
+let _MIPS_REG_F3 = 60;;
+let _MIPS_REG_F4 = 61;;
+let _MIPS_REG_F5 = 62;;
+let _MIPS_REG_F6 = 63;;
+let _MIPS_REG_F7 = 64;;
+let _MIPS_REG_F8 = 65;;
+let _MIPS_REG_F9 = 66;;
+let _MIPS_REG_F10 = 67;;
+let _MIPS_REG_F11 = 68;;
+let _MIPS_REG_F12 = 69;;
+let _MIPS_REG_F13 = 70;;
+let _MIPS_REG_F14 = 71;;
+let _MIPS_REG_F15 = 72;;
+let _MIPS_REG_F16 = 73;;
+let _MIPS_REG_F17 = 74;;
+let _MIPS_REG_F18 = 75;;
+let _MIPS_REG_F19 = 76;;
+let _MIPS_REG_F20 = 77;;
+let _MIPS_REG_F21 = 78;;
+let _MIPS_REG_F22 = 79;;
+let _MIPS_REG_F23 = 80;;
+let _MIPS_REG_F24 = 81;;
+let _MIPS_REG_F25 = 82;;
+let _MIPS_REG_F26 = 83;;
+let _MIPS_REG_F27 = 84;;
+let _MIPS_REG_F28 = 85;;
+let _MIPS_REG_F29 = 86;;
+let _MIPS_REG_F30 = 87;;
+let _MIPS_REG_F31 = 88;;
+let _MIPS_REG_FCC0 = 89;;
+let _MIPS_REG_FCC1 = 90;;
+let _MIPS_REG_FCC2 = 91;;
+let _MIPS_REG_FCC3 = 92;;
+let _MIPS_REG_FCC4 = 93;;
+let _MIPS_REG_FCC5 = 94;;
+let _MIPS_REG_FCC6 = 95;;
+let _MIPS_REG_FCC7 = 96;;
+let _MIPS_REG_W0 = 97;;
+let _MIPS_REG_W1 = 98;;
+let _MIPS_REG_W2 = 99;;
+let _MIPS_REG_W3 = 100;;
+let _MIPS_REG_W4 = 101;;
+let _MIPS_REG_W5 = 102;;
+let _MIPS_REG_W6 = 103;;
+let _MIPS_REG_W7 = 104;;
+let _MIPS_REG_W8 = 105;;
+let _MIPS_REG_W9 = 106;;
+let _MIPS_REG_W10 = 107;;
+let _MIPS_REG_W11 = 108;;
+let _MIPS_REG_W12 = 109;;
+let _MIPS_REG_W13 = 110;;
+let _MIPS_REG_W14 = 111;;
+let _MIPS_REG_W15 = 112;;
+let _MIPS_REG_W16 = 113;;
+let _MIPS_REG_W17 = 114;;
+let _MIPS_REG_W18 = 115;;
+let _MIPS_REG_W19 = 116;;
+let _MIPS_REG_W20 = 117;;
+let _MIPS_REG_W21 = 118;;
+let _MIPS_REG_W22 = 119;;
+let _MIPS_REG_W23 = 120;;
+let _MIPS_REG_W24 = 121;;
+let _MIPS_REG_W25 = 122;;
+let _MIPS_REG_W26 = 123;;
+let _MIPS_REG_W27 = 124;;
+let _MIPS_REG_W28 = 125;;
+let _MIPS_REG_W29 = 126;;
+let _MIPS_REG_W30 = 127;;
+let _MIPS_REG_W31 = 128;;
+let _MIPS_REG_HI = 129;;
+let _MIPS_REG_LO = 130;;
+let _MIPS_REG_P0 = 131;;
+let _MIPS_REG_P1 = 132;;
+let _MIPS_REG_P2 = 133;;
+let _MIPS_REG_MPL0 = 134;;
+let _MIPS_REG_MPL1 = 135;;
+let _MIPS_REG_MPL2 = 136;;
+let _MIPS_REG_ENDING = 137;;
+let _MIPS_REG_ZERO = _MIPS_REG_0;;
+let _MIPS_REG_AT = _MIPS_REG_1;;
+let _MIPS_REG_V0 = _MIPS_REG_2;;
+let _MIPS_REG_V1 = _MIPS_REG_3;;
+let _MIPS_REG_A0 = _MIPS_REG_4;;
+let _MIPS_REG_A1 = _MIPS_REG_5;;
+let _MIPS_REG_A2 = _MIPS_REG_6;;
+let _MIPS_REG_A3 = _MIPS_REG_7;;
+let _MIPS_REG_T0 = _MIPS_REG_8;;
+let _MIPS_REG_T1 = _MIPS_REG_9;;
+let _MIPS_REG_T2 = _MIPS_REG_10;;
+let _MIPS_REG_T3 = _MIPS_REG_11;;
+let _MIPS_REG_T4 = _MIPS_REG_12;;
+let _MIPS_REG_T5 = _MIPS_REG_13;;
+let _MIPS_REG_T6 = _MIPS_REG_14;;
+let _MIPS_REG_T7 = _MIPS_REG_15;;
+let _MIPS_REG_S0 = _MIPS_REG_16;;
+let _MIPS_REG_S1 = _MIPS_REG_17;;
+let _MIPS_REG_S2 = _MIPS_REG_18;;
+let _MIPS_REG_S3 = _MIPS_REG_19;;
+let _MIPS_REG_S4 = _MIPS_REG_20;;
+let _MIPS_REG_S5 = _MIPS_REG_21;;
+let _MIPS_REG_S6 = _MIPS_REG_22;;
+let _MIPS_REG_S7 = _MIPS_REG_23;;
+let _MIPS_REG_T8 = _MIPS_REG_24;;
+let _MIPS_REG_T9 = _MIPS_REG_25;;
+let _MIPS_REG_K0 = _MIPS_REG_26;;
+let _MIPS_REG_K1 = _MIPS_REG_27;;
+let _MIPS_REG_GP = _MIPS_REG_28;;
+let _MIPS_REG_SP = _MIPS_REG_29;;
+let _MIPS_REG_FP = _MIPS_REG_30;;
+let _MIPS_REG_S8 = _MIPS_REG_30;;
+let _MIPS_REG_RA = _MIPS_REG_31;;
+let _MIPS_REG_HI0 = _MIPS_REG_AC0;;
+let _MIPS_REG_HI1 = _MIPS_REG_AC1;;
+let _MIPS_REG_HI2 = _MIPS_REG_AC2;;
+let _MIPS_REG_HI3 = _MIPS_REG_AC3;;
+let _MIPS_REG_LO0 = _MIPS_REG_HI0;;
+let _MIPS_REG_LO1 = _MIPS_REG_HI1;;
+let _MIPS_REG_LO2 = _MIPS_REG_HI2;;
+let _MIPS_REG_LO3 = _MIPS_REG_HI3;;
+
+let _MIPS_INS_INVALID = 0;;
+let _MIPS_INS_ABSQ_S = 1;;
+let _MIPS_INS_ADD = 2;;
+let _MIPS_INS_ADDIUPC = 3;;
+let _MIPS_INS_ADDIUR1SP = 4;;
+let _MIPS_INS_ADDIUR2 = 5;;
+let _MIPS_INS_ADDIUS5 = 6;;
+let _MIPS_INS_ADDIUSP = 7;;
+let _MIPS_INS_ADDQH = 8;;
+let _MIPS_INS_ADDQH_R = 9;;
+let _MIPS_INS_ADDQ = 10;;
+let _MIPS_INS_ADDQ_S = 11;;
+let _MIPS_INS_ADDSC = 12;;
+let _MIPS_INS_ADDS_A = 13;;
+let _MIPS_INS_ADDS_S = 14;;
+let _MIPS_INS_ADDS_U = 15;;
+let _MIPS_INS_ADDU16 = 16;;
+let _MIPS_INS_ADDUH = 17;;
+let _MIPS_INS_ADDUH_R = 18;;
+let _MIPS_INS_ADDU = 19;;
+let _MIPS_INS_ADDU_S = 20;;
+let _MIPS_INS_ADDVI = 21;;
+let _MIPS_INS_ADDV = 22;;
+let _MIPS_INS_ADDWC = 23;;
+let _MIPS_INS_ADD_A = 24;;
+let _MIPS_INS_ADDI = 25;;
+let _MIPS_INS_ADDIU = 26;;
+let _MIPS_INS_ALIGN = 27;;
+let _MIPS_INS_ALUIPC = 28;;
+let _MIPS_INS_AND = 29;;
+let _MIPS_INS_AND16 = 30;;
+let _MIPS_INS_ANDI16 = 31;;
+let _MIPS_INS_ANDI = 32;;
+let _MIPS_INS_APPEND = 33;;
+let _MIPS_INS_ASUB_S = 34;;
+let _MIPS_INS_ASUB_U = 35;;
+let _MIPS_INS_AUI = 36;;
+let _MIPS_INS_AUIPC = 37;;
+let _MIPS_INS_AVER_S = 38;;
+let _MIPS_INS_AVER_U = 39;;
+let _MIPS_INS_AVE_S = 40;;
+let _MIPS_INS_AVE_U = 41;;
+let _MIPS_INS_B16 = 42;;
+let _MIPS_INS_BADDU = 43;;
+let _MIPS_INS_BAL = 44;;
+let _MIPS_INS_BALC = 45;;
+let _MIPS_INS_BALIGN = 46;;
+let _MIPS_INS_BBIT0 = 47;;
+let _MIPS_INS_BBIT032 = 48;;
+let _MIPS_INS_BBIT1 = 49;;
+let _MIPS_INS_BBIT132 = 50;;
+let _MIPS_INS_BC = 51;;
+let _MIPS_INS_BC0F = 52;;
+let _MIPS_INS_BC0FL = 53;;
+let _MIPS_INS_BC0T = 54;;
+let _MIPS_INS_BC0TL = 55;;
+let _MIPS_INS_BC1EQZ = 56;;
+let _MIPS_INS_BC1F = 57;;
+let _MIPS_INS_BC1FL = 58;;
+let _MIPS_INS_BC1NEZ = 59;;
+let _MIPS_INS_BC1T = 60;;
+let _MIPS_INS_BC1TL = 61;;
+let _MIPS_INS_BC2EQZ = 62;;
+let _MIPS_INS_BC2F = 63;;
+let _MIPS_INS_BC2FL = 64;;
+let _MIPS_INS_BC2NEZ = 65;;
+let _MIPS_INS_BC2T = 66;;
+let _MIPS_INS_BC2TL = 67;;
+let _MIPS_INS_BC3F = 68;;
+let _MIPS_INS_BC3FL = 69;;
+let _MIPS_INS_BC3T = 70;;
+let _MIPS_INS_BC3TL = 71;;
+let _MIPS_INS_BCLRI = 72;;
+let _MIPS_INS_BCLR = 73;;
+let _MIPS_INS_BEQ = 74;;
+let _MIPS_INS_BEQC = 75;;
+let _MIPS_INS_BEQL = 76;;
+let _MIPS_INS_BEQZ16 = 77;;
+let _MIPS_INS_BEQZALC = 78;;
+let _MIPS_INS_BEQZC = 79;;
+let _MIPS_INS_BGEC = 80;;
+let _MIPS_INS_BGEUC = 81;;
+let _MIPS_INS_BGEZ = 82;;
+let _MIPS_INS_BGEZAL = 83;;
+let _MIPS_INS_BGEZALC = 84;;
+let _MIPS_INS_BGEZALL = 85;;
+let _MIPS_INS_BGEZALS = 86;;
+let _MIPS_INS_BGEZC = 87;;
+let _MIPS_INS_BGEZL = 88;;
+let _MIPS_INS_BGTZ = 89;;
+let _MIPS_INS_BGTZALC = 90;;
+let _MIPS_INS_BGTZC = 91;;
+let _MIPS_INS_BGTZL = 92;;
+let _MIPS_INS_BINSLI = 93;;
+let _MIPS_INS_BINSL = 94;;
+let _MIPS_INS_BINSRI = 95;;
+let _MIPS_INS_BINSR = 96;;
+let _MIPS_INS_BITREV = 97;;
+let _MIPS_INS_BITSWAP = 98;;
+let _MIPS_INS_BLEZ = 99;;
+let _MIPS_INS_BLEZALC = 100;;
+let _MIPS_INS_BLEZC = 101;;
+let _MIPS_INS_BLEZL = 102;;
+let _MIPS_INS_BLTC = 103;;
+let _MIPS_INS_BLTUC = 104;;
+let _MIPS_INS_BLTZ = 105;;
+let _MIPS_INS_BLTZAL = 106;;
+let _MIPS_INS_BLTZALC = 107;;
+let _MIPS_INS_BLTZALL = 108;;
+let _MIPS_INS_BLTZALS = 109;;
+let _MIPS_INS_BLTZC = 110;;
+let _MIPS_INS_BLTZL = 111;;
+let _MIPS_INS_BMNZI = 112;;
+let _MIPS_INS_BMNZ = 113;;
+let _MIPS_INS_BMZI = 114;;
+let _MIPS_INS_BMZ = 115;;
+let _MIPS_INS_BNE = 116;;
+let _MIPS_INS_BNEC = 117;;
+let _MIPS_INS_BNEGI = 118;;
+let _MIPS_INS_BNEG = 119;;
+let _MIPS_INS_BNEL = 120;;
+let _MIPS_INS_BNEZ16 = 121;;
+let _MIPS_INS_BNEZALC = 122;;
+let _MIPS_INS_BNEZC = 123;;
+let _MIPS_INS_BNVC = 124;;
+let _MIPS_INS_BNZ = 125;;
+let _MIPS_INS_BOVC = 126;;
+let _MIPS_INS_BPOSGE32 = 127;;
+let _MIPS_INS_BREAK = 128;;
+let _MIPS_INS_BREAK16 = 129;;
+let _MIPS_INS_BSELI = 130;;
+let _MIPS_INS_BSEL = 131;;
+let _MIPS_INS_BSETI = 132;;
+let _MIPS_INS_BSET = 133;;
+let _MIPS_INS_BZ = 134;;
+let _MIPS_INS_BEQZ = 135;;
+let _MIPS_INS_B = 136;;
+let _MIPS_INS_BNEZ = 137;;
+let _MIPS_INS_BTEQZ = 138;;
+let _MIPS_INS_BTNEZ = 139;;
+let _MIPS_INS_CACHE = 140;;
+let _MIPS_INS_CEIL = 141;;
+let _MIPS_INS_CEQI = 142;;
+let _MIPS_INS_CEQ = 143;;
+let _MIPS_INS_CFC1 = 144;;
+let _MIPS_INS_CFCMSA = 145;;
+let _MIPS_INS_CINS = 146;;
+let _MIPS_INS_CINS32 = 147;;
+let _MIPS_INS_CLASS = 148;;
+let _MIPS_INS_CLEI_S = 149;;
+let _MIPS_INS_CLEI_U = 150;;
+let _MIPS_INS_CLE_S = 151;;
+let _MIPS_INS_CLE_U = 152;;
+let _MIPS_INS_CLO = 153;;
+let _MIPS_INS_CLTI_S = 154;;
+let _MIPS_INS_CLTI_U = 155;;
+let _MIPS_INS_CLT_S = 156;;
+let _MIPS_INS_CLT_U = 157;;
+let _MIPS_INS_CLZ = 158;;
+let _MIPS_INS_CMPGDU = 159;;
+let _MIPS_INS_CMPGU = 160;;
+let _MIPS_INS_CMPU = 161;;
+let _MIPS_INS_CMP = 162;;
+let _MIPS_INS_COPY_S = 163;;
+let _MIPS_INS_COPY_U = 164;;
+let _MIPS_INS_CTC1 = 165;;
+let _MIPS_INS_CTCMSA = 166;;
+let _MIPS_INS_CVT = 167;;
+let _MIPS_INS_C = 168;;
+let _MIPS_INS_CMPI = 169;;
+let _MIPS_INS_DADD = 170;;
+let _MIPS_INS_DADDI = 171;;
+let _MIPS_INS_DADDIU = 172;;
+let _MIPS_INS_DADDU = 173;;
+let _MIPS_INS_DAHI = 174;;
+let _MIPS_INS_DALIGN = 175;;
+let _MIPS_INS_DATI = 176;;
+let _MIPS_INS_DAUI = 177;;
+let _MIPS_INS_DBITSWAP = 178;;
+let _MIPS_INS_DCLO = 179;;
+let _MIPS_INS_DCLZ = 180;;
+let _MIPS_INS_DDIV = 181;;
+let _MIPS_INS_DDIVU = 182;;
+let _MIPS_INS_DERET = 183;;
+let _MIPS_INS_DEXT = 184;;
+let _MIPS_INS_DEXTM = 185;;
+let _MIPS_INS_DEXTU = 186;;
+let _MIPS_INS_DI = 187;;
+let _MIPS_INS_DINS = 188;;
+let _MIPS_INS_DINSM = 189;;
+let _MIPS_INS_DINSU = 190;;
+let _MIPS_INS_DIV = 191;;
+let _MIPS_INS_DIVU = 192;;
+let _MIPS_INS_DIV_S = 193;;
+let _MIPS_INS_DIV_U = 194;;
+let _MIPS_INS_DLSA = 195;;
+let _MIPS_INS_DMFC0 = 196;;
+let _MIPS_INS_DMFC1 = 197;;
+let _MIPS_INS_DMFC2 = 198;;
+let _MIPS_INS_DMOD = 199;;
+let _MIPS_INS_DMODU = 200;;
+let _MIPS_INS_DMTC0 = 201;;
+let _MIPS_INS_DMTC1 = 202;;
+let _MIPS_INS_DMTC2 = 203;;
+let _MIPS_INS_DMUH = 204;;
+let _MIPS_INS_DMUHU = 205;;
+let _MIPS_INS_DMUL = 206;;
+let _MIPS_INS_DMULT = 207;;
+let _MIPS_INS_DMULTU = 208;;
+let _MIPS_INS_DMULU = 209;;
+let _MIPS_INS_DOTP_S = 210;;
+let _MIPS_INS_DOTP_U = 211;;
+let _MIPS_INS_DPADD_S = 212;;
+let _MIPS_INS_DPADD_U = 213;;
+let _MIPS_INS_DPAQX_SA = 214;;
+let _MIPS_INS_DPAQX_S = 215;;
+let _MIPS_INS_DPAQ_SA = 216;;
+let _MIPS_INS_DPAQ_S = 217;;
+let _MIPS_INS_DPAU = 218;;
+let _MIPS_INS_DPAX = 219;;
+let _MIPS_INS_DPA = 220;;
+let _MIPS_INS_DPOP = 221;;
+let _MIPS_INS_DPSQX_SA = 222;;
+let _MIPS_INS_DPSQX_S = 223;;
+let _MIPS_INS_DPSQ_SA = 224;;
+let _MIPS_INS_DPSQ_S = 225;;
+let _MIPS_INS_DPSUB_S = 226;;
+let _MIPS_INS_DPSUB_U = 227;;
+let _MIPS_INS_DPSU = 228;;
+let _MIPS_INS_DPSX = 229;;
+let _MIPS_INS_DPS = 230;;
+let _MIPS_INS_DROTR = 231;;
+let _MIPS_INS_DROTR32 = 232;;
+let _MIPS_INS_DROTRV = 233;;
+let _MIPS_INS_DSBH = 234;;
+let _MIPS_INS_DSHD = 235;;
+let _MIPS_INS_DSLL = 236;;
+let _MIPS_INS_DSLL32 = 237;;
+let _MIPS_INS_DSLLV = 238;;
+let _MIPS_INS_DSRA = 239;;
+let _MIPS_INS_DSRA32 = 240;;
+let _MIPS_INS_DSRAV = 241;;
+let _MIPS_INS_DSRL = 242;;
+let _MIPS_INS_DSRL32 = 243;;
+let _MIPS_INS_DSRLV = 244;;
+let _MIPS_INS_DSUB = 245;;
+let _MIPS_INS_DSUBU = 246;;
+let _MIPS_INS_EHB = 247;;
+let _MIPS_INS_EI = 248;;
+let _MIPS_INS_ERET = 249;;
+let _MIPS_INS_EXT = 250;;
+let _MIPS_INS_EXTP = 251;;
+let _MIPS_INS_EXTPDP = 252;;
+let _MIPS_INS_EXTPDPV = 253;;
+let _MIPS_INS_EXTPV = 254;;
+let _MIPS_INS_EXTRV_RS = 255;;
+let _MIPS_INS_EXTRV_R = 256;;
+let _MIPS_INS_EXTRV_S = 257;;
+let _MIPS_INS_EXTRV = 258;;
+let _MIPS_INS_EXTR_RS = 259;;
+let _MIPS_INS_EXTR_R = 260;;
+let _MIPS_INS_EXTR_S = 261;;
+let _MIPS_INS_EXTR = 262;;
+let _MIPS_INS_EXTS = 263;;
+let _MIPS_INS_EXTS32 = 264;;
+let _MIPS_INS_ABS = 265;;
+let _MIPS_INS_FADD = 266;;
+let _MIPS_INS_FCAF = 267;;
+let _MIPS_INS_FCEQ = 268;;
+let _MIPS_INS_FCLASS = 269;;
+let _MIPS_INS_FCLE = 270;;
+let _MIPS_INS_FCLT = 271;;
+let _MIPS_INS_FCNE = 272;;
+let _MIPS_INS_FCOR = 273;;
+let _MIPS_INS_FCUEQ = 274;;
+let _MIPS_INS_FCULE = 275;;
+let _MIPS_INS_FCULT = 276;;
+let _MIPS_INS_FCUNE = 277;;
+let _MIPS_INS_FCUN = 278;;
+let _MIPS_INS_FDIV = 279;;
+let _MIPS_INS_FEXDO = 280;;
+let _MIPS_INS_FEXP2 = 281;;
+let _MIPS_INS_FEXUPL = 282;;
+let _MIPS_INS_FEXUPR = 283;;
+let _MIPS_INS_FFINT_S = 284;;
+let _MIPS_INS_FFINT_U = 285;;
+let _MIPS_INS_FFQL = 286;;
+let _MIPS_INS_FFQR = 287;;
+let _MIPS_INS_FILL = 288;;
+let _MIPS_INS_FLOG2 = 289;;
+let _MIPS_INS_FLOOR = 290;;
+let _MIPS_INS_FMADD = 291;;
+let _MIPS_INS_FMAX_A = 292;;
+let _MIPS_INS_FMAX = 293;;
+let _MIPS_INS_FMIN_A = 294;;
+let _MIPS_INS_FMIN = 295;;
+let _MIPS_INS_MOV = 296;;
+let _MIPS_INS_FMSUB = 297;;
+let _MIPS_INS_FMUL = 298;;
+let _MIPS_INS_MUL = 299;;
+let _MIPS_INS_NEG = 300;;
+let _MIPS_INS_FRCP = 301;;
+let _MIPS_INS_FRINT = 302;;
+let _MIPS_INS_FRSQRT = 303;;
+let _MIPS_INS_FSAF = 304;;
+let _MIPS_INS_FSEQ = 305;;
+let _MIPS_INS_FSLE = 306;;
+let _MIPS_INS_FSLT = 307;;
+let _MIPS_INS_FSNE = 308;;
+let _MIPS_INS_FSOR = 309;;
+let _MIPS_INS_FSQRT = 310;;
+let _MIPS_INS_SQRT = 311;;
+let _MIPS_INS_FSUB = 312;;
+let _MIPS_INS_SUB = 313;;
+let _MIPS_INS_FSUEQ = 314;;
+let _MIPS_INS_FSULE = 315;;
+let _MIPS_INS_FSULT = 316;;
+let _MIPS_INS_FSUNE = 317;;
+let _MIPS_INS_FSUN = 318;;
+let _MIPS_INS_FTINT_S = 319;;
+let _MIPS_INS_FTINT_U = 320;;
+let _MIPS_INS_FTQ = 321;;
+let _MIPS_INS_FTRUNC_S = 322;;
+let _MIPS_INS_FTRUNC_U = 323;;
+let _MIPS_INS_HADD_S = 324;;
+let _MIPS_INS_HADD_U = 325;;
+let _MIPS_INS_HSUB_S = 326;;
+let _MIPS_INS_HSUB_U = 327;;
+let _MIPS_INS_ILVEV = 328;;
+let _MIPS_INS_ILVL = 329;;
+let _MIPS_INS_ILVOD = 330;;
+let _MIPS_INS_ILVR = 331;;
+let _MIPS_INS_INS = 332;;
+let _MIPS_INS_INSERT = 333;;
+let _MIPS_INS_INSV = 334;;
+let _MIPS_INS_INSVE = 335;;
+let _MIPS_INS_J = 336;;
+let _MIPS_INS_JAL = 337;;
+let _MIPS_INS_JALR = 338;;
+let _MIPS_INS_JALRS16 = 339;;
+let _MIPS_INS_JALRS = 340;;
+let _MIPS_INS_JALS = 341;;
+let _MIPS_INS_JALX = 342;;
+let _MIPS_INS_JIALC = 343;;
+let _MIPS_INS_JIC = 344;;
+let _MIPS_INS_JR = 345;;
+let _MIPS_INS_JR16 = 346;;
+let _MIPS_INS_JRADDIUSP = 347;;
+let _MIPS_INS_JRC = 348;;
+let _MIPS_INS_JALRC = 349;;
+let _MIPS_INS_LB = 350;;
+let _MIPS_INS_LBU16 = 351;;
+let _MIPS_INS_LBUX = 352;;
+let _MIPS_INS_LBU = 353;;
+let _MIPS_INS_LD = 354;;
+let _MIPS_INS_LDC1 = 355;;
+let _MIPS_INS_LDC2 = 356;;
+let _MIPS_INS_LDC3 = 357;;
+let _MIPS_INS_LDI = 358;;
+let _MIPS_INS_LDL = 359;;
+let _MIPS_INS_LDPC = 360;;
+let _MIPS_INS_LDR = 361;;
+let _MIPS_INS_LDXC1 = 362;;
+let _MIPS_INS_LH = 363;;
+let _MIPS_INS_LHU16 = 364;;
+let _MIPS_INS_LHX = 365;;
+let _MIPS_INS_LHU = 366;;
+let _MIPS_INS_LI16 = 367;;
+let _MIPS_INS_LL = 368;;
+let _MIPS_INS_LLD = 369;;
+let _MIPS_INS_LSA = 370;;
+let _MIPS_INS_LUXC1 = 371;;
+let _MIPS_INS_LUI = 372;;
+let _MIPS_INS_LW = 373;;
+let _MIPS_INS_LW16 = 374;;
+let _MIPS_INS_LWC1 = 375;;
+let _MIPS_INS_LWC2 = 376;;
+let _MIPS_INS_LWC3 = 377;;
+let _MIPS_INS_LWL = 378;;
+let _MIPS_INS_LWM16 = 379;;
+let _MIPS_INS_LWM32 = 380;;
+let _MIPS_INS_LWPC = 381;;
+let _MIPS_INS_LWP = 382;;
+let _MIPS_INS_LWR = 383;;
+let _MIPS_INS_LWUPC = 384;;
+let _MIPS_INS_LWU = 385;;
+let _MIPS_INS_LWX = 386;;
+let _MIPS_INS_LWXC1 = 387;;
+let _MIPS_INS_LWXS = 388;;
+let _MIPS_INS_LI = 389;;
+let _MIPS_INS_MADD = 390;;
+let _MIPS_INS_MADDF = 391;;
+let _MIPS_INS_MADDR_Q = 392;;
+let _MIPS_INS_MADDU = 393;;
+let _MIPS_INS_MADDV = 394;;
+let _MIPS_INS_MADD_Q = 395;;
+let _MIPS_INS_MAQ_SA = 396;;
+let _MIPS_INS_MAQ_S = 397;;
+let _MIPS_INS_MAXA = 398;;
+let _MIPS_INS_MAXI_S = 399;;
+let _MIPS_INS_MAXI_U = 400;;
+let _MIPS_INS_MAX_A = 401;;
+let _MIPS_INS_MAX = 402;;
+let _MIPS_INS_MAX_S = 403;;
+let _MIPS_INS_MAX_U = 404;;
+let _MIPS_INS_MFC0 = 405;;
+let _MIPS_INS_MFC1 = 406;;
+let _MIPS_INS_MFC2 = 407;;
+let _MIPS_INS_MFHC1 = 408;;
+let _MIPS_INS_MFHI = 409;;
+let _MIPS_INS_MFLO = 410;;
+let _MIPS_INS_MINA = 411;;
+let _MIPS_INS_MINI_S = 412;;
+let _MIPS_INS_MINI_U = 413;;
+let _MIPS_INS_MIN_A = 414;;
+let _MIPS_INS_MIN = 415;;
+let _MIPS_INS_MIN_S = 416;;
+let _MIPS_INS_MIN_U = 417;;
+let _MIPS_INS_MOD = 418;;
+let _MIPS_INS_MODSUB = 419;;
+let _MIPS_INS_MODU = 420;;
+let _MIPS_INS_MOD_S = 421;;
+let _MIPS_INS_MOD_U = 422;;
+let _MIPS_INS_MOVE = 423;;
+let _MIPS_INS_MOVEP = 424;;
+let _MIPS_INS_MOVF = 425;;
+let _MIPS_INS_MOVN = 426;;
+let _MIPS_INS_MOVT = 427;;
+let _MIPS_INS_MOVZ = 428;;
+let _MIPS_INS_MSUB = 429;;
+let _MIPS_INS_MSUBF = 430;;
+let _MIPS_INS_MSUBR_Q = 431;;
+let _MIPS_INS_MSUBU = 432;;
+let _MIPS_INS_MSUBV = 433;;
+let _MIPS_INS_MSUB_Q = 434;;
+let _MIPS_INS_MTC0 = 435;;
+let _MIPS_INS_MTC1 = 436;;
+let _MIPS_INS_MTC2 = 437;;
+let _MIPS_INS_MTHC1 = 438;;
+let _MIPS_INS_MTHI = 439;;
+let _MIPS_INS_MTHLIP = 440;;
+let _MIPS_INS_MTLO = 441;;
+let _MIPS_INS_MTM0 = 442;;
+let _MIPS_INS_MTM1 = 443;;
+let _MIPS_INS_MTM2 = 444;;
+let _MIPS_INS_MTP0 = 445;;
+let _MIPS_INS_MTP1 = 446;;
+let _MIPS_INS_MTP2 = 447;;
+let _MIPS_INS_MUH = 448;;
+let _MIPS_INS_MUHU = 449;;
+let _MIPS_INS_MULEQ_S = 450;;
+let _MIPS_INS_MULEU_S = 451;;
+let _MIPS_INS_MULQ_RS = 452;;
+let _MIPS_INS_MULQ_S = 453;;
+let _MIPS_INS_MULR_Q = 454;;
+let _MIPS_INS_MULSAQ_S = 455;;
+let _MIPS_INS_MULSA = 456;;
+let _MIPS_INS_MULT = 457;;
+let _MIPS_INS_MULTU = 458;;
+let _MIPS_INS_MULU = 459;;
+let _MIPS_INS_MULV = 460;;
+let _MIPS_INS_MUL_Q = 461;;
+let _MIPS_INS_MUL_S = 462;;
+let _MIPS_INS_NLOC = 463;;
+let _MIPS_INS_NLZC = 464;;
+let _MIPS_INS_NMADD = 465;;
+let _MIPS_INS_NMSUB = 466;;
+let _MIPS_INS_NOR = 467;;
+let _MIPS_INS_NORI = 468;;
+let _MIPS_INS_NOT16 = 469;;
+let _MIPS_INS_NOT = 470;;
+let _MIPS_INS_OR = 471;;
+let _MIPS_INS_OR16 = 472;;
+let _MIPS_INS_ORI = 473;;
+let _MIPS_INS_PACKRL = 474;;
+let _MIPS_INS_PAUSE = 475;;
+let _MIPS_INS_PCKEV = 476;;
+let _MIPS_INS_PCKOD = 477;;
+let _MIPS_INS_PCNT = 478;;
+let _MIPS_INS_PICK = 479;;
+let _MIPS_INS_POP = 480;;
+let _MIPS_INS_PRECEQU = 481;;
+let _MIPS_INS_PRECEQ = 482;;
+let _MIPS_INS_PRECEU = 483;;
+let _MIPS_INS_PRECRQU_S = 484;;
+let _MIPS_INS_PRECRQ = 485;;
+let _MIPS_INS_PRECRQ_RS = 486;;
+let _MIPS_INS_PRECR = 487;;
+let _MIPS_INS_PRECR_SRA = 488;;
+let _MIPS_INS_PRECR_SRA_R = 489;;
+let _MIPS_INS_PREF = 490;;
+let _MIPS_INS_PREPEND = 491;;
+let _MIPS_INS_RADDU = 492;;
+let _MIPS_INS_RDDSP = 493;;
+let _MIPS_INS_RDHWR = 494;;
+let _MIPS_INS_REPLV = 495;;
+let _MIPS_INS_REPL = 496;;
+let _MIPS_INS_RINT = 497;;
+let _MIPS_INS_ROTR = 498;;
+let _MIPS_INS_ROTRV = 499;;
+let _MIPS_INS_ROUND = 500;;
+let _MIPS_INS_SAT_S = 501;;
+let _MIPS_INS_SAT_U = 502;;
+let _MIPS_INS_SB = 503;;
+let _MIPS_INS_SB16 = 504;;
+let _MIPS_INS_SC = 505;;
+let _MIPS_INS_SCD = 506;;
+let _MIPS_INS_SD = 507;;
+let _MIPS_INS_SDBBP = 508;;
+let _MIPS_INS_SDBBP16 = 509;;
+let _MIPS_INS_SDC1 = 510;;
+let _MIPS_INS_SDC2 = 511;;
+let _MIPS_INS_SDC3 = 512;;
+let _MIPS_INS_SDL = 513;;
+let _MIPS_INS_SDR = 514;;
+let _MIPS_INS_SDXC1 = 515;;
+let _MIPS_INS_SEB = 516;;
+let _MIPS_INS_SEH = 517;;
+let _MIPS_INS_SELEQZ = 518;;
+let _MIPS_INS_SELNEZ = 519;;
+let _MIPS_INS_SEL = 520;;
+let _MIPS_INS_SEQ = 521;;
+let _MIPS_INS_SEQI = 522;;
+let _MIPS_INS_SH = 523;;
+let _MIPS_INS_SH16 = 524;;
+let _MIPS_INS_SHF = 525;;
+let _MIPS_INS_SHILO = 526;;
+let _MIPS_INS_SHILOV = 527;;
+let _MIPS_INS_SHLLV = 528;;
+let _MIPS_INS_SHLLV_S = 529;;
+let _MIPS_INS_SHLL = 530;;
+let _MIPS_INS_SHLL_S = 531;;
+let _MIPS_INS_SHRAV = 532;;
+let _MIPS_INS_SHRAV_R = 533;;
+let _MIPS_INS_SHRA = 534;;
+let _MIPS_INS_SHRA_R = 535;;
+let _MIPS_INS_SHRLV = 536;;
+let _MIPS_INS_SHRL = 537;;
+let _MIPS_INS_SLDI = 538;;
+let _MIPS_INS_SLD = 539;;
+let _MIPS_INS_SLL = 540;;
+let _MIPS_INS_SLL16 = 541;;
+let _MIPS_INS_SLLI = 542;;
+let _MIPS_INS_SLLV = 543;;
+let _MIPS_INS_SLT = 544;;
+let _MIPS_INS_SLTI = 545;;
+let _MIPS_INS_SLTIU = 546;;
+let _MIPS_INS_SLTU = 547;;
+let _MIPS_INS_SNE = 548;;
+let _MIPS_INS_SNEI = 549;;
+let _MIPS_INS_SPLATI = 550;;
+let _MIPS_INS_SPLAT = 551;;
+let _MIPS_INS_SRA = 552;;
+let _MIPS_INS_SRAI = 553;;
+let _MIPS_INS_SRARI = 554;;
+let _MIPS_INS_SRAR = 555;;
+let _MIPS_INS_SRAV = 556;;
+let _MIPS_INS_SRL = 557;;
+let _MIPS_INS_SRL16 = 558;;
+let _MIPS_INS_SRLI = 559;;
+let _MIPS_INS_SRLRI = 560;;
+let _MIPS_INS_SRLR = 561;;
+let _MIPS_INS_SRLV = 562;;
+let _MIPS_INS_SSNOP = 563;;
+let _MIPS_INS_ST = 564;;
+let _MIPS_INS_SUBQH = 565;;
+let _MIPS_INS_SUBQH_R = 566;;
+let _MIPS_INS_SUBQ = 567;;
+let _MIPS_INS_SUBQ_S = 568;;
+let _MIPS_INS_SUBSUS_U = 569;;
+let _MIPS_INS_SUBSUU_S = 570;;
+let _MIPS_INS_SUBS_S = 571;;
+let _MIPS_INS_SUBS_U = 572;;
+let _MIPS_INS_SUBU16 = 573;;
+let _MIPS_INS_SUBUH = 574;;
+let _MIPS_INS_SUBUH_R = 575;;
+let _MIPS_INS_SUBU = 576;;
+let _MIPS_INS_SUBU_S = 577;;
+let _MIPS_INS_SUBVI = 578;;
+let _MIPS_INS_SUBV = 579;;
+let _MIPS_INS_SUXC1 = 580;;
+let _MIPS_INS_SW = 581;;
+let _MIPS_INS_SW16 = 582;;
+let _MIPS_INS_SWC1 = 583;;
+let _MIPS_INS_SWC2 = 584;;
+let _MIPS_INS_SWC3 = 585;;
+let _MIPS_INS_SWL = 586;;
+let _MIPS_INS_SWM16 = 587;;
+let _MIPS_INS_SWM32 = 588;;
+let _MIPS_INS_SWP = 589;;
+let _MIPS_INS_SWR = 590;;
+let _MIPS_INS_SWXC1 = 591;;
+let _MIPS_INS_SYNC = 592;;
+let _MIPS_INS_SYNCI = 593;;
+let _MIPS_INS_SYSCALL = 594;;
+let _MIPS_INS_TEQ = 595;;
+let _MIPS_INS_TEQI = 596;;
+let _MIPS_INS_TGE = 597;;
+let _MIPS_INS_TGEI = 598;;
+let _MIPS_INS_TGEIU = 599;;
+let _MIPS_INS_TGEU = 600;;
+let _MIPS_INS_TLBP = 601;;
+let _MIPS_INS_TLBR = 602;;
+let _MIPS_INS_TLBWI = 603;;
+let _MIPS_INS_TLBWR = 604;;
+let _MIPS_INS_TLT = 605;;
+let _MIPS_INS_TLTI = 606;;
+let _MIPS_INS_TLTIU = 607;;
+let _MIPS_INS_TLTU = 608;;
+let _MIPS_INS_TNE = 609;;
+let _MIPS_INS_TNEI = 610;;
+let _MIPS_INS_TRUNC = 611;;
+let _MIPS_INS_V3MULU = 612;;
+let _MIPS_INS_VMM0 = 613;;
+let _MIPS_INS_VMULU = 614;;
+let _MIPS_INS_VSHF = 615;;
+let _MIPS_INS_WAIT = 616;;
+let _MIPS_INS_WRDSP = 617;;
+let _MIPS_INS_WSBH = 618;;
+let _MIPS_INS_XOR = 619;;
+let _MIPS_INS_XOR16 = 620;;
+let _MIPS_INS_XORI = 621;;
+
+(* some alias instructions *)
+let _MIPS_INS_NOP = 622;;
+let _MIPS_INS_NEGU = 623;;
+
+(* special instructions *)
+let _MIPS_INS_JALR_HB = 624;;
+let _MIPS_INS_JR_HB = 625;;
+let _MIPS_INS_ENDING = 626;;
+
+let _MIPS_GRP_INVALID = 0;;
+let _MIPS_GRP_JUMP = 1;;
+let _MIPS_GRP_CALL = 2;;
+let _MIPS_GRP_RET = 3;;
+let _MIPS_GRP_INT = 4;;
+let _MIPS_GRP_IRET = 5;;
+let _MIPS_GRP_PRIVILEGE = 6;;
+let _MIPS_GRP_BRANCH_RELATIVE = 7;;
+let _MIPS_GRP_BITCOUNT = 128;;
+let _MIPS_GRP_DSP = 129;;
+let _MIPS_GRP_DSPR2 = 130;;
+let _MIPS_GRP_FPIDX = 131;;
+let _MIPS_GRP_MSA = 132;;
+let _MIPS_GRP_MIPS32R2 = 133;;
+let _MIPS_GRP_MIPS64 = 134;;
+let _MIPS_GRP_MIPS64R2 = 135;;
+let _MIPS_GRP_SEINREG = 136;;
+let _MIPS_GRP_STDENC = 137;;
+let _MIPS_GRP_SWAP = 138;;
+let _MIPS_GRP_MICROMIPS = 139;;
+let _MIPS_GRP_MIPS16MODE = 140;;
+let _MIPS_GRP_FP64BIT = 141;;
+let _MIPS_GRP_NONANSFPMATH = 142;;
+let _MIPS_GRP_NOTFP64BIT = 143;;
+let _MIPS_GRP_NOTINMICROMIPS = 144;;
+let _MIPS_GRP_NOTNACL = 145;;
+let _MIPS_GRP_NOTMIPS32R6 = 146;;
+let _MIPS_GRP_NOTMIPS64R6 = 147;;
+let _MIPS_GRP_CNMIPS = 148;;
+let _MIPS_GRP_MIPS32 = 149;;
+let _MIPS_GRP_MIPS32R6 = 150;;
+let _MIPS_GRP_MIPS64R6 = 151;;
+let _MIPS_GRP_MIPS2 = 152;;
+let _MIPS_GRP_MIPS3 = 153;;
+let _MIPS_GRP_MIPS3_32 = 154;;
+let _MIPS_GRP_MIPS3_32R2 = 155;;
+let _MIPS_GRP_MIPS4_32 = 156;;
+let _MIPS_GRP_MIPS4_32R2 = 157;;
+let _MIPS_GRP_MIPS5_32R2 = 158;;
+let _MIPS_GRP_GP32BIT = 159;;
+let _MIPS_GRP_GP64BIT = 160;;
+let _MIPS_GRP_ENDING = 161;;

thirdparty/capstone/bindings/ocaml/ppc.ml

@@ -0,0 +1,34 @@
+(* Capstone Disassembly Engine
+ * By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Ppc_const
+
+type ppc_op_mem = {
+	base: int;
+	disp: int;
+}
+
+type ppc_op_crx = {
+	scale: int;
+	reg: int;
+	cond: int;
+}
+
+type ppc_op_value = 
+	| PPC_OP_INVALID of int
+	| PPC_OP_REG of int
+	| PPC_OP_IMM of int
+	| PPC_OP_MEM of ppc_op_mem
+	| PPC_OP_CRX of ppc_op_crx
+
+type ppc_op = {
+	value: ppc_op_value;
+}
+
+type cs_ppc = { 
+	bc: int;
+	bh: int;
+	update_cr0: bool;
+	operands: ppc_op array;
+}
+

thirdparty/capstone/bindings/ocaml/sparc.ml

@@ -0,0 +1,27 @@
+(* Capstone Disassembly Engine
+ * By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Sparc_const
+
+type sparc_op_mem = {
+	base: int;
+	index: int;
+	disp: int;
+}
+
+type sparc_op_value = 
+	| SPARC_OP_INVALID of int
+	| SPARC_OP_REG of int
+	| SPARC_OP_IMM of int
+	| SPARC_OP_MEM of sparc_op_mem
+
+type sparc_op = {
+	value: sparc_op_value;
+}
+
+type cs_sparc = { 
+	cc: int;
+	hint: int;
+	operands: sparc_op array;
+}
+

thirdparty/capstone/bindings/ocaml/sparc_const.ml

@@ -0,0 +1,429 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.ml] *)
+
+let _SPARC_CC_INVALID = 0;;
+let _SPARC_CC_ICC_A = 8+256;;
+let _SPARC_CC_ICC_N = 0+256;;
+let _SPARC_CC_ICC_NE = 9+256;;
+let _SPARC_CC_ICC_E = 1+256;;
+let _SPARC_CC_ICC_G = 10+256;;
+let _SPARC_CC_ICC_LE = 2+256;;
+let _SPARC_CC_ICC_GE = 11+256;;
+let _SPARC_CC_ICC_L = 3+256;;
+let _SPARC_CC_ICC_GU = 12+256;;
+let _SPARC_CC_ICC_LEU = 4+256;;
+let _SPARC_CC_ICC_CC = 13+256;;
+let _SPARC_CC_ICC_CS = 5+256;;
+let _SPARC_CC_ICC_POS = 14+256;;
+let _SPARC_CC_ICC_NEG = 6+256;;
+let _SPARC_CC_ICC_VC = 15+256;;
+let _SPARC_CC_ICC_VS = 7+256;;
+let _SPARC_CC_FCC_A = 8+16+256;;
+let _SPARC_CC_FCC_N = 0+16+256;;
+let _SPARC_CC_FCC_U = 7+16+256;;
+let _SPARC_CC_FCC_G = 6+16+256;;
+let _SPARC_CC_FCC_UG = 5+16+256;;
+let _SPARC_CC_FCC_L = 4+16+256;;
+let _SPARC_CC_FCC_UL = 3+16+256;;
+let _SPARC_CC_FCC_LG = 2+16+256;;
+let _SPARC_CC_FCC_NE = 1+16+256;;
+let _SPARC_CC_FCC_E = 9+16+256;;
+let _SPARC_CC_FCC_UE = 10+16+256;;
+let _SPARC_CC_FCC_GE = 11+16+256;;
+let _SPARC_CC_FCC_UGE = 12+16+256;;
+let _SPARC_CC_FCC_LE = 13+16+256;;
+let _SPARC_CC_FCC_ULE = 14+16+256;;
+let _SPARC_CC_FCC_O = 15+16+256;;
+
+let _SPARC_HINT_INVALID = 0;;
+let _SPARC_HINT_A = 1 lsl 0;;
+let _SPARC_HINT_PT = 1 lsl 1;;
+let _SPARC_HINT_PN = 1 lsl 2;;
+
+let _SPARC_OP_INVALID = 0;;
+let _SPARC_OP_REG = 1;;
+let _SPARC_OP_IMM = 2;;
+let _SPARC_OP_MEM = 3;;
+
+let _SPARC_REG_INVALID = 0;;
+let _SPARC_REG_F0 = 1;;
+let _SPARC_REG_F1 = 2;;
+let _SPARC_REG_F2 = 3;;
+let _SPARC_REG_F3 = 4;;
+let _SPARC_REG_F4 = 5;;
+let _SPARC_REG_F5 = 6;;
+let _SPARC_REG_F6 = 7;;
+let _SPARC_REG_F7 = 8;;
+let _SPARC_REG_F8 = 9;;
+let _SPARC_REG_F9 = 10;;
+let _SPARC_REG_F10 = 11;;
+let _SPARC_REG_F11 = 12;;
+let _SPARC_REG_F12 = 13;;
+let _SPARC_REG_F13 = 14;;
+let _SPARC_REG_F14 = 15;;
+let _SPARC_REG_F15 = 16;;
+let _SPARC_REG_F16 = 17;;
+let _SPARC_REG_F17 = 18;;
+let _SPARC_REG_F18 = 19;;
+let _SPARC_REG_F19 = 20;;
+let _SPARC_REG_F20 = 21;;
+let _SPARC_REG_F21 = 22;;
+let _SPARC_REG_F22 = 23;;
+let _SPARC_REG_F23 = 24;;
+let _SPARC_REG_F24 = 25;;
+let _SPARC_REG_F25 = 26;;
+let _SPARC_REG_F26 = 27;;
+let _SPARC_REG_F27 = 28;;
+let _SPARC_REG_F28 = 29;;
+let _SPARC_REG_F29 = 30;;
+let _SPARC_REG_F30 = 31;;
+let _SPARC_REG_F31 = 32;;
+let _SPARC_REG_F32 = 33;;
+let _SPARC_REG_F34 = 34;;
+let _SPARC_REG_F36 = 35;;
+let _SPARC_REG_F38 = 36;;
+let _SPARC_REG_F40 = 37;;
+let _SPARC_REG_F42 = 38;;
+let _SPARC_REG_F44 = 39;;
+let _SPARC_REG_F46 = 40;;
+let _SPARC_REG_F48 = 41;;
+let _SPARC_REG_F50 = 42;;
+let _SPARC_REG_F52 = 43;;
+let _SPARC_REG_F54 = 44;;
+let _SPARC_REG_F56 = 45;;
+let _SPARC_REG_F58 = 46;;
+let _SPARC_REG_F60 = 47;;
+let _SPARC_REG_F62 = 48;;
+let _SPARC_REG_FCC0 = 49;;
+let _SPARC_REG_FCC1 = 50;;
+let _SPARC_REG_FCC2 = 51;;
+let _SPARC_REG_FCC3 = 52;;
+let _SPARC_REG_FP = 53;;
+let _SPARC_REG_G0 = 54;;
+let _SPARC_REG_G1 = 55;;
+let _SPARC_REG_G2 = 56;;
+let _SPARC_REG_G3 = 57;;
+let _SPARC_REG_G4 = 58;;
+let _SPARC_REG_G5 = 59;;
+let _SPARC_REG_G6 = 60;;
+let _SPARC_REG_G7 = 61;;
+let _SPARC_REG_I0 = 62;;
+let _SPARC_REG_I1 = 63;;
+let _SPARC_REG_I2 = 64;;
+let _SPARC_REG_I3 = 65;;
+let _SPARC_REG_I4 = 66;;
+let _SPARC_REG_I5 = 67;;
+let _SPARC_REG_I7 = 68;;
+let _SPARC_REG_ICC = 69;;
+let _SPARC_REG_L0 = 70;;
+let _SPARC_REG_L1 = 71;;
+let _SPARC_REG_L2 = 72;;
+let _SPARC_REG_L3 = 73;;
+let _SPARC_REG_L4 = 74;;
+let _SPARC_REG_L5 = 75;;
+let _SPARC_REG_L6 = 76;;
+let _SPARC_REG_L7 = 77;;
+let _SPARC_REG_O0 = 78;;
+let _SPARC_REG_O1 = 79;;
+let _SPARC_REG_O2 = 80;;
+let _SPARC_REG_O3 = 81;;
+let _SPARC_REG_O4 = 82;;
+let _SPARC_REG_O5 = 83;;
+let _SPARC_REG_O7 = 84;;
+let _SPARC_REG_SP = 85;;
+let _SPARC_REG_Y = 86;;
+let _SPARC_REG_XCC = 87;;
+let _SPARC_REG_ENDING = 88;;
+let _SPARC_REG_O6 = _SPARC_REG_SP;;
+let _SPARC_REG_I6 = _SPARC_REG_FP;;
+
+let _SPARC_INS_INVALID = 0;;
+let _SPARC_INS_ADDCC = 1;;
+let _SPARC_INS_ADDX = 2;;
+let _SPARC_INS_ADDXCC = 3;;
+let _SPARC_INS_ADDXC = 4;;
+let _SPARC_INS_ADDXCCC = 5;;
+let _SPARC_INS_ADD = 6;;
+let _SPARC_INS_ALIGNADDR = 7;;
+let _SPARC_INS_ALIGNADDRL = 8;;
+let _SPARC_INS_ANDCC = 9;;
+let _SPARC_INS_ANDNCC = 10;;
+let _SPARC_INS_ANDN = 11;;
+let _SPARC_INS_AND = 12;;
+let _SPARC_INS_ARRAY16 = 13;;
+let _SPARC_INS_ARRAY32 = 14;;
+let _SPARC_INS_ARRAY8 = 15;;
+let _SPARC_INS_B = 16;;
+let _SPARC_INS_JMP = 17;;
+let _SPARC_INS_BMASK = 18;;
+let _SPARC_INS_FB = 19;;
+let _SPARC_INS_BRGEZ = 20;;
+let _SPARC_INS_BRGZ = 21;;
+let _SPARC_INS_BRLEZ = 22;;
+let _SPARC_INS_BRLZ = 23;;
+let _SPARC_INS_BRNZ = 24;;
+let _SPARC_INS_BRZ = 25;;
+let _SPARC_INS_BSHUFFLE = 26;;
+let _SPARC_INS_CALL = 27;;
+let _SPARC_INS_CASX = 28;;
+let _SPARC_INS_CAS = 29;;
+let _SPARC_INS_CMASK16 = 30;;
+let _SPARC_INS_CMASK32 = 31;;
+let _SPARC_INS_CMASK8 = 32;;
+let _SPARC_INS_CMP = 33;;
+let _SPARC_INS_EDGE16 = 34;;
+let _SPARC_INS_EDGE16L = 35;;
+let _SPARC_INS_EDGE16LN = 36;;
+let _SPARC_INS_EDGE16N = 37;;
+let _SPARC_INS_EDGE32 = 38;;
+let _SPARC_INS_EDGE32L = 39;;
+let _SPARC_INS_EDGE32LN = 40;;
+let _SPARC_INS_EDGE32N = 41;;
+let _SPARC_INS_EDGE8 = 42;;
+let _SPARC_INS_EDGE8L = 43;;
+let _SPARC_INS_EDGE8LN = 44;;
+let _SPARC_INS_EDGE8N = 45;;
+let _SPARC_INS_FABSD = 46;;
+let _SPARC_INS_FABSQ = 47;;
+let _SPARC_INS_FABSS = 48;;
+let _SPARC_INS_FADDD = 49;;
+let _SPARC_INS_FADDQ = 50;;
+let _SPARC_INS_FADDS = 51;;
+let _SPARC_INS_FALIGNDATA = 52;;
+let _SPARC_INS_FAND = 53;;
+let _SPARC_INS_FANDNOT1 = 54;;
+let _SPARC_INS_FANDNOT1S = 55;;
+let _SPARC_INS_FANDNOT2 = 56;;
+let _SPARC_INS_FANDNOT2S = 57;;
+let _SPARC_INS_FANDS = 58;;
+let _SPARC_INS_FCHKSM16 = 59;;
+let _SPARC_INS_FCMPD = 60;;
+let _SPARC_INS_FCMPEQ16 = 61;;
+let _SPARC_INS_FCMPEQ32 = 62;;
+let _SPARC_INS_FCMPGT16 = 63;;
+let _SPARC_INS_FCMPGT32 = 64;;
+let _SPARC_INS_FCMPLE16 = 65;;
+let _SPARC_INS_FCMPLE32 = 66;;
+let _SPARC_INS_FCMPNE16 = 67;;
+let _SPARC_INS_FCMPNE32 = 68;;
+let _SPARC_INS_FCMPQ = 69;;
+let _SPARC_INS_FCMPS = 70;;
+let _SPARC_INS_FDIVD = 71;;
+let _SPARC_INS_FDIVQ = 72;;
+let _SPARC_INS_FDIVS = 73;;
+let _SPARC_INS_FDMULQ = 74;;
+let _SPARC_INS_FDTOI = 75;;
+let _SPARC_INS_FDTOQ = 76;;
+let _SPARC_INS_FDTOS = 77;;
+let _SPARC_INS_FDTOX = 78;;
+let _SPARC_INS_FEXPAND = 79;;
+let _SPARC_INS_FHADDD = 80;;
+let _SPARC_INS_FHADDS = 81;;
+let _SPARC_INS_FHSUBD = 82;;
+let _SPARC_INS_FHSUBS = 83;;
+let _SPARC_INS_FITOD = 84;;
+let _SPARC_INS_FITOQ = 85;;
+let _SPARC_INS_FITOS = 86;;
+let _SPARC_INS_FLCMPD = 87;;
+let _SPARC_INS_FLCMPS = 88;;
+let _SPARC_INS_FLUSHW = 89;;
+let _SPARC_INS_FMEAN16 = 90;;
+let _SPARC_INS_FMOVD = 91;;
+let _SPARC_INS_FMOVQ = 92;;
+let _SPARC_INS_FMOVRDGEZ = 93;;
+let _SPARC_INS_FMOVRQGEZ = 94;;
+let _SPARC_INS_FMOVRSGEZ = 95;;
+let _SPARC_INS_FMOVRDGZ = 96;;
+let _SPARC_INS_FMOVRQGZ = 97;;
+let _SPARC_INS_FMOVRSGZ = 98;;
+let _SPARC_INS_FMOVRDLEZ = 99;;
+let _SPARC_INS_FMOVRQLEZ = 100;;
+let _SPARC_INS_FMOVRSLEZ = 101;;
+let _SPARC_INS_FMOVRDLZ = 102;;
+let _SPARC_INS_FMOVRQLZ = 103;;
+let _SPARC_INS_FMOVRSLZ = 104;;
+let _SPARC_INS_FMOVRDNZ = 105;;
+let _SPARC_INS_FMOVRQNZ = 106;;
+let _SPARC_INS_FMOVRSNZ = 107;;
+let _SPARC_INS_FMOVRDZ = 108;;
+let _SPARC_INS_FMOVRQZ = 109;;
+let _SPARC_INS_FMOVRSZ = 110;;
+let _SPARC_INS_FMOVS = 111;;
+let _SPARC_INS_FMUL8SUX16 = 112;;
+let _SPARC_INS_FMUL8ULX16 = 113;;
+let _SPARC_INS_FMUL8X16 = 114;;
+let _SPARC_INS_FMUL8X16AL = 115;;
+let _SPARC_INS_FMUL8X16AU = 116;;
+let _SPARC_INS_FMULD = 117;;
+let _SPARC_INS_FMULD8SUX16 = 118;;
+let _SPARC_INS_FMULD8ULX16 = 119;;
+let _SPARC_INS_FMULQ = 120;;
+let _SPARC_INS_FMULS = 121;;
+let _SPARC_INS_FNADDD = 122;;
+let _SPARC_INS_FNADDS = 123;;
+let _SPARC_INS_FNAND = 124;;
+let _SPARC_INS_FNANDS = 125;;
+let _SPARC_INS_FNEGD = 126;;
+let _SPARC_INS_FNEGQ = 127;;
+let _SPARC_INS_FNEGS = 128;;
+let _SPARC_INS_FNHADDD = 129;;
+let _SPARC_INS_FNHADDS = 130;;
+let _SPARC_INS_FNOR = 131;;
+let _SPARC_INS_FNORS = 132;;
+let _SPARC_INS_FNOT1 = 133;;
+let _SPARC_INS_FNOT1S = 134;;
+let _SPARC_INS_FNOT2 = 135;;
+let _SPARC_INS_FNOT2S = 136;;
+let _SPARC_INS_FONE = 137;;
+let _SPARC_INS_FONES = 138;;
+let _SPARC_INS_FOR = 139;;
+let _SPARC_INS_FORNOT1 = 140;;
+let _SPARC_INS_FORNOT1S = 141;;
+let _SPARC_INS_FORNOT2 = 142;;
+let _SPARC_INS_FORNOT2S = 143;;
+let _SPARC_INS_FORS = 144;;
+let _SPARC_INS_FPACK16 = 145;;
+let _SPARC_INS_FPACK32 = 146;;
+let _SPARC_INS_FPACKFIX = 147;;
+let _SPARC_INS_FPADD16 = 148;;
+let _SPARC_INS_FPADD16S = 149;;
+let _SPARC_INS_FPADD32 = 150;;
+let _SPARC_INS_FPADD32S = 151;;
+let _SPARC_INS_FPADD64 = 152;;
+let _SPARC_INS_FPMERGE = 153;;
+let _SPARC_INS_FPSUB16 = 154;;
+let _SPARC_INS_FPSUB16S = 155;;
+let _SPARC_INS_FPSUB32 = 156;;
+let _SPARC_INS_FPSUB32S = 157;;
+let _SPARC_INS_FQTOD = 158;;
+let _SPARC_INS_FQTOI = 159;;
+let _SPARC_INS_FQTOS = 160;;
+let _SPARC_INS_FQTOX = 161;;
+let _SPARC_INS_FSLAS16 = 162;;
+let _SPARC_INS_FSLAS32 = 163;;
+let _SPARC_INS_FSLL16 = 164;;
+let _SPARC_INS_FSLL32 = 165;;
+let _SPARC_INS_FSMULD = 166;;
+let _SPARC_INS_FSQRTD = 167;;
+let _SPARC_INS_FSQRTQ = 168;;
+let _SPARC_INS_FSQRTS = 169;;
+let _SPARC_INS_FSRA16 = 170;;
+let _SPARC_INS_FSRA32 = 171;;
+let _SPARC_INS_FSRC1 = 172;;
+let _SPARC_INS_FSRC1S = 173;;
+let _SPARC_INS_FSRC2 = 174;;
+let _SPARC_INS_FSRC2S = 175;;
+let _SPARC_INS_FSRL16 = 176;;
+let _SPARC_INS_FSRL32 = 177;;
+let _SPARC_INS_FSTOD = 178;;
+let _SPARC_INS_FSTOI = 179;;
+let _SPARC_INS_FSTOQ = 180;;
+let _SPARC_INS_FSTOX = 181;;
+let _SPARC_INS_FSUBD = 182;;
+let _SPARC_INS_FSUBQ = 183;;
+let _SPARC_INS_FSUBS = 184;;
+let _SPARC_INS_FXNOR = 185;;
+let _SPARC_INS_FXNORS = 186;;
+let _SPARC_INS_FXOR = 187;;
+let _SPARC_INS_FXORS = 188;;
+let _SPARC_INS_FXTOD = 189;;
+let _SPARC_INS_FXTOQ = 190;;
+let _SPARC_INS_FXTOS = 191;;
+let _SPARC_INS_FZERO = 192;;
+let _SPARC_INS_FZEROS = 193;;
+let _SPARC_INS_JMPL = 194;;
+let _SPARC_INS_LDD = 195;;
+let _SPARC_INS_LD = 196;;
+let _SPARC_INS_LDQ = 197;;
+let _SPARC_INS_LDSB = 198;;
+let _SPARC_INS_LDSH = 199;;
+let _SPARC_INS_LDSW = 200;;
+let _SPARC_INS_LDUB = 201;;
+let _SPARC_INS_LDUH = 202;;
+let _SPARC_INS_LDX = 203;;
+let _SPARC_INS_LZCNT = 204;;
+let _SPARC_INS_MEMBAR = 205;;
+let _SPARC_INS_MOVDTOX = 206;;
+let _SPARC_INS_MOV = 207;;
+let _SPARC_INS_MOVRGEZ = 208;;
+let _SPARC_INS_MOVRGZ = 209;;
+let _SPARC_INS_MOVRLEZ = 210;;
+let _SPARC_INS_MOVRLZ = 211;;
+let _SPARC_INS_MOVRNZ = 212;;
+let _SPARC_INS_MOVRZ = 213;;
+let _SPARC_INS_MOVSTOSW = 214;;
+let _SPARC_INS_MOVSTOUW = 215;;
+let _SPARC_INS_MULX = 216;;
+let _SPARC_INS_NOP = 217;;
+let _SPARC_INS_ORCC = 218;;
+let _SPARC_INS_ORNCC = 219;;
+let _SPARC_INS_ORN = 220;;
+let _SPARC_INS_OR = 221;;
+let _SPARC_INS_PDIST = 222;;
+let _SPARC_INS_PDISTN = 223;;
+let _SPARC_INS_POPC = 224;;
+let _SPARC_INS_RD = 225;;
+let _SPARC_INS_RESTORE = 226;;
+let _SPARC_INS_RETT = 227;;
+let _SPARC_INS_SAVE = 228;;
+let _SPARC_INS_SDIVCC = 229;;
+let _SPARC_INS_SDIVX = 230;;
+let _SPARC_INS_SDIV = 231;;
+let _SPARC_INS_SETHI = 232;;
+let _SPARC_INS_SHUTDOWN = 233;;
+let _SPARC_INS_SIAM = 234;;
+let _SPARC_INS_SLLX = 235;;
+let _SPARC_INS_SLL = 236;;
+let _SPARC_INS_SMULCC = 237;;
+let _SPARC_INS_SMUL = 238;;
+let _SPARC_INS_SRAX = 239;;
+let _SPARC_INS_SRA = 240;;
+let _SPARC_INS_SRLX = 241;;
+let _SPARC_INS_SRL = 242;;
+let _SPARC_INS_STBAR = 243;;
+let _SPARC_INS_STB = 244;;
+let _SPARC_INS_STD = 245;;
+let _SPARC_INS_ST = 246;;
+let _SPARC_INS_STH = 247;;
+let _SPARC_INS_STQ = 248;;
+let _SPARC_INS_STX = 249;;
+let _SPARC_INS_SUBCC = 250;;
+let _SPARC_INS_SUBX = 251;;
+let _SPARC_INS_SUBXCC = 252;;
+let _SPARC_INS_SUB = 253;;
+let _SPARC_INS_SWAP = 254;;
+let _SPARC_INS_TADDCCTV = 255;;
+let _SPARC_INS_TADDCC = 256;;
+let _SPARC_INS_T = 257;;
+let _SPARC_INS_TSUBCCTV = 258;;
+let _SPARC_INS_TSUBCC = 259;;
+let _SPARC_INS_UDIVCC = 260;;
+let _SPARC_INS_UDIVX = 261;;
+let _SPARC_INS_UDIV = 262;;
+let _SPARC_INS_UMULCC = 263;;
+let _SPARC_INS_UMULXHI = 264;;
+let _SPARC_INS_UMUL = 265;;
+let _SPARC_INS_UNIMP = 266;;
+let _SPARC_INS_FCMPED = 267;;
+let _SPARC_INS_FCMPEQ = 268;;
+let _SPARC_INS_FCMPES = 269;;
+let _SPARC_INS_WR = 270;;
+let _SPARC_INS_XMULX = 271;;
+let _SPARC_INS_XMULXHI = 272;;
+let _SPARC_INS_XNORCC = 273;;
+let _SPARC_INS_XNOR = 274;;
+let _SPARC_INS_XORCC = 275;;
+let _SPARC_INS_XOR = 276;;
+let _SPARC_INS_RET = 277;;
+let _SPARC_INS_RETL = 278;;
+let _SPARC_INS_ENDING = 279;;
+
+let _SPARC_GRP_INVALID = 0;;
+let _SPARC_GRP_JUMP = 1;;
+let _SPARC_GRP_HARDQUAD = 128;;
+let _SPARC_GRP_V9 = 129;;
+let _SPARC_GRP_VIS = 130;;
+let _SPARC_GRP_VIS2 = 131;;
+let _SPARC_GRP_VIS3 = 132;;
+let _SPARC_GRP_32BIT = 133;;
+let _SPARC_GRP_64BIT = 134;;
+let _SPARC_GRP_ENDING = 135;;

thirdparty/capstone/bindings/ocaml/systemz.ml

@@ -0,0 +1,27 @@
+(* Capstone Disassembly Engine
+ * By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Sysz_const
+
+type sysz_op_mem = {
+	base: int;
+	index: int;
+	length: int64;
+	disp: int64;
+}
+
+type sysz_op_value = 
+	| SYSZ_OP_INVALID of int
+	| SYSZ_OP_REG of int
+	| SYSZ_OP_ACREG of int
+	| SYSZ_OP_IMM of int
+	| SYSZ_OP_MEM of sysz_op_mem
+
+type sysz_op = {
+	value: sysz_op_value;
+}
+
+type cs_sysz = { 
+	cc: int;
+	operands: sysz_op array;
+}

thirdparty/capstone/bindings/ocaml/test_arm.ml

@@ -0,0 +1,105 @@
+(* Capstone Disassembly Engine
+* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open Capstone
+open Arm
+open Arm_const
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
+let _ARM_CODE2 = "\xd1\xe8\x00\xf0\xf0\x24\x04\x07\x1f\x3c\xf2\xc0\x00\x00\x4f\xf0\x00\x01\x46\x6c";;
+let _THUMB_CODE2  = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0";;
+let _THUMB_CODE  = "\x70\x47\xeb\x46\x83\xb0\xc9\x68\x1f\xb1";;
+
+
+let all_tests = [
+        (CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM");
+        (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "Thumb");
+        (CS_ARCH_ARM, [CS_MODE_THUMB], _ARM_CODE2, "Thumb-mixed");
+        (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "Thumb-2");
+];;
+
+
+let print_op handle i op =
+	( match op.value with
+	| ARM_OP_INVALID _ -> ();	(* this would never happens *)
+	| ARM_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| ARM_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm;
+	| ARM_OP_PIMM imm -> printf "\t\top[%d]: P-IMM = %u\n" i imm;
+	| ARM_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| ARM_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp;
+	| ARM_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
+		if mem.scale != 1 then
+			printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale;
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		if mem.lshift != 0 then
+			printf "\t\t\toperands[%u].mem.lshift: 0x%x\n" i mem.lshift;
+		);
+	| ARM_OP_SETEND sd -> printf "\t\top[%d]: SETEND = %u\n" i sd;
+	);
+
+	if op.shift.shift_type != _ARM_SFT_INVALID && op.shift.shift_value > 0 then
+		printf "\t\t\tShift: type = %u, value = %u\n"
+                op.shift.shift_type op.shift.shift_value;
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_ARM arm -> (
+			if arm.cc != _ARM_CC_AL && arm.cc != _ARM_CC_INVALID then
+			printf "\tCode condition: %u\n" arm.cc;
+
+			if arm.update_flags then
+			printf "\tUpdate-flags: True\n";
+
+			if arm.writeback then
+			printf "\tWriteback: True\n";
+
+			(* print all operands info (type & value) *)
+			if (Array.length arm.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length arm.operands);
+				Array.iteri (print_op handle) arm.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;

thirdparty/capstone/bindings/ocaml/test_arm64.ml

@@ -0,0 +1,101 @@
+(* Capstone Disassembly Engine
+* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open Capstone
+open Arm64
+open Arm64_const
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b";;
+
+let all_tests = [
+        (CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| ARM64_OP_INVALID _ -> ();	(* this would never happens *)
+	| ARM64_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| ARM64_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm;
+	| ARM64_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| ARM64_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp;
+	| ARM64_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		);
+	| ARM64_OP_REG_MRS reg -> printf "\t\top[%d]: REG_MRS = %u\n" i reg;
+	| ARM64_OP_REG_MSR reg -> printf "\t\top[%d]: REG_MSR = %u\n" i reg;
+	| ARM64_OP_PSTATE v -> printf "\t\top[%d]: PSTATE = %u\n" i v;
+	| ARM64_OP_SYS v -> printf "\t\top[%d]: SYS = %u\n" i v;
+	| ARM64_OP_PREFETCH v -> printf "\t\top[%d]: PREFETCH = %u\n" i v;
+	| ARM64_OP_BARRIER v -> printf "\t\top[%d]: BARRIER = %u\n" i v;
+	);
+
+	if op.shift.shift_type != _ARM64_SFT_INVALID && op.shift.shift_value > 0 then
+		printf "\t\t\tShift: type = %u, value = %u\n"
+                op.shift.shift_type op.shift.shift_value;
+	if op.ext != _ARM64_EXT_INVALID then
+		printf "\t\t\tExt: %u\n" op.ext;
+
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_ARM64 arm64 -> (
+			if arm64.cc != _ARM64_CC_AL && arm64.cc != _ARM64_CC_INVALID then
+			printf "\tCode condition: %u\n" arm64.cc;
+
+			if arm64.update_flags then
+			printf "\tUpdate-flags: True\n";
+
+			if arm64.writeback then
+			printf "\tWriteback: True\n";
+
+			(* print all operands info (type & value) *)
+			if (Array.length arm64.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length arm64.operands);
+				Array.iteri (print_op handle) arm64.operands;
+			);
+			printf "\n";
+		)
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+
+List.iter print_arch all_tests;;

thirdparty/capstone/bindings/ocaml/test_basic.ml

@@ -0,0 +1,67 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open List
+open Capstone
+
+let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
+let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
+let _ARM_CODE2 = "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3";;
+let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68";;
+let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88";;
+let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
+let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
+let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9";;
+let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
+let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
+let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
+let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
+let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
+
+let all_tests = [
+	(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L);
+	(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L);
+	(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0L);
+	(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0L);
+	(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0L);
+	(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0L);
+	(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0L);
+	(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0L);
+	(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0L);
+        (CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0L);
+        (CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64, print register with number only", 0L);
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0L);
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0L);
+        (CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0L);
+        (CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0L);
+];;
+
+
+let print_insn insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;;
+
+let print_arch x =
+	let (arch, mode, code, comment, syntax) = x in
+	let handle = cs_open arch mode in (
+		if syntax != 0L then (
+			let err = cs_option handle CS_OPT_SYNTAX syntax in
+			match err with
+			| _ -> ();
+		);
+		let insns = cs_disasm handle code 0x1000L 0L in (
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter print_insn insns;
+		);
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+	);;
+
+
+List.iter print_arch all_tests;;

thirdparty/capstone/bindings/ocaml/test_detail.ml

@@ -0,0 +1,87 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open List
+open Capstone
+
+let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
+let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
+let _ARM_CODE2 = "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3";;
+let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68";;
+let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88";;
+let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
+let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
+let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9";;
+let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
+let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
+let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
+let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
+let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
+
+let all_tests = [
+	(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", 0);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0);
+	(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0);
+	(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0);
+	(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0);
+	(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0);
+	(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0);
+	(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0);
+	(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0);
+	(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0);
+	(CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0);
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0);
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0);
+        (CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0);
+        (CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0);
+];;
+
+
+let print_detail handle insn =
+	(* print immediate operands *)
+	if (Array.length insn.regs_read) > 0 then begin
+		printf "\tImplicit registers read: ";
+		Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_read;
+		printf "\n";
+	end;
+
+	if (Array.length insn.regs_write) > 0 then begin
+		printf "\tImplicit registers written: ";
+		Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_write;
+		printf "\n";
+	end;
+
+	if (Array.length insn.groups) > 0 then begin
+		printf "\tThis instruction belongs to groups: ";
+		Array.iter (printf "%u ") insn.groups;
+		printf "\n";
+	end;
+	printf "\n";;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment, syntax) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;

thirdparty/capstone/bindings/ocaml/test_m680x.ml

@@ -0,0 +1,167 @@
+(* Capstone Disassembly Engine
+* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 *)
+
+open Printf
+open Capstone
+open M680x
+open M680x_const
+
+
+let print_char_hex ch =
+	printf " 0x%02x" (Char.code ch)
+
+let print_int_hex_short value =
+	printf "%02x" value
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	String.iter print_char_hex str;
+	printf "\n"
+
+let print_array_hex_short arr =
+	Array.iter print_int_hex_short arr
+
+let s_access = [
+	"UNCHANGED"; "READ"; "WRITE"; "READ | WRITE" ];;
+
+let _M6800_CODE = "\x01\x09\x36\x64\x7f\x74\x10\x00\x90\x10\xA4\x10\xb6\x10\x00\x39";;
+let _M6801_CODE = "\x04\x05\x3c\x3d\x38\x93\x10\xec\x10\xed\x10\x39";;
+let _M6805_CODE = "\x04\x7f\x00\x17\x22\x28\x00\x2e\x00\x40\x42\x5a\x70\x8e\x97\x9c\xa0\x15\xad\x00\xc3\x10\x00\xda\x12\x34\xe5\x7f\xfe";;
+let _M6808_CODE = "\x31\x22\x00\x35\x22\x45\x10\x00\x4b\x00\x51\x10\x52\x5e\x22\x62\x65\x12\x34\x72\x84\x85\x86\x87\x8a\x8b\x8c\x94\x95\xa7\x10\xaf\x10\x9e\x60\x7f\x9e\x6b\x7f\x00\x9e\xd6\x10\x00\x9e\xe6\x7f";;
+let _HD6301_CODE = "\x6b\x10\x00\x71\x10\x00\x72\x10\x10\x39";;
+let _M6809_CODE = "\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39\xA6\x07\xA6\x27\xA6\x47\xA6\x67\xA6\x0F\xA6\x10\xA6\x80\xA6\x81\xA6\x82\xA6\x83\xA6\x84\xA6\x85\xA6\x86\xA6\x88\x7F\xA6\x88\x80\xA6\x89\x7F\xFF\xA6\x89\x80\x00\xA6\x8B\xA6\x8C\x10\xA6\x8D\x10\x00\xA6\x91\xA6\x93\xA6\x94\xA6\x95\xA6\x96\xA6\x98\x7F\xA6\x98\x80\xA6\x99\x7F\xFF\xA6\x99\x80\x00\xA6\x9B\xA6\x9C\x10\xA6\x9D\x10\x00\xA6\x9F\x10\x00";;
+let _HD6309_CODE = "\x01\x10\x10\x62\x10\x10\x7b\x10\x10\x00\xcd\x49\x96\x02\xd2\x10\x30\x23\x10\x38\x10\x3b\x10\x53\x10\x5d\x11\x30\x43\x10\x11\x37\x25\x10\x11\x38\x12\x11\x39\x23\x11\x3b\x34\x11\x8e\x10\x00\x11\xaf\x10\x11\xab\x10\x11\xf6\x80\x00";;
+let _M6811_CODE = "\x02\x03\x12\x7f\x10\x00\x13\x99\x08\x00\x14\x7f\x02\x15\x7f\x01\x1e\x7f\x20\x00\x8f\xcf\x18\x08\x18\x30\x18\x3c\x18\x67\x18\x8c\x10\x00\x18\x8f\x18\xce\x10\x00\x18\xff\x10\x00\x1a\xa3\x7f\x1a\xac\x1a\xee\x7f\x1a\xef\x7f\xcd\xac\x7f";;
+let _CPU12_CODE = "\x00\x04\x01\x00\x0c\x00\x80\x0e\x00\x80\x00\x11\x1e\x10\x00\x80\x00\x3b\x4a\x10\x00\x04\x4b\x01\x04\x4f\x7f\x80\x00\x8f\x10\x00\xb7\x52\xb7\xb1\xa6\x67\xa6\xfe\xa6\xf7\x18\x02\xe2\x30\x39\xe2\x10\x00\x18\x0c\x30\x39\x10\x00\x18\x11\x18\x12\x10\x00\x18\x19\x00\x18\x1e\x00\x18\x3e\x18\x3f\x00";;
+let _HCS08_CODE = "\x32\x10\x00\x9e\xae\x9e\xce\x7f\x9e\xbe\x10\x00\x9e\xfe\x7f\x3e\x10\x00\x9e\xf3\x7f\x96\x10\x00\x9e\xff\x7f\x82";;
+
+let bit_set value mask =
+	value land mask != 0
+
+let all_tests = [
+        (CS_ARCH_M680X, [CS_MODE_M680X_6301], _HD6301_CODE, "M680X_HD6301");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6309], _HD6309_CODE, "M680X_HD6309");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6800], _M6800_CODE, "M680X_M6800");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6801], _M6801_CODE, "M680X_M6801");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6805], _M6805_CODE, "M680X_M68HC05");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6808], _M6808_CODE, "M680X_M68HC08");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6809], _M6809_CODE, "M680X_M6809");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6811], _M6811_CODE, "M680X_M68HC11");
+        (CS_ARCH_M680X, [CS_MODE_M680X_CPU12], _CPU12_CODE, "M680X_CPU12");
+        (CS_ARCH_M680X, [CS_MODE_M680X_HCS08], _HCS08_CODE, "M680X_HCS08");
+];;
+
+let print_inc_dec inc_dec is_post = (
+	printf "\t\t\t";
+	if is_post then printf "post" else printf "pre";
+	if inc_dec > 0 then
+		printf " increment: %d\n" inc_dec
+	else
+		printf " decrement: %d\n" (abs inc_dec);
+	);
+	();;
+
+let print_op handle flags i op =
+	( match op.value with
+	| M680X_OP_INVALID _ -> ();	(* this would never happens *)
+	| M680X_OP_REGISTER reg -> (
+		printf "\t\toperands[%d].type: REGISTER = %s" i (cs_reg_name handle reg);
+		if (((i == 0) && (bit_set flags _M680X_FIRST_OP_IN_MNEM)) ||
+		    ((i == 1) && (bit_set flags _M680X_SECOND_OP_IN_MNEM))) then
+			printf " (in mnemonic)";
+		printf "\n";
+		);
+	| M680X_OP_IMMEDIATE imm ->
+		printf "\t\toperands[%d].type: IMMEDIATE = #%d\n" i imm;
+	| M680X_OP_DIRECT direct_addr ->
+		printf "\t\toperands[%d].type: DIRECT = 0x%02x\n" i direct_addr;
+	| M680X_OP_EXTENDED ext -> (
+		printf "\t\toperands[%d].type: EXTENDED " i;
+		if ext.indirect then
+			printf "INDIRECT";
+		printf " = 0x%04x\n" ext.addr_ext;
+		);
+	| M680X_OP_RELATIVE rel ->
+		printf "\t\toperands[%d].type: RELATIVE = 0x%04x\n" i rel.addr_rel;
+	| M680X_OP_INDEXED idx -> (
+		printf "\t\toperands[%d].type: INDEXED" i;
+		if (bit_set idx.flags _M680X_IDX_INDIRECT) then
+			printf " INDIRECT";
+		printf "\n";
+		if idx.base_reg != _M680X_REG_INVALID then
+			printf "\t\t\tbase register: %s\n" (cs_reg_name handle idx.base_reg);
+		if idx.offset_reg != _M680X_REG_INVALID then
+			printf "\t\t\toffset register: %s\n" (cs_reg_name handle idx.offset_reg);
+		if idx.offset_bits != 0 && idx.offset_reg == 0 && idx.inc_dec == 0 then begin
+			printf "\t\t\toffset: %d\n" idx.offset;
+			if idx.base_reg == _M680X_REG_PC then
+				printf "\t\t\toffset address: 0x%x\n" idx.offset_addr;
+			printf "\t\t\toffset bits: %u\n" idx.offset_bits;
+		end;
+		if idx.inc_dec != 0 then
+			print_inc_dec idx.inc_dec (bit_set idx.flags _M680X_IDX_POST_INC_DEC);
+		);
+	| M680X_OP_CONSTANT const_val ->
+		printf "\t\toperands[%d].type: CONSTANT = %d\n" i const_val;
+	);
+
+	if op.size != 0 then
+		printf "\t\t\tsize: %d\n" op.size;
+	if op.access != _CS_AC_INVALID then
+		printf "\t\t\taccess: %s\n" (List.nth s_access op.access);
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_M680X m680x -> (
+			(* print all operands info (type & value) *)
+			if (Array.length m680x.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length m680x.operands);
+				Array.iteri (print_op handle m680x.flags) m680x.operands;
+			);
+			);
+	| _ -> ();
+	;;
+
+let print_reg handle reg =
+	printf " %s" (cs_reg_name handle reg)
+
+let print_insn handle insn =
+	printf "0x%04x:\t" insn.address;
+	print_array_hex_short insn.bytes;
+	printf "\t%s\t%s\n" insn.mnemonic insn.op_str;
+	print_detail handle insn;
+	if (Array.length insn.regs_read) > 0 then begin
+		printf "\tRegisters read:";
+		Array.iter (print_reg handle) insn.regs_read;
+		printf "\n";
+	end;
+	if (Array.length insn.regs_write) > 0 then begin
+		printf "\tRegisters modified:";
+		Array.iter (print_reg handle) insn.regs_write;
+		printf "\n";
+	end;
+	if (Array.length insn.groups) > 0 then
+		printf "\tgroups_count: %d\n" (Array.length insn.groups);
+	printf "\n"
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "********************\n";
+			printf "Platform: %s\n" comment;
+			print_string_hex "Code: " code;
+			printf "Disasm:\n";
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+List.iter print_arch all_tests;;
+

thirdparty/capstone/bindings/ocaml/test_mips.ml

@@ -0,0 +1,75 @@
+(* Capstone Disassembly Engine
+* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open Capstone
+open Mips
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _MIPS_CODE  = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
+let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
+
+let all_tests = [
+	(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)");
+	(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| MIPS_OP_INVALID _ -> ();	(* this would never happens *)
+	| MIPS_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| MIPS_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| MIPS_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		);
+	);
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_MIPS mips -> (
+			(* print all operands info (type & value) *)
+			if (Array.length mips.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length mips.operands);
+				Array.iteri (print_op handle) mips.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;

thirdparty/capstone/bindings/ocaml/test_ppc.ml

@@ -0,0 +1,81 @@
+(* Capstone Disassembly Engine
+* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Printf
+open Capstone
+open Ppc
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
+
+let all_tests = [
+	(CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| PPC_OP_INVALID _ -> ();	(* this would never happens *)
+	| PPC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| PPC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| PPC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		);
+	| PPC_OP_CRX crx -> ( printf "\t\top[%d]: CRX\n" i;
+		if crx.scale != 0 then
+			printf "\t\t\toperands[%u].crx.scale = %u\n" i crx.scale;
+		if crx.reg != 0 then
+			printf "\t\t\toperands[%u].crx.reg = %s\n" i (cs_reg_name handle crx.reg);
+		if crx.cond != 0 then
+			printf "\t\t\toperands[%u].crx.cond = 0x%x\n" i crx.cond;
+		);
+	);
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_PPC ppc -> (
+			(* print all operands info (type & value) *)
+			if (Array.length ppc.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length ppc.operands);
+				Array.iteri (print_op handle) ppc.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;

thirdparty/capstone/bindings/ocaml/test_sparc.ml

@@ -0,0 +1,79 @@
+(* Capstone Disassembly Engine
+* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Printf
+open Capstone
+open Sparc
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
+let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
+
+
+let all_tests = [
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc");
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| SPARC_OP_INVALID _ -> ();	(* this would never happens *)
+	| SPARC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| SPARC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| SPARC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		);
+	);
+
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_SPARC sparc -> (
+			(* print all operands info (type & value) *)
+			if (Array.length sparc.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length sparc.operands);
+				Array.iteri (print_op handle) sparc.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;

thirdparty/capstone/bindings/ocaml/test_systemz.ml

@@ -0,0 +1,80 @@
+(* Capstone Disassembly Engine
+* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Printf
+open Capstone
+open Systemz
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
+
+
+
+let all_tests = [
+	(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| SYSZ_OP_INVALID _ -> ();	(* this would never happens *)
+	| SYSZ_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| SYSZ_OP_ACREG reg -> printf "\t\top[%d]: ACREG = %u\n" i reg;
+	| SYSZ_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| SYSZ_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
+		if mem.length != 0L then
+			printf "\t\t\toperands[%u].mem.length: 0x%Lx\n" i mem.length;
+		if mem.disp != 0L then
+			printf "\t\t\toperands[%u].mem.disp: 0x%Lx\n" i mem.disp;
+		);
+	);
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_SYSZ sysz -> (
+			(* print all operands info (type & value) *)
+			if (Array.length sysz.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length sysz.operands);
+				Array.iteri (print_op handle) sysz.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;

thirdparty/capstone/bindings/ocaml/test_x86.ml

@@ -0,0 +1,117 @@
+(* Capstone Disassembly Engine
+* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open Capstone
+open X86
+open X86_const
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
+
+
+let all_tests = [
+	(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L);
+	(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L);
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| X86_OP_INVALID _ -> ();	(* this would never happens *)
+	| X86_OP_REG reg -> printf "\t\top[%d]: REG = %s  [sz=%d]\n" i (cs_reg_name handle reg) op.size;
+	| X86_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x  [sz=%d]\n" i imm op.size;
+	| X86_OP_MEM mem -> ( printf "\t\top[%d]: MEM  [sz=%d]\n" i op.size;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle  mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
+		if mem.scale != 1 then
+			printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale;
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		);
+	);
+	();;
+
+
+let print_detail handle mode insn =
+	match insn.arch with
+	| CS_INFO_X86 x86 -> (
+			print_string_hex "\tPrefix: " x86.prefix;
+
+			(* print instruction's opcode *)
+			print_string_hex "\tOpcode: " x86.opcode;
+
+			(* print operand's size, address size, displacement size & immediate size *)
+			printf "\taddr_size: %u\n" x86.addr_size;
+
+			(* print modRM byte *)
+			printf "\tmodrm: 0x%x\n" x86.modrm;
+
+			(* print displacement value *)
+			if x86.disp != 0 then
+			printf "\tdisp: 0x%x\n" x86.disp;
+
+			(* SIB is invalid in 16-bit mode *)
+			if not (List.mem CS_MODE_16 mode) then (
+				(* print SIB byte *)
+				printf "\tsib: 0x%x\n" x86.sib;
+
+				(* print sib index/scale/base (if applicable) *)
+				if x86.sib_index != _X86_REG_INVALID then
+				printf "\tsib_index: %s, sib_scale: %u, sib_base: %s\n"
+				(cs_reg_name handle x86.sib_index)
+				x86.sib_scale
+				(cs_reg_name handle x86.sib_base);
+			);
+
+			(* print all operands info (type & value) *)
+			if (Array.length x86.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length x86.operands);
+				Array.iteri (print_op handle) x86.operands;
+			);
+			printf "\n";
+	);
+	| _ -> ();
+	;;
+
+
+let print_insn handle mode insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle mode insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment, syntax) = x in
+	let handle = cs_open arch mode in (
+		if syntax != 0L then (
+			let err = cs_option handle CS_OPT_SYNTAX syntax in
+			match err with
+			| _ -> ();
+		);
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in (
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle mode) insns;
+		);
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+	);;
+
+List.iter print_arch all_tests;;

thirdparty/capstone/bindings/ocaml/test_xcore.ml

@@ -0,0 +1,78 @@
+(* Capstone Disassembly Engine
+* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Printf
+open Capstone
+open Xcore
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
+
+let all_tests = [
+        (CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| XCORE_OP_INVALID _ -> ();	(* this would never happens *)
+	| XCORE_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| XCORE_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| XCORE_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		if mem.direct != 0 then
+			printf "\t\t\toperands[%u].mem.direct: 0x%x\n" i mem.direct;
+		);
+	);
+
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_XCORE xcore -> (
+			(* print all operands info (type & value) *)
+			if (Array.length xcore.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length xcore.operands);
+				Array.iteri (print_op handle) xcore.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;

thirdparty/capstone/bindings/ocaml/tms320c64x_const.ml

@@ -0,0 +1,277 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [tms320c64x_const.ml] *)
+
+let _TMS320C64X_OP_INVALID = 0;;
+let _TMS320C64X_OP_REG = 1;;
+let _TMS320C64X_OP_IMM = 2;;
+let _TMS320C64X_OP_MEM = 3;;
+let _TMS320C64X_OP_REGPAIR = 64;;
+
+let _TMS320C64X_MEM_DISP_INVALID = 0;;
+let _TMS320C64X_MEM_DISP_CONSTANT = 1;;
+let _TMS320C64X_MEM_DISP_REGISTER = 2;;
+
+let _TMS320C64X_MEM_DIR_INVALID = 0;;
+let _TMS320C64X_MEM_DIR_FW = 1;;
+let _TMS320C64X_MEM_DIR_BW = 2;;
+
+let _TMS320C64X_MEM_MOD_INVALID = 0;;
+let _TMS320C64X_MEM_MOD_NO = 1;;
+let _TMS320C64X_MEM_MOD_PRE = 2;;
+let _TMS320C64X_MEM_MOD_POST = 3;;
+
+let _TMS320C64X_REG_INVALID = 0;;
+let _TMS320C64X_REG_AMR = 1;;
+let _TMS320C64X_REG_CSR = 2;;
+let _TMS320C64X_REG_DIER = 3;;
+let _TMS320C64X_REG_DNUM = 4;;
+let _TMS320C64X_REG_ECR = 5;;
+let _TMS320C64X_REG_GFPGFR = 6;;
+let _TMS320C64X_REG_GPLYA = 7;;
+let _TMS320C64X_REG_GPLYB = 8;;
+let _TMS320C64X_REG_ICR = 9;;
+let _TMS320C64X_REG_IER = 10;;
+let _TMS320C64X_REG_IERR = 11;;
+let _TMS320C64X_REG_ILC = 12;;
+let _TMS320C64X_REG_IRP = 13;;
+let _TMS320C64X_REG_ISR = 14;;
+let _TMS320C64X_REG_ISTP = 15;;
+let _TMS320C64X_REG_ITSR = 16;;
+let _TMS320C64X_REG_NRP = 17;;
+let _TMS320C64X_REG_NTSR = 18;;
+let _TMS320C64X_REG_REP = 19;;
+let _TMS320C64X_REG_RILC = 20;;
+let _TMS320C64X_REG_SSR = 21;;
+let _TMS320C64X_REG_TSCH = 22;;
+let _TMS320C64X_REG_TSCL = 23;;
+let _TMS320C64X_REG_TSR = 24;;
+let _TMS320C64X_REG_A0 = 25;;
+let _TMS320C64X_REG_A1 = 26;;
+let _TMS320C64X_REG_A2 = 27;;
+let _TMS320C64X_REG_A3 = 28;;
+let _TMS320C64X_REG_A4 = 29;;
+let _TMS320C64X_REG_A5 = 30;;
+let _TMS320C64X_REG_A6 = 31;;
+let _TMS320C64X_REG_A7 = 32;;
+let _TMS320C64X_REG_A8 = 33;;
+let _TMS320C64X_REG_A9 = 34;;
+let _TMS320C64X_REG_A10 = 35;;
+let _TMS320C64X_REG_A11 = 36;;
+let _TMS320C64X_REG_A12 = 37;;
+let _TMS320C64X_REG_A13 = 38;;
+let _TMS320C64X_REG_A14 = 39;;
+let _TMS320C64X_REG_A15 = 40;;
+let _TMS320C64X_REG_A16 = 41;;
+let _TMS320C64X_REG_A17 = 42;;
+let _TMS320C64X_REG_A18 = 43;;
+let _TMS320C64X_REG_A19 = 44;;
+let _TMS320C64X_REG_A20 = 45;;
+let _TMS320C64X_REG_A21 = 46;;
+let _TMS320C64X_REG_A22 = 47;;
+let _TMS320C64X_REG_A23 = 48;;
+let _TMS320C64X_REG_A24 = 49;;
+let _TMS320C64X_REG_A25 = 50;;
+let _TMS320C64X_REG_A26 = 51;;
+let _TMS320C64X_REG_A27 = 52;;
+let _TMS320C64X_REG_A28 = 53;;
+let _TMS320C64X_REG_A29 = 54;;
+let _TMS320C64X_REG_A30 = 55;;
+let _TMS320C64X_REG_A31 = 56;;
+let _TMS320C64X_REG_B0 = 57;;
+let _TMS320C64X_REG_B1 = 58;;
+let _TMS320C64X_REG_B2 = 59;;
+let _TMS320C64X_REG_B3 = 60;;
+let _TMS320C64X_REG_B4 = 61;;
+let _TMS320C64X_REG_B5 = 62;;
+let _TMS320C64X_REG_B6 = 63;;
+let _TMS320C64X_REG_B7 = 64;;
+let _TMS320C64X_REG_B8 = 65;;
+let _TMS320C64X_REG_B9 = 66;;
+let _TMS320C64X_REG_B10 = 67;;
+let _TMS320C64X_REG_B11 = 68;;
+let _TMS320C64X_REG_B12 = 69;;
+let _TMS320C64X_REG_B13 = 70;;
+let _TMS320C64X_REG_B14 = 71;;
+let _TMS320C64X_REG_B15 = 72;;
+let _TMS320C64X_REG_B16 = 73;;
+let _TMS320C64X_REG_B17 = 74;;
+let _TMS320C64X_REG_B18 = 75;;
+let _TMS320C64X_REG_B19 = 76;;
+let _TMS320C64X_REG_B20 = 77;;
+let _TMS320C64X_REG_B21 = 78;;
+let _TMS320C64X_REG_B22 = 79;;
+let _TMS320C64X_REG_B23 = 80;;
+let _TMS320C64X_REG_B24 = 81;;
+let _TMS320C64X_REG_B25 = 82;;
+let _TMS320C64X_REG_B26 = 83;;
+let _TMS320C64X_REG_B27 = 84;;
+let _TMS320C64X_REG_B28 = 85;;
+let _TMS320C64X_REG_B29 = 86;;
+let _TMS320C64X_REG_B30 = 87;;
+let _TMS320C64X_REG_B31 = 88;;
+let _TMS320C64X_REG_PCE1 = 89;;
+let _TMS320C64X_REG_ENDING = 90;;
+let _TMS320C64X_REG_EFR = _TMS320C64X_REG_ECR;;
+let _TMS320C64X_REG_IFR = _TMS320C64X_REG_ISR;;
+
+let _TMS320C64X_INS_INVALID = 0;;
+let _TMS320C64X_INS_ABS = 1;;
+let _TMS320C64X_INS_ABS2 = 2;;
+let _TMS320C64X_INS_ADD = 3;;
+let _TMS320C64X_INS_ADD2 = 4;;
+let _TMS320C64X_INS_ADD4 = 5;;
+let _TMS320C64X_INS_ADDAB = 6;;
+let _TMS320C64X_INS_ADDAD = 7;;
+let _TMS320C64X_INS_ADDAH = 8;;
+let _TMS320C64X_INS_ADDAW = 9;;
+let _TMS320C64X_INS_ADDK = 10;;
+let _TMS320C64X_INS_ADDKPC = 11;;
+let _TMS320C64X_INS_ADDU = 12;;
+let _TMS320C64X_INS_AND = 13;;
+let _TMS320C64X_INS_ANDN = 14;;
+let _TMS320C64X_INS_AVG2 = 15;;
+let _TMS320C64X_INS_AVGU4 = 16;;
+let _TMS320C64X_INS_B = 17;;
+let _TMS320C64X_INS_BDEC = 18;;
+let _TMS320C64X_INS_BITC4 = 19;;
+let _TMS320C64X_INS_BNOP = 20;;
+let _TMS320C64X_INS_BPOS = 21;;
+let _TMS320C64X_INS_CLR = 22;;
+let _TMS320C64X_INS_CMPEQ = 23;;
+let _TMS320C64X_INS_CMPEQ2 = 24;;
+let _TMS320C64X_INS_CMPEQ4 = 25;;
+let _TMS320C64X_INS_CMPGT = 26;;
+let _TMS320C64X_INS_CMPGT2 = 27;;
+let _TMS320C64X_INS_CMPGTU4 = 28;;
+let _TMS320C64X_INS_CMPLT = 29;;
+let _TMS320C64X_INS_CMPLTU = 30;;
+let _TMS320C64X_INS_DEAL = 31;;
+let _TMS320C64X_INS_DOTP2 = 32;;
+let _TMS320C64X_INS_DOTPN2 = 33;;
+let _TMS320C64X_INS_DOTPNRSU2 = 34;;
+let _TMS320C64X_INS_DOTPRSU2 = 35;;
+let _TMS320C64X_INS_DOTPSU4 = 36;;
+let _TMS320C64X_INS_DOTPU4 = 37;;
+let _TMS320C64X_INS_EXT = 38;;
+let _TMS320C64X_INS_EXTU = 39;;
+let _TMS320C64X_INS_GMPGTU = 40;;
+let _TMS320C64X_INS_GMPY4 = 41;;
+let _TMS320C64X_INS_LDB = 42;;
+let _TMS320C64X_INS_LDBU = 43;;
+let _TMS320C64X_INS_LDDW = 44;;
+let _TMS320C64X_INS_LDH = 45;;
+let _TMS320C64X_INS_LDHU = 46;;
+let _TMS320C64X_INS_LDNDW = 47;;
+let _TMS320C64X_INS_LDNW = 48;;
+let _TMS320C64X_INS_LDW = 49;;
+let _TMS320C64X_INS_LMBD = 50;;
+let _TMS320C64X_INS_MAX2 = 51;;
+let _TMS320C64X_INS_MAXU4 = 52;;
+let _TMS320C64X_INS_MIN2 = 53;;
+let _TMS320C64X_INS_MINU4 = 54;;
+let _TMS320C64X_INS_MPY = 55;;
+let _TMS320C64X_INS_MPY2 = 56;;
+let _TMS320C64X_INS_MPYH = 57;;
+let _TMS320C64X_INS_MPYHI = 58;;
+let _TMS320C64X_INS_MPYHIR = 59;;
+let _TMS320C64X_INS_MPYHL = 60;;
+let _TMS320C64X_INS_MPYHLU = 61;;
+let _TMS320C64X_INS_MPYHSLU = 62;;
+let _TMS320C64X_INS_MPYHSU = 63;;
+let _TMS320C64X_INS_MPYHU = 64;;
+let _TMS320C64X_INS_MPYHULS = 65;;
+let _TMS320C64X_INS_MPYHUS = 66;;
+let _TMS320C64X_INS_MPYLH = 67;;
+let _TMS320C64X_INS_MPYLHU = 68;;
+let _TMS320C64X_INS_MPYLI = 69;;
+let _TMS320C64X_INS_MPYLIR = 70;;
+let _TMS320C64X_INS_MPYLSHU = 71;;
+let _TMS320C64X_INS_MPYLUHS = 72;;
+let _TMS320C64X_INS_MPYSU = 73;;
+let _TMS320C64X_INS_MPYSU4 = 74;;
+let _TMS320C64X_INS_MPYU = 75;;
+let _TMS320C64X_INS_MPYU4 = 76;;
+let _TMS320C64X_INS_MPYUS = 77;;
+let _TMS320C64X_INS_MVC = 78;;
+let _TMS320C64X_INS_MVD = 79;;
+let _TMS320C64X_INS_MVK = 80;;
+let _TMS320C64X_INS_MVKL = 81;;
+let _TMS320C64X_INS_MVKLH = 82;;
+let _TMS320C64X_INS_NOP = 83;;
+let _TMS320C64X_INS_NORM = 84;;
+let _TMS320C64X_INS_OR = 85;;
+let _TMS320C64X_INS_PACK2 = 86;;
+let _TMS320C64X_INS_PACKH2 = 87;;
+let _TMS320C64X_INS_PACKH4 = 88;;
+let _TMS320C64X_INS_PACKHL2 = 89;;
+let _TMS320C64X_INS_PACKL4 = 90;;
+let _TMS320C64X_INS_PACKLH2 = 91;;
+let _TMS320C64X_INS_ROTL = 92;;
+let _TMS320C64X_INS_SADD = 93;;
+let _TMS320C64X_INS_SADD2 = 94;;
+let _TMS320C64X_INS_SADDU4 = 95;;
+let _TMS320C64X_INS_SADDUS2 = 96;;
+let _TMS320C64X_INS_SAT = 97;;
+let _TMS320C64X_INS_SET = 98;;
+let _TMS320C64X_INS_SHFL = 99;;
+let _TMS320C64X_INS_SHL = 100;;
+let _TMS320C64X_INS_SHLMB = 101;;
+let _TMS320C64X_INS_SHR = 102;;
+let _TMS320C64X_INS_SHR2 = 103;;
+let _TMS320C64X_INS_SHRMB = 104;;
+let _TMS320C64X_INS_SHRU = 105;;
+let _TMS320C64X_INS_SHRU2 = 106;;
+let _TMS320C64X_INS_SMPY = 107;;
+let _TMS320C64X_INS_SMPY2 = 108;;
+let _TMS320C64X_INS_SMPYH = 109;;
+let _TMS320C64X_INS_SMPYHL = 110;;
+let _TMS320C64X_INS_SMPYLH = 111;;
+let _TMS320C64X_INS_SPACK2 = 112;;
+let _TMS320C64X_INS_SPACKU4 = 113;;
+let _TMS320C64X_INS_SSHL = 114;;
+let _TMS320C64X_INS_SSHVL = 115;;
+let _TMS320C64X_INS_SSHVR = 116;;
+let _TMS320C64X_INS_SSUB = 117;;
+let _TMS320C64X_INS_STB = 118;;
+let _TMS320C64X_INS_STDW = 119;;
+let _TMS320C64X_INS_STH = 120;;
+let _TMS320C64X_INS_STNDW = 121;;
+let _TMS320C64X_INS_STNW = 122;;
+let _TMS320C64X_INS_STW = 123;;
+let _TMS320C64X_INS_SUB = 124;;
+let _TMS320C64X_INS_SUB2 = 125;;
+let _TMS320C64X_INS_SUB4 = 126;;
+let _TMS320C64X_INS_SUBAB = 127;;
+let _TMS320C64X_INS_SUBABS4 = 128;;
+let _TMS320C64X_INS_SUBAH = 129;;
+let _TMS320C64X_INS_SUBAW = 130;;
+let _TMS320C64X_INS_SUBC = 131;;
+let _TMS320C64X_INS_SUBU = 132;;
+let _TMS320C64X_INS_SWAP4 = 133;;
+let _TMS320C64X_INS_UNPKHU4 = 134;;
+let _TMS320C64X_INS_UNPKLU4 = 135;;
+let _TMS320C64X_INS_XOR = 136;;
+let _TMS320C64X_INS_XPND2 = 137;;
+let _TMS320C64X_INS_XPND4 = 138;;
+let _TMS320C64X_INS_IDLE = 139;;
+let _TMS320C64X_INS_MV = 140;;
+let _TMS320C64X_INS_NEG = 141;;
+let _TMS320C64X_INS_NOT = 142;;
+let _TMS320C64X_INS_SWAP2 = 143;;
+let _TMS320C64X_INS_ZERO = 144;;
+let _TMS320C64X_INS_ENDING = 145;;
+
+let _TMS320C64X_GRP_INVALID = 0;;
+let _TMS320C64X_GRP_JUMP = 1;;
+let _TMS320C64X_GRP_FUNIT_D = 128;;
+let _TMS320C64X_GRP_FUNIT_L = 129;;
+let _TMS320C64X_GRP_FUNIT_M = 130;;
+let _TMS320C64X_GRP_FUNIT_S = 131;;
+let _TMS320C64X_GRP_FUNIT_NO = 132;;
+let _TMS320C64X_GRP_ENDING = 133;;
+
+let _TMS320C64X_FUNIT_INVALID = 0;;
+let _TMS320C64X_FUNIT_D = 1;;
+let _TMS320C64X_FUNIT_L = 2;;
+let _TMS320C64X_FUNIT_M = 3;;
+let _TMS320C64X_FUNIT_S = 4;;
+let _TMS320C64X_FUNIT_NO = 5;;

thirdparty/capstone/bindings/ocaml/wasm_const.ml

@@ -0,0 +1,191 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [wasm_const.ml] *)
+
+let _WASM_OP_INVALID = 0;;
+let _WASM_OP_NONE = 1;;
+let _WASM_OP_INT7 = 2;;
+let _WASM_OP_VARUINT32 = 3;;
+let _WASM_OP_VARUINT64 = 4;;
+let _WASM_OP_UINT32 = 5;;
+let _WASM_OP_UINT64 = 6;;
+let _WASM_OP_IMM = 7;;
+let _WASM_OP_BRTABLE = 8;;
+let _WASM_INS_UNREACHABLE = 0x0;;
+let _WASM_INS_NOP = 0x1;;
+let _WASM_INS_BLOCK = 0x2;;
+let _WASM_INS_LOOP = 0x3;;
+let _WASM_INS_IF = 0x4;;
+let _WASM_INS_ELSE = 0x5;;
+let _WASM_INS_END = 0xb;;
+let _WASM_INS_BR = 0xc;;
+let _WASM_INS_BR_IF = 0xd;;
+let _WASM_INS_BR_TABLE = 0xe;;
+let _WASM_INS_RETURN = 0xf;;
+let _WASM_INS_CALL = 0x10;;
+let _WASM_INS_CALL_INDIRECT = 0x11;;
+let _WASM_INS_DROP = 0x1a;;
+let _WASM_INS_SELECT = 0x1b;;
+let _WASM_INS_GET_LOCAL = 0x20;;
+let _WASM_INS_SET_LOCAL = 0x21;;
+let _WASM_INS_TEE_LOCAL = 0x22;;
+let _WASM_INS_GET_GLOBAL = 0x23;;
+let _WASM_INS_SET_GLOBAL = 0x24;;
+let _WASM_INS_I32_LOAD = 0x28;;
+let _WASM_INS_I64_LOAD = 0x29;;
+let _WASM_INS_F32_LOAD = 0x2a;;
+let _WASM_INS_F64_LOAD = 0x2b;;
+let _WASM_INS_I32_LOAD8_S = 0x2c;;
+let _WASM_INS_I32_LOAD8_U = 0x2d;;
+let _WASM_INS_I32_LOAD16_S = 0x2e;;
+let _WASM_INS_I32_LOAD16_U = 0x2f;;
+let _WASM_INS_I64_LOAD8_S = 0x30;;
+let _WASM_INS_I64_LOAD8_U = 0x31;;
+let _WASM_INS_I64_LOAD16_S = 0x32;;
+let _WASM_INS_I64_LOAD16_U = 0x33;;
+let _WASM_INS_I64_LOAD32_S = 0x34;;
+let _WASM_INS_I64_LOAD32_U = 0x35;;
+let _WASM_INS_I32_STORE = 0x36;;
+let _WASM_INS_I64_STORE = 0x37;;
+let _WASM_INS_F32_STORE = 0x38;;
+let _WASM_INS_F64_STORE = 0x39;;
+let _WASM_INS_I32_STORE8 = 0x3a;;
+let _WASM_INS_I32_STORE16 = 0x3b;;
+let _WASM_INS_I64_STORE8 = 0x3c;;
+let _WASM_INS_I64_STORE16 = 0x3d;;
+let _WASM_INS_I64_STORE32 = 0x3e;;
+let _WASM_INS_CURRENT_MEMORY = 0x3f;;
+let _WASM_INS_GROW_MEMORY = 0x40;;
+let _WASM_INS_I32_CONST = 0x41;;
+let _WASM_INS_I64_CONST = 0x42;;
+let _WASM_INS_F32_CONST = 0x43;;
+let _WASM_INS_F64_CONST = 0x44;;
+let _WASM_INS_I32_EQZ = 0x45;;
+let _WASM_INS_I32_EQ = 0x46;;
+let _WASM_INS_I32_NE = 0x47;;
+let _WASM_INS_I32_LT_S = 0x48;;
+let _WASM_INS_I32_LT_U = 0x49;;
+let _WASM_INS_I32_GT_S = 0x4a;;
+let _WASM_INS_I32_GT_U = 0x4b;;
+let _WASM_INS_I32_LE_S = 0x4c;;
+let _WASM_INS_I32_LE_U = 0x4d;;
+let _WASM_INS_I32_GE_S = 0x4e;;
+let _WASM_INS_I32_GE_U = 0x4f;;
+let _WASM_INS_I64_EQZ = 0x50;;
+let _WASM_INS_I64_EQ = 0x51;;
+let _WASM_INS_I64_NE = 0x52;;
+let _WASM_INS_I64_LT_S = 0x53;;
+let _WASM_INS_I64_LT_U = 0x54;;
+let _WASM_INS_I64_GT_U = 0x56;;
+let _WASM_INS_I64_LE_S = 0x57;;
+let _WASM_INS_I64_LE_U = 0x58;;
+let _WASM_INS_I64_GE_S = 0x59;;
+let _WASM_INS_I64_GE_U = 0x5a;;
+let _WASM_INS_F32_EQ = 0x5b;;
+let _WASM_INS_F32_NE = 0x5c;;
+let _WASM_INS_F32_LT = 0x5d;;
+let _WASM_INS_F32_GT = 0x5e;;
+let _WASM_INS_F32_LE = 0x5f;;
+let _WASM_INS_F32_GE = 0x60;;
+let _WASM_INS_F64_EQ = 0x61;;
+let _WASM_INS_F64_NE = 0x62;;
+let _WASM_INS_F64_LT = 0x63;;
+let _WASM_INS_F64_GT = 0x64;;
+let _WASM_INS_F64_LE = 0x65;;
+let _WASM_INS_F64_GE = 0x66;;
+let _WASM_INS_I32_CLZ = 0x67;;
+let _WASM_INS_I32_CTZ = 0x68;;
+let _WASM_INS_I32_POPCNT = 0x69;;
+let _WASM_INS_I32_ADD = 0x6a;;
+let _WASM_INS_I32_SUB = 0x6b;;
+let _WASM_INS_I32_MUL = 0x6c;;
+let _WASM_INS_I32_DIV_S = 0x6d;;
+let _WASM_INS_I32_DIV_U = 0x6e;;
+let _WASM_INS_I32_REM_S = 0x6f;;
+let _WASM_INS_I32_REM_U = 0x70;;
+let _WASM_INS_I32_AND = 0x71;;
+let _WASM_INS_I32_OR = 0x72;;
+let _WASM_INS_I32_XOR = 0x73;;
+let _WASM_INS_I32_SHL = 0x74;;
+let _WASM_INS_I32_SHR_S = 0x75;;
+let _WASM_INS_I32_SHR_U = 0x76;;
+let _WASM_INS_I32_ROTL = 0x77;;
+let _WASM_INS_I32_ROTR = 0x78;;
+let _WASM_INS_I64_CLZ = 0x79;;
+let _WASM_INS_I64_CTZ = 0x7a;;
+let _WASM_INS_I64_POPCNT = 0x7b;;
+let _WASM_INS_I64_ADD = 0x7c;;
+let _WASM_INS_I64_SUB = 0x7d;;
+let _WASM_INS_I64_MUL = 0x7e;;
+let _WASM_INS_I64_DIV_S = 0x7f;;
+let _WASM_INS_I64_DIV_U = 0x80;;
+let _WASM_INS_I64_REM_S = 0x81;;
+let _WASM_INS_I64_REM_U = 0x82;;
+let _WASM_INS_I64_AND = 0x83;;
+let _WASM_INS_I64_OR = 0x84;;
+let _WASM_INS_I64_XOR = 0x85;;
+let _WASM_INS_I64_SHL = 0x86;;
+let _WASM_INS_I64_SHR_S = 0x87;;
+let _WASM_INS_I64_SHR_U = 0x88;;
+let _WASM_INS_I64_ROTL = 0x89;;
+let _WASM_INS_I64_ROTR = 0x8a;;
+let _WASM_INS_F32_ABS = 0x8b;;
+let _WASM_INS_F32_NEG = 0x8c;;
+let _WASM_INS_F32_CEIL = 0x8d;;
+let _WASM_INS_F32_FLOOR = 0x8e;;
+let _WASM_INS_F32_TRUNC = 0x8f;;
+let _WASM_INS_F32_NEAREST = 0x90;;
+let _WASM_INS_F32_SQRT = 0x91;;
+let _WASM_INS_F32_ADD = 0x92;;
+let _WASM_INS_F32_SUB = 0x93;;
+let _WASM_INS_F32_MUL = 0x94;;
+let _WASM_INS_F32_DIV = 0x95;;
+let _WASM_INS_F32_MIN = 0x96;;
+let _WASM_INS_F32_MAX = 0x97;;
+let _WASM_INS_F32_COPYSIGN = 0x98;;
+let _WASM_INS_F64_ABS = 0x99;;
+let _WASM_INS_F64_NEG = 0x9a;;
+let _WASM_INS_F64_CEIL = 0x9b;;
+let _WASM_INS_F64_FLOOR = 0x9c;;
+let _WASM_INS_F64_TRUNC = 0x9d;;
+let _WASM_INS_F64_NEAREST = 0x9e;;
+let _WASM_INS_F64_SQRT = 0x9f;;
+let _WASM_INS_F64_ADD = 0xa0;;
+let _WASM_INS_F64_SUB = 0xa1;;
+let _WASM_INS_F64_MUL = 0xa2;;
+let _WASM_INS_F64_DIV = 0xa3;;
+let _WASM_INS_F64_MIN = 0xa4;;
+let _WASM_INS_F64_MAX = 0xa5;;
+let _WASM_INS_F64_COPYSIGN = 0xa6;;
+let _WASM_INS_I32_WARP_I64 = 0xa7;;
+let _WASM_INS_I32_TRUNC_U_F32 = 0xa9;;
+let _WASM_INS_I32_TRUNC_S_F64 = 0xaa;;
+let _WASM_INS_I32_TRUNC_U_F64 = 0xab;;
+let _WASM_INS_I64_EXTEND_S_I32 = 0xac;;
+let _WASM_INS_I64_EXTEND_U_I32 = 0xad;;
+let _WASM_INS_I64_TRUNC_S_F32 = 0xae;;
+let _WASM_INS_I64_TRUNC_U_F32 = 0xaf;;
+let _WASM_INS_I64_TRUNC_S_F64 = 0xb0;;
+let _WASM_INS_I64_TRUNC_U_F64 = 0xb1;;
+let _WASM_INS_F32_CONVERT_S_I32 = 0xb2;;
+let _WASM_INS_F32_CONVERT_U_I32 = 0xb3;;
+let _WASM_INS_F32_CONVERT_S_I64 = 0xb4;;
+let _WASM_INS_F32_CONVERT_U_I64 = 0xb5;;
+let _WASM_INS_F32_DEMOTE_F64 = 0xb6;;
+let _WASM_INS_F64_CONVERT_S_I32 = 0xb7;;
+let _WASM_INS_F64_CONVERT_U_I32 = 0xb8;;
+let _WASM_INS_F64_CONVERT_S_I64 = 0xb9;;
+let _WASM_INS_F64_CONVERT_U_I64 = 0xba;;
+let _WASM_INS_F64_PROMOTE_F32 = 0xbb;;
+let _WASM_INS_I32_REINTERPRET_F32 = 0xbc;;
+let _WASM_INS_I64_REINTERPRET_F64 = 0xbd;;
+let _WASM_INS_F32_REINTERPRET_I32 = 0xbe;;
+let _WASM_INS_F64_REINTERPRET_I64 = 0xbf;;
+let _WASM_INS_INVALID = 512;;
+let _WASM_INS_ENDING = 513;;
+
+let _WASM_GRP_INVALID = 0;;
+let _WASM_GRP_NUMBERIC = 8;;
+let _WASM_GRP_PARAMETRIC = 9;;
+let _WASM_GRP_VARIABLE = 10;;
+let _WASM_GRP_MEMORY = 11;;
+let _WASM_GRP_CONTROL = 12;;
+let _WASM_GRP_ENDING = 13;;

thirdparty/capstone/bindings/ocaml/x86.ml

@@ -0,0 +1,47 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open X86_const
+
+(* architecture specific info of instruction *)
+type x86_op_mem = {
+	segment: int;
+	base: int;
+	index: int;
+	scale: int;
+	disp: int;
+}
+
+type x86_op_value =
+	| X86_OP_INVALID of int
+	| X86_OP_REG of int
+	| X86_OP_IMM of int
+	| X86_OP_MEM of x86_op_mem
+
+type x86_op = {
+	value: x86_op_value;
+	size: int;
+	access: int;
+	avx_bcast: int;
+	avx_zero_opmask: int;
+}
+
+type cs_x86 = { 
+	prefix: int array;
+	opcode: int array;
+	rex: int;
+	addr_size: int;
+	modrm: int;
+	sib: int;
+	disp: int;
+	sib_index: int;
+	sib_scale: int;
+	sib_base: int;
+	xop_cc: int;
+	sse_cc: int;
+	avx_cc: int;
+	avx_sae: int;
+	avx_rm: int;
+	eflags: int;
+	operands: x86_op array;
+}

thirdparty/capstone/bindings/ocaml/xcore.ml

@@ -0,0 +1,26 @@
+(* Capstone Disassembly Engine
+ * By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Xcore_const
+
+type xcore_op_mem = {
+	base: int;
+	index: int;
+	disp: int;
+	direct: int;
+}
+
+type xcore_op_value =
+	| XCORE_OP_INVALID of int
+	| XCORE_OP_REG of int
+	| XCORE_OP_IMM of int
+	| XCORE_OP_MEM of xcore_op_mem
+
+type xcore_op = {
+	value: xcore_op_value;
+}
+
+type cs_xcore = { 
+	operands: xcore_op array;
+}
+

thirdparty/capstone/bindings/ocaml/xcore_const.ml

@@ -0,0 +1,161 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [xcore_const.ml] *)
+
+let _XCORE_OP_INVALID = 0;;
+let _XCORE_OP_REG = 1;;
+let _XCORE_OP_IMM = 2;;
+let _XCORE_OP_MEM = 3;;
+
+let _XCORE_REG_INVALID = 0;;
+let _XCORE_REG_CP = 1;;
+let _XCORE_REG_DP = 2;;
+let _XCORE_REG_LR = 3;;
+let _XCORE_REG_SP = 4;;
+let _XCORE_REG_R0 = 5;;
+let _XCORE_REG_R1 = 6;;
+let _XCORE_REG_R2 = 7;;
+let _XCORE_REG_R3 = 8;;
+let _XCORE_REG_R4 = 9;;
+let _XCORE_REG_R5 = 10;;
+let _XCORE_REG_R6 = 11;;
+let _XCORE_REG_R7 = 12;;
+let _XCORE_REG_R8 = 13;;
+let _XCORE_REG_R9 = 14;;
+let _XCORE_REG_R10 = 15;;
+let _XCORE_REG_R11 = 16;;
+let _XCORE_REG_PC = 17;;
+let _XCORE_REG_SCP = 18;;
+let _XCORE_REG_SSR = 19;;
+let _XCORE_REG_ET = 20;;
+let _XCORE_REG_ED = 21;;
+let _XCORE_REG_SED = 22;;
+let _XCORE_REG_KEP = 23;;
+let _XCORE_REG_KSP = 24;;
+let _XCORE_REG_ID = 25;;
+let _XCORE_REG_ENDING = 26;;
+
+let _XCORE_INS_INVALID = 0;;
+let _XCORE_INS_ADD = 1;;
+let _XCORE_INS_ANDNOT = 2;;
+let _XCORE_INS_AND = 3;;
+let _XCORE_INS_ASHR = 4;;
+let _XCORE_INS_BAU = 5;;
+let _XCORE_INS_BITREV = 6;;
+let _XCORE_INS_BLA = 7;;
+let _XCORE_INS_BLAT = 8;;
+let _XCORE_INS_BL = 9;;
+let _XCORE_INS_BF = 10;;
+let _XCORE_INS_BT = 11;;
+let _XCORE_INS_BU = 12;;
+let _XCORE_INS_BRU = 13;;
+let _XCORE_INS_BYTEREV = 14;;
+let _XCORE_INS_CHKCT = 15;;
+let _XCORE_INS_CLRE = 16;;
+let _XCORE_INS_CLRPT = 17;;
+let _XCORE_INS_CLRSR = 18;;
+let _XCORE_INS_CLZ = 19;;
+let _XCORE_INS_CRC8 = 20;;
+let _XCORE_INS_CRC32 = 21;;
+let _XCORE_INS_DCALL = 22;;
+let _XCORE_INS_DENTSP = 23;;
+let _XCORE_INS_DGETREG = 24;;
+let _XCORE_INS_DIVS = 25;;
+let _XCORE_INS_DIVU = 26;;
+let _XCORE_INS_DRESTSP = 27;;
+let _XCORE_INS_DRET = 28;;
+let _XCORE_INS_ECALLF = 29;;
+let _XCORE_INS_ECALLT = 30;;
+let _XCORE_INS_EDU = 31;;
+let _XCORE_INS_EEF = 32;;
+let _XCORE_INS_EET = 33;;
+let _XCORE_INS_EEU = 34;;
+let _XCORE_INS_ENDIN = 35;;
+let _XCORE_INS_ENTSP = 36;;
+let _XCORE_INS_EQ = 37;;
+let _XCORE_INS_EXTDP = 38;;
+let _XCORE_INS_EXTSP = 39;;
+let _XCORE_INS_FREER = 40;;
+let _XCORE_INS_FREET = 41;;
+let _XCORE_INS_GETD = 42;;
+let _XCORE_INS_GET = 43;;
+let _XCORE_INS_GETN = 44;;
+let _XCORE_INS_GETR = 45;;
+let _XCORE_INS_GETSR = 46;;
+let _XCORE_INS_GETST = 47;;
+let _XCORE_INS_GETTS = 48;;
+let _XCORE_INS_INCT = 49;;
+let _XCORE_INS_INIT = 50;;
+let _XCORE_INS_INPW = 51;;
+let _XCORE_INS_INSHR = 52;;
+let _XCORE_INS_INT = 53;;
+let _XCORE_INS_IN = 54;;
+let _XCORE_INS_KCALL = 55;;
+let _XCORE_INS_KENTSP = 56;;
+let _XCORE_INS_KRESTSP = 57;;
+let _XCORE_INS_KRET = 58;;
+let _XCORE_INS_LADD = 59;;
+let _XCORE_INS_LD16S = 60;;
+let _XCORE_INS_LD8U = 61;;
+let _XCORE_INS_LDA16 = 62;;
+let _XCORE_INS_LDAP = 63;;
+let _XCORE_INS_LDAW = 64;;
+let _XCORE_INS_LDC = 65;;
+let _XCORE_INS_LDW = 66;;
+let _XCORE_INS_LDIVU = 67;;
+let _XCORE_INS_LMUL = 68;;
+let _XCORE_INS_LSS = 69;;
+let _XCORE_INS_LSUB = 70;;
+let _XCORE_INS_LSU = 71;;
+let _XCORE_INS_MACCS = 72;;
+let _XCORE_INS_MACCU = 73;;
+let _XCORE_INS_MJOIN = 74;;
+let _XCORE_INS_MKMSK = 75;;
+let _XCORE_INS_MSYNC = 76;;
+let _XCORE_INS_MUL = 77;;
+let _XCORE_INS_NEG = 78;;
+let _XCORE_INS_NOT = 79;;
+let _XCORE_INS_OR = 80;;
+let _XCORE_INS_OUTCT = 81;;
+let _XCORE_INS_OUTPW = 82;;
+let _XCORE_INS_OUTSHR = 83;;
+let _XCORE_INS_OUTT = 84;;
+let _XCORE_INS_OUT = 85;;
+let _XCORE_INS_PEEK = 86;;
+let _XCORE_INS_REMS = 87;;
+let _XCORE_INS_REMU = 88;;
+let _XCORE_INS_RETSP = 89;;
+let _XCORE_INS_SETCLK = 90;;
+let _XCORE_INS_SET = 91;;
+let _XCORE_INS_SETC = 92;;
+let _XCORE_INS_SETD = 93;;
+let _XCORE_INS_SETEV = 94;;
+let _XCORE_INS_SETN = 95;;
+let _XCORE_INS_SETPSC = 96;;
+let _XCORE_INS_SETPT = 97;;
+let _XCORE_INS_SETRDY = 98;;
+let _XCORE_INS_SETSR = 99;;
+let _XCORE_INS_SETTW = 100;;
+let _XCORE_INS_SETV = 101;;
+let _XCORE_INS_SEXT = 102;;
+let _XCORE_INS_SHL = 103;;
+let _XCORE_INS_SHR = 104;;
+let _XCORE_INS_SSYNC = 105;;
+let _XCORE_INS_ST16 = 106;;
+let _XCORE_INS_ST8 = 107;;
+let _XCORE_INS_STW = 108;;
+let _XCORE_INS_SUB = 109;;
+let _XCORE_INS_SYNCR = 110;;
+let _XCORE_INS_TESTCT = 111;;
+let _XCORE_INS_TESTLCL = 112;;
+let _XCORE_INS_TESTWCT = 113;;
+let _XCORE_INS_TSETMR = 114;;
+let _XCORE_INS_START = 115;;
+let _XCORE_INS_WAITEF = 116;;
+let _XCORE_INS_WAITET = 117;;
+let _XCORE_INS_WAITEU = 118;;
+let _XCORE_INS_XOR = 119;;
+let _XCORE_INS_ZEXT = 120;;
+let _XCORE_INS_ENDING = 121;;
+
+let _XCORE_GRP_INVALID = 0;;
+let _XCORE_GRP_JUMP = 1;;
+let _XCORE_GRP_ENDING = 2;;

thirdparty/capstone/bindings/powershell/Capstone/Capstone.Format.ps1xml

@@ -0,0 +1,157 @@
+<?xml version="1.0" encoding="utf-8" ?>
+<Configuration>
+  <DefaultSettings>
+    <EnumerableExpansions>
+        <EnumerableExpansion>
+            <Expand>Both</Expand>
+        </EnumerableExpansion>
+    </EnumerableExpansions>
+  </DefaultSettings>
+    <ViewDefinitions>
+        <View>
+            <Name>CapstoneDisassemblyViewSimple</Name>
+                <ViewSelectedBy>
+                    <TypeName>CapstoneDisassembly.Simple</TypeName>
+                </ViewSelectedBy>
+                <ListControl>
+                <ListEntries>
+                    <ListEntry>
+                        <ListItems>
+                            <ListItem>
+                                <PropertyName>Address</PropertyName>
+                                <FormatString>0x{0:X}</FormatString>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>Instruction</PropertyName>
+                            </ListItem>
+                        </ListItems>
+                    </ListEntry>
+                </ListEntries>
+            </ListControl>
+        </View>
+        <View>
+            <Name>CapstoneDisassemblyViewSimple</Name>
+                <ViewSelectedBy>
+                    <TypeName>CapstoneDisassembly.Simple</TypeName>
+                </ViewSelectedBy>
+            <TableControl>
+                <TableHeaders>
+                    <TableColumnHeader>
+                        <Label>Address</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>Instruction</Label>
+                    </TableColumnHeader>
+                </TableHeaders>
+                <TableRowEntries>
+                    <TableRowEntry>
+                        <TableColumnItems>
+                            <TableColumnItem>
+                                <PropertyName>Address</PropertyName>
+                                <FormatString>0x{0:x}</FormatString>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>Instruction</PropertyName>
+                            </TableColumnItem>
+                        </TableColumnItems>
+                    </TableRowEntry>
+                 </TableRowEntries>
+            </TableControl>
+        </View>
+        <View>
+            <Name>CapstoneDisassemblyViewDetailed</Name>
+                <ViewSelectedBy>
+                    <TypeName>CapstoneDisassembly.Detailed</TypeName>
+                </ViewSelectedBy>
+                <ListControl>
+                <ListEntries>
+                    <ListEntry>
+                        <ListItems>
+                            <ListItem>
+                                <PropertyName>Address</PropertyName>
+                                <FormatString>0x{0:X}</FormatString>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>Mnemonic</PropertyName>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>Operands</PropertyName>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>Bytes</PropertyName>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>Size</PropertyName>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>RegRead</PropertyName>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>RegWrite</PropertyName>
+                            </ListItem>
+                        </ListItems>
+                    </ListEntry>
+                </ListEntries>
+            </ListControl>
+        </View>
+        <View>
+            <Name>CapstoneDisassemblyViewDetailed</Name>
+                <ViewSelectedBy>
+                    <TypeName>CapstoneDisassembly.Detailed</TypeName>
+                </ViewSelectedBy>
+            <TableControl>
+                <TableHeaders>
+                    <TableColumnHeader>
+                        <Label>Address</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>Mnemonic</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>Operands</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>Bytes</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>Size</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>RegRead</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>RegWrite</Label>
+                    </TableColumnHeader>
+                </TableHeaders>
+                <TableRowEntries>
+                    <TableRowEntry>
+                        <TableColumnItems>
+                            <TableColumnItem>
+                                <PropertyName>Address</PropertyName>
+                                <FormatString>0x{0:x}</FormatString>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>Mnemonic</PropertyName>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>Operands</PropertyName>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>Bytes</PropertyName>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>Size</PropertyName>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>RegRead</PropertyName>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>RegWrite</PropertyName>
+                            </TableColumnItem>
+                        </TableColumnItems>
+                    </TableRowEntry>
+                 </TableRowEntries>
+            </TableControl>
+        </View>
+    </ViewDefinitions>
+</Configuration>

thirdparty/capstone/bindings/powershell/Capstone/Capstone.psd1

@@ -0,0 +1,118 @@
+#
+# Module manifest for module 'Capstone'
+#
+
+@{
+
+# Script module or binary module file associated with this manifest.
+ModuleToProcess = 'Capstone.psm1'
+
+# Version number of this module.
+ModuleVersion = '0.0.0.2'
+
+# Supported PSEditions
+# CompatiblePSEditions = @()
+
+# ID used to uniquely identify this module
+GUID = 'd34db33f-9958-436d-a2d8-a77844a2bda5'
+
+# Author of this module
+Author = 'Ruben Boonen, beatcracker'
+
+# Company or vendor of this module
+# CompanyName = 'Unknown'
+
+# Copyright statement for this module
+Copyright = 'BSD 3-Clause'
+
+# Description of the functionality provided by this module
+Description = 'Capstone Engine Binding Module'
+
+# Minimum version of the Windows PowerShell engine required by this module
+PowerShellVersion = '2.0'
+
+# Name of the Windows PowerShell host required by this module
+# PowerShellHostName = ''
+
+# Minimum version of the Windows PowerShell host required by this module
+# PowerShellHostVersion = ''
+
+# Minimum version of Microsoft .NET Framework required by this module. This prerequisite is valid for the PowerShell Desktop edition only.
+# DotNetFrameworkVersion = ''
+
+# Minimum version of the common language runtime (CLR) required by this module. This prerequisite is valid for the PowerShell Desktop edition only.
+# CLRVersion = ''
+
+# Processor architecture (None, X86, Amd64) required by this module
+# ProcessorArchitecture = ''
+
+# Modules that must be imported into the global environment prior to importing this module
+# RequiredModules = @()
+
+# Assemblies that must be loaded prior to importing this module
+# RequiredAssemblies = @()
+
+# Script files (.ps1) that are run in the caller's environment prior to importing this module.
+# ScriptsToProcess = @()
+
+# Type files (.ps1xml) to be loaded when importing this module
+# TypesToProcess = @()
+
+# Format files (.ps1xml) to be loaded when importing this module
+FormatsToProcess = 'Capstone.Format.ps1xml'
+
+# Modules to import as nested modules of the module specified in RootModule/ModuleToProcess
+# NestedModules = @()
+
+# Functions to export from this module, for best performance, do not use wildcards and do not delete the entry, use an empty array if there are no functions to export.
+FunctionsToExport = 'Get-CapstoneVersion', 'Get-CapstoneDisassembly'
+
+# Cmdlets to export from this module, for best performance, do not use wildcards and do not delete the entry, use an empty array if there are no cmdlets to export.
+CmdletsToExport = @()
+
+# Variables to export from this module
+VariablesToExport = @()
+
+# Aliases to export from this module, for best performance, do not use wildcards and do not delete the entry, use an empty array if there are no aliases to export.
+AliasesToExport = @()
+
+# DSC resources to export from this module
+# DscResourcesToExport = @()
+
+# List of all modules packaged with this module
+# ModuleList = @()
+
+# List of all files packaged with this module
+# FileList = @()
+
+# Private data to pass to the module specified in RootModule/ModuleToProcess. This may also contain a PSData hashtable with additional module metadata used by PowerShell.
+PrivateData = @{
+
+    PSData = @{
+
+        # Tags applied to this module. These help with module discovery in online galleries.
+        # Tags = @()
+
+        # A URL to the license for this module.
+        # LicenseUri = ''
+
+        # A URL to the main website for this project.
+        # ProjectUri = ''
+
+        # A URL to an icon representing this module.
+        # IconUri = ''
+
+        # ReleaseNotes of this module
+        # ReleaseNotes = ''
+
+    } # End of PSData hashtable
+
+} # End of PrivateData hashtable
+
+# HelpInfo URI of this module
+# HelpInfoURI = ''
+
+# Default prefix for commands exported from this module. Override the default prefix using Import-Module -Prefix.
+# DefaultCommandPrefix = ''
+
+}

thirdparty/capstone/bindings/powershell/Capstone/Capstone.psm1

@@ -0,0 +1,500 @@
+<#
+.SYNOPSIS
+    Get Capstone version as Version object
+#>
+function Get-CapstoneVersion {
+    $Version = [System.BitConverter]::GetBytes(
+        [Capstone]::cs_version($null, $null)
+    )
+
+    New-Object -TypeName version -ArgumentList @(
+        $Version[1]
+        $Version[0]
+        0
+        0
+    )
+}
+
+<#
+.SYNOPSIS
+    Create C# bindings for capstone.dll
+
+.PARAMETER DllPath
+    Path to capstone.dll
+#>
+function Initialize-Capstone {
+    [CmdletBinding()]
+    Param (
+        [Parameter(Mandatory = $true)]
+        [ValidateScript( {
+                try {
+                    Test-Path -Path $_ -PathType Leaf -ErrorAction Stop
+                } catch {
+                    throw "Capstone DLL is missing: $DllPath"
+                }
+            })]
+        [ValidateNotNullOrEmpty()]
+        [string]$DllPath
+    )
+
+    # Escape path for use in inline C#
+    $DllPath = $DllPath.Replace('\', '\\')
+
+    # Inline C# to parse the unmanaged capstone DLL
+    # http://stackoverflow.com/questions/16552801/how-do-i-conditionally-add-a-class-with-add-type-typedefinition-if-it-isnt-add
+    if (-not ([System.Management.Automation.PSTypeName]'Capstone').Type) {
+        Add-Type -TypeDefinition @"
+        using System;
+        using System.Diagnostics;
+        using System.Runtime.InteropServices;
+        using System.Security.Principal;
+
+        [StructLayout(LayoutKind.Sequential)]
+        public struct cs_insn
+        {
+            public uint id;
+            public ulong address;
+            public ushort size;
+            [MarshalAs(UnmanagedType.ByValArray, SizeConst = 24)]
+            public byte[] bytes;
+            [MarshalAs(UnmanagedType.ByValTStr, SizeConst = 32)]
+            public string mnemonic;
+            [MarshalAs(UnmanagedType.ByValTStr, SizeConst = 160)]
+            public string operands;
+            public IntPtr detail;
+        }
+
+        /// Partial, only architecture-independent internal data
+        [StructLayout(LayoutKind.Sequential)]
+        public struct cs_detail
+        {
+            [MarshalAs(UnmanagedType.ByValArray, SizeConst = 16)]
+            public byte[] regs_read;
+            public byte regs_read_count;
+            [MarshalAs(UnmanagedType.ByValArray, SizeConst = 20)]
+            public byte[] regs_write;
+            public byte regs_write_count;
+            [MarshalAs(UnmanagedType.ByValArray, SizeConst = 8)]
+            public byte[] groups;
+            public byte groups_count;
+        }
+
+        public enum cs_err : int
+        {
+            CS_ERR_OK = 0,    /// No error: everything was fine
+            CS_ERR_MEM,       /// Out-Of-Memory error: cs_open(), cs_disasm(), cs_disasm_iter()
+            CS_ERR_ARCH,      /// Unsupported architecture: cs_open()
+            CS_ERR_HANDLE,    /// Invalid handle: cs_op_count(), cs_op_index()
+            CS_ERR_CSH,       /// Invalid csh argument: cs_close(), cs_errno(), cs_option()
+            CS_ERR_MODE,      /// Invalid/unsupported mode: cs_open()
+            CS_ERR_OPTION,    /// Invalid/unsupported option: cs_option()
+            CS_ERR_DETAIL,    /// Information is unavailable because detail option is OFF
+            CS_ERR_MEMSETUP,  /// Dynamic memory management uninitialized (see CS_OPT_MEM)
+            CS_ERR_VERSION,   /// Unsupported version (bindings)
+            CS_ERR_DIET,      /// Access irrelevant data in "diet" engine
+            CS_ERR_SKIPDATA,  /// Access irrelevant data for "data" instruction in SKIPDATA mode
+            CS_ERR_X86_ATT,   /// X86 AT&T syntax is unsupported (opt-out at compile time)
+            CS_ERR_X86_INTEL, /// X86 Intel syntax is unsupported (opt-out at compile time)
+        }
+        public enum cs_arch : int
+        {
+            CS_ARCH_ARM = 0,      /// ARM architecture (including Thumb, Thumb-2)
+            CS_ARCH_ARM64,        /// ARM-64, also called AArch64
+            CS_ARCH_MIPS,         /// Mips architecture
+            CS_ARCH_X86,          /// X86 architecture (including x86 & x86-64)
+            CS_ARCH_PPC,          /// PowerPC architecture
+            CS_ARCH_SPARC,        /// Sparc architecture
+            CS_ARCH_SYSZ,         /// SystemZ architecture
+            CS_ARCH_XCORE,        /// XCore architecture
+            CS_ARCH_MAX,
+            CS_ARCH_ALL = 0xFFFF, /// All architectures - for cs_support()
+        }
+        public enum cs_mode : int
+        {
+            CS_MODE_LITTLE_ENDIAN = 0,    /// little-endian mode (default mode)
+            CS_MODE_ARM = 0,              /// 32-bit ARM
+            CS_MODE_16 = 1 << 1,          /// 16-bit mode (X86)
+            CS_MODE_32 = 1 << 2,          /// 32-bit mode (X86)
+            CS_MODE_64 = 1 << 3,          /// 64-bit mode (X86, PPC)
+            CS_MODE_THUMB = 1 << 4,       /// ARM's Thumb mode, including Thumb-2
+            CS_MODE_MCLASS = 1 << 5,      /// ARM's Cortex-M series
+            CS_MODE_V8 = 1 << 6,          /// ARMv8 A32 encodings for ARM
+            CS_MODE_MICRO = 1 << 4,       /// MicroMips mode (MIPS)
+            CS_MODE_MIPS3 = 1 << 5,       /// Mips III ISA
+            CS_MODE_MIPS32R6 = 1 << 6,    /// Mips32r6 ISA
+            CS_MODE_MIPSGP64 = 1 << 7,    /// General Purpose Registers are 64-bit wide (MIPS)
+            CS_MODE_V9 = 1 << 4,          /// SparcV9 mode (Sparc)
+            CS_MODE_BIG_ENDIAN = 1 << 31, /// big-endian mode
+            CS_MODE_MIPS32 = CS_MODE_32,  /// Mips32 ISA (Mips)
+            CS_MODE_MIPS64 = CS_MODE_64,  /// Mips64 ISA (Mips)
+        }
+
+        public static class Capstone
+        {
+            [DllImport("$DllPath")]
+            public static extern cs_err cs_open(
+                cs_arch arch,
+                cs_mode mode,
+                ref IntPtr handle);
+
+            [DllImport("$DllPath")]
+            public static extern UInt32 cs_disasm(
+                IntPtr handle,
+                byte[] code,
+                int code_size,
+                ulong address,
+                int count,
+                ref IntPtr insn);
+
+            [DllImport("$DllPath")]
+            public static extern bool cs_free(
+                IntPtr insn,
+                int count);
+
+            [DllImport("$DllPath")]
+            public static extern cs_err cs_close(
+                ref IntPtr handle);
+
+            [DllImport("$DllPath")]
+            public static extern cs_err cs_option(
+                IntPtr handle,
+                int type,
+                int value);
+
+            [DllImport("$DllPath", CallingConvention = CallingConvention.Cdecl)]
+            public static extern IntPtr cs_reg_name(
+                IntPtr handle,
+                uint reg_id);
+
+            [DllImport("$DllPath")]
+            public static extern int cs_version(
+                uint major,
+                uint minor);
+        }
+"@
+    } else {
+        Write-Verbose 'C# bindings are already compiled'
+    }
+}
+
+function Get-CapstoneDisassembly {
+<#
+.SYNOPSIS
+    Powershell wrapper for Capstone (using inline C#).
+
+.DESCRIPTION
+    Author: Ruben Boonen (@FuzzySec), @beatcracker
+    License: BSD 3-Clause
+    Required Dependencies: None
+    Optional Dependencies: None
+
+.PARAMETER Architecture
+    Architecture type.
+
+.PARAMETER Mode
+    Mode type.
+
+.PARAMETER Bytes
+    Byte array to be disassembled.
+
+.PARAMETER Syntax
+    Syntax for output assembly.
+
+.PARAMETER Address
+    Assign address for the first instruction to be disassembled.
+
+.PARAMETER Detailed
+    Return detailed output.
+
+.PARAMETER Version
+    Print ASCII version banner.
+
+.EXAMPLE
+
+    C:\PS> $Bytes = [byte[]] @( 0x10, 0xf1, 0x10, 0xe7, 0x11, 0xf2, 0x31, 0xe7, 0xdc, 0xa1, 0x2e, 0xf3, 0xe8, 0x4e, 0x62, 0xf3 )
+    C:\PS> Get-CapstoneDisassembly -Architecture CS_ARCH_ARM -Mode CS_MODE_ARM -Bytes $Bytes
+
+    Address     : 0x100000
+    Instruction : sdiv r0, r0, r1
+
+    Address     : 0x100004
+    Instruction : udiv r1, r1, r2
+
+    Address     : 0x100008
+    Instruction : vbit q5, q15, q6
+
+    Address     : 0x10000C
+    Instruction : vcgt.f32 q10, q9, q12
+
+.EXAMPLE
+
+    # Detailed mode & ATT syntax
+    C:\PS> $Bytes = [byte[]] @( 0xB8, 0x0A, 0x00, 0x00, 0x00, 0xF7, 0xF3 )
+    C:\PS> Get-CapstoneDisassembly -Architecture CS_ARCH_X86 -Mode CS_MODE_32 -Bytes $Bytes -Syntax ATT -Detailed
+
+    Address  : 0x100000
+    Mnemonic : movl
+    Operands : $0xa, %eax
+    Bytes    : {184, 10, 0, 0...}
+    Size     : 5
+    RegRead  :
+    RegWrite :
+
+    Address  : 0x100005
+    Mnemonic : divl
+    Operands : %ebx
+    Bytes    : {247, 243}
+    Size     : 2
+    RegRead  : {eax, edx}
+    RegWrite : {eax, edx, eflags}
+
+.EXAMPLE
+
+    # Get-CapstoneDisassembly emits objects
+    C:\PS> $Bytes = [byte[]] @( 0xB8, 0x0A, 0x00, 0x00, 0x00, 0xF7, 0xF3 )
+    C:\PS> $Object = Get-CapstoneDisassembly -Architecture CS_ARCH_X86 -Mode CS_MODE_32 -Bytes $Bytes -Detailed
+    C:\PS> $Object | Select-Object -Property Size, Mnemonic, Operands
+
+    Size Mnemonic Operands
+    ---- -------- --------
+    5 mov      eax, 0xa
+    2 div      ebx
+#>
+    [CmdletBinding(DefaultParameterSetName = 'Capstone')]
+    Param (
+        [Parameter(ParameterSetName = 'Capstone', Mandatory = $true)]
+        [ValidateSet(
+            'CS_ARCH_ARM',
+            'CS_ARCH_ARM64',
+            'CS_ARCH_MIPS',
+            'CS_ARCH_X86',
+            'CS_ARCH_PPC',
+            'CS_ARCH_SPARC',
+            'CS_ARCH_SYSZ',
+            'CS_ARCH_XCORE',
+            'CS_ARCH_MAX',
+            'CS_ARCH_ALL'
+        )]
+        [string]$Architecture,
+
+        [Parameter(ParameterSetName = 'Capstone', Mandatory = $true)]
+        [ValidateSet(
+            'CS_MODE_LITTLE_ENDIAN',
+            'CS_MODE_ARM',
+            'CS_MODE_16',
+            'CS_MODE_32',
+            'CS_MODE_64',
+            'CS_MODE_THUMB',
+            'CS_MODE_MCLASS',
+            'CS_MODE_V8',
+            'CS_MODE_MICRO',
+            'CS_MODE_MIPS3',
+            'CS_MODE_MIPS32R6',
+            'CS_MODE_MIPSGP64',
+            'CS_MODE_V9',
+            'CS_MODE_BIG_ENDIAN',
+            'CS_MODE_MIPS32',
+            'CS_MODE_MIPS64'
+        )]
+        [string]$Mode,
+
+        [Parameter(ParameterSetName = 'Capstone', Mandatory = $true)]
+        [ValidateNotNullOrEmpty()]
+        [byte[]]$Bytes,
+
+        [Parameter(ParameterSetName = 'Capstone')]
+        [ValidateSet(
+            'Intel',
+            'ATT'
+        )]
+        [string]$Syntax = 'Intel',
+
+        [Parameter(ParameterSetName = 'Capstone')]
+        [uint64]$Address = 0x100000,
+
+        [Parameter(ParameterSetName = 'Capstone')]
+        [switch]$Detailed,
+
+        [Parameter(ParameterSetName = 'Version')]
+        [switch]$Version
+    )
+
+    if ($Version) {
+        $Banner = @'
+
+                 (((;
+              (; "((((\
+           ;((((((; "((((;
+          ((((""\(((( "((((
+        ((((" ((\ "(((( "(((\
+      ;(((/ ((((((( "(((( \(((
+     ((((" (((* "(((( \(((;"(((\
+    ((((";((("/(( \(((;"(((\"(((\
+   (((( (((( ((((" "(((\ ((() (((\
+  ;((("(((( (((*     **"" ((()"(((;
+  (((" ((( (((( ((((((((((((((:*(((
+ (((( (((*)((( ********"""" ;;(((((;
+ (((* ((( (((((((((((((((((((((*"" (
+ ((("(((( """***********"""" ;;(((((
+  "" (((((((((((((((((((((((((((*""
+         """****(((((****"""
+
+     -=[Capstone Engine v{0}]=-
+
+'@ -f (Get-CapstoneVersion).ToString(2)
+        # Mmm ASCII version banner!
+        return $Banner
+    }
+
+    # Disasm Handle
+    $DisAsmHandle = [System.IntPtr]::Zero
+
+    # Initialize Capstone with cs_open()
+    $CallResult = [Capstone]::cs_open($Architecture, $Mode, [ref]$DisAsmHandle)
+    if ($CallResult -ne 'CS_ERR_OK') {
+        if ($CallResult -eq 'CS_ERR_MODE') {
+            throw "Invalid Architecture/Mode combination: $Architecture/$Mode"
+        } else {
+            throw "cs_open error: $CallResult"
+        }
+    }
+
+    # Set disassembly syntax
+    #---
+    # cs_opt_type  -> CS_OPT_SYNTAX = 1
+    #---
+    # cs_opt_value -> CS_OPT_SYNTAX_INTEL = 1
+    #              -> CS_OPT_SYNTAX_ATT   = 2
+    if ($Syntax -eq 'Intel') {
+        $CS_OPT_SYNTAX = 1
+    } else {
+        $CS_OPT_SYNTAX = 2
+    }
+
+    $CallResult = [Capstone]::cs_option($DisAsmHandle, 1, $CS_OPT_SYNTAX)
+    if ($CallResult -ne 'CS_ERR_OK') {
+        $CallResult = [Capstone]::cs_close([ref]$DisAsmHandle)
+        throw "cs_option error: $CallResult"
+    }
+
+    # Set disassembly detail
+    #---
+    # cs_opt_type  -> CS_OPT_DETAIL = 2
+    #---
+    # cs_opt_value -> CS_OPT_ON  = 3
+    #              -> CS_OPT_OFF = 0
+    if ($Detailed) {
+        $CS_OPT = 3
+    } else {
+        $CS_OPT = 0
+    }
+
+    $CallResult = [Capstone]::cs_option($DisAsmHandle, 2, $CS_OPT)
+    if ($CallResult -ne 'CS_ERR_OK') {
+        $CallResult = [Capstone]::cs_close([ref]$DisAsmHandle)
+        throw "cs_option error: $CallResult"
+    }
+
+    # Out Buffer Handle
+    $InsnHandle = [System.IntPtr]::Zero
+
+    # Disassemble bytes
+    $Count = [Capstone]::cs_disasm($DisAsmHandle, $Bytes, $Bytes.Count, $Address, 0, [ref]$InsnHandle)
+
+    if ($Count -gt 0) {
+        # Result struct
+        $cs_insn = if ($PSVersionTable.PSVersion.Major -gt 2) {
+            [cs_insn]@{}
+        } else {
+            New-Object -TypeName cs_insn
+        }
+
+        $cs_insn_size = [System.Runtime.InteropServices.Marshal]::SizeOf($cs_insn)
+        $cs_insn = $cs_insn.GetType()
+
+        # Result detail struct
+        $cs_detail = if ($PSVersionTable.PSVersion.Major -gt 2) {
+            [cs_detail]@{}
+        } else {
+            New-Object -TypeName cs_detail
+        }
+        $cs_detail = $cs_detail.GetType()
+
+        # Result buffer offset
+        $BuffOffset = $InsnHandle.ToInt64()
+
+        for ($i = 0 ; $i -lt $Count ; $i++) {
+            # Cast Offset to cs_insn
+            $Cast = [System.Runtime.InteropServices.Marshal]::PtrToStructure([System.Intptr]$BuffOffset, [type]$cs_insn)
+
+            if ($CS_OPT -eq 0) {
+                $Disassembly = @{
+                    Address     = $Cast.address
+                    Instruction = '{0} {1}' -f $Cast.mnemonic, $Cast.operands
+                }
+
+                if ($PSVersionTable.PSVersion.Major -gt 2) {
+                    # Add TypeName for PS formatting and output result
+                    $Disassembly.PSTypeName ='CapstoneDisassembly.Simple'
+                    [pscustomobject]$Disassembly
+                } else {
+                    $Disassembly = New-Object -TypeName PSObject -Property $Disassembly
+                    # Add TypeName for PS formatting and output result
+                    $Disassembly.PSObject.TypeNames.Insert(0, 'CapstoneDisassembly.Simple')
+                    $Disassembly
+                }
+            } else {
+                $DetailCast = [System.Runtime.InteropServices.Marshal]::PtrToStructure($Cast.detail, [type]$cs_detail)
+                if ($DetailCast.regs_read_count -gt 0) {
+                    $RegRead = for ($r = 0 ; $r -lt $DetailCast.regs_read_count ; $r++) {
+                        $NamePointer = [Capstone]::cs_reg_name($DisAsmHandle, $DetailCast.regs_read[$r])
+                        [System.Runtime.InteropServices.Marshal]::PtrToStringAnsi($NamePointer)
+                    }
+                }
+
+                if ($DetailCast.regs_write_count -gt 0) {
+                    $RegWrite = for ($r = 0 ; $r -lt $DetailCast.regs_write_count ; $r++) {
+                        $NamePointer = [Capstone]::cs_reg_name($DisAsmHandle, $DetailCast.regs_write[$r])
+                        [System.Runtime.InteropServices.Marshal]::PtrToStringAnsi($NamePointer)
+                    }
+                }
+
+                $Disassembly = @{
+                    Address    = $Cast.address
+                    Mnemonic   = $Cast.mnemonic
+                    Operands   = $Cast.operands
+                    Bytes      = $Cast.bytes[0..($Cast.size - 1)]
+                    Size       = $Cast.size
+                    RegRead    = $RegRead
+                    RegWrite   = $RegWrite
+                }
+
+                if ($PSVersionTable.PSVersion.Major -gt 2) {
+                    # Add TypeName for PS formatting and output result
+                    $Disassembly.PSTypeName = 'CapstoneDisassembly.Detailed'
+                    [pscustomobject]$Disassembly
+                } else {
+                    $Disassembly = New-Object -TypeName PSObject -Property $Disassembly
+                    # Add TypeName for PS formatting and output result
+                    $Disassembly.PSObject.TypeNames.Insert(0, 'CapstoneDisassembly.Detailed')
+                    $Disassembly
+                }
+            }
+            $BuffOffset = $BuffOffset + $cs_insn_size
+        }
+    } else {
+        $CallResult = [Capstone]::cs_close([ref]$DisAsmHandle)
+        throw 'Disassembly Failed'
+    }
+
+    # Free Buffer Handle
+    $CallResult = [Capstone]::cs_free($InsnHandle, $Count)
+}
+
+#region Init
+
+Initialize-Capstone -DllPath (
+    Join-Path -Path $PSScriptRoot -ChildPath 'Lib\Capstone\capstone.dll'
+) -ErrorAction Stop
+
+#endregion

thirdparty/capstone/bindings/powershell/README.md

@@ -0,0 +1,30 @@
+This documentation explains how to install & use the PowerShell binding for Capstone.
+
+
+Install
+------
+
+Compile the relevant version (x86/x64) of `capstone.dll` and place it in
+`./Capstone/Lib/Capstone/`.
+
+Alternatively, pre-compiled DLL’s can be obtained from the Capstone homepage
+at http://capstone-engine.org/download
+
+
+Usage
+-----
+
+To use the PowerShell binding, the entire Capstone folder should be added to
+one of the PowerShell module directories:
+
+    # Global PSModulePath path
+    %Windir%\System32\WindowsPowerShell\v1.0\Modules
+
+    # User PSModulePath path
+    %UserProfile%\Documents\WindowsPowerShell\Modules
+
+Once this is done the module can be initialized by typing “Import-Module Capstone”
+in a new PowerShell terminal. Further information on the usage of the binding
+can be obtained with the following command:
+
+    Get-Help Get-CapstoneDisassembly -Full

thirdparty/capstone/bindings/python/.gitignore

@@ -0,0 +1,8 @@
+MANIFEST
+dist/
+capstone/lib
+capstone/include
+pyx/lib
+pyx/include
+pyx/*.c
+pyx/*.pyx

thirdparty/capstone/bindings/python/BUILDING.md

@@ -0,0 +1,20 @@
+0. This documentation explains how to install the Python bindings for Capstone
+   from source. If you want to install it from a PyPi package (recommended if
+   you are on Windows), see README.txt.
+
+1. To install Capstone and the Python bindings on *nix, run the command below:
+
+```
+pip install bindings/python/
+```
+
+2. The tests directory contains some test code to show how to use the Capstone API.
+
+- test_lite.py
+  Similarly to test_basic.py, but this code shows how to use disasm_lite(), a lighter
+  method to disassemble binary. Unlike disasm() API (used by test_basic.py), which returns
+  CsInsn objects, this API just returns tuples of (address, size, mnemonic, op_str).
+
+  The main reason for using this API is better performance: disasm_lite() is at least
+  20% faster than disasm(). Memory usage is also less. So if you just need basic
+  information out of disassembler, use disasm_lite() instead of disasm().

thirdparty/capstone/bindings/python/LICENSE.TXT

@@ -0,0 +1,31 @@
+This is the software license for Capstone disassembly framework.
+Capstone has been designed & implemented by Nguyen Anh Quynh <aquynh@gmail.com>
+
+See http://www.capstone-engine.org for further information.
+
+Copyright (c) 2013, COSEINC.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+  this list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice,
+  this list of conditions and the following disclaimer in the documentation
+  and/or other materials provided with the distribution.
+* Neither the name of the developer(s) nor the names of its
+  contributors may be used to endorse or promote products derived from this
+  software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.

thirdparty/capstone/bindings/python/MANIFEST.in

@@ -0,0 +1,5 @@
+recursive-include src *
+include LICENSE.TXT
+include README.txt
+include BUILDING.txt
+include Makefile

thirdparty/capstone/bindings/python/Makefile

@@ -0,0 +1,47 @@
+PYTHON3 ?= python3
+
+.PHONY: gen_const install sdist bdist clean check
+
+gen_const:
+	cd .. && $(PYTHON3) const_generator.py python
+
+install:
+	rm -rf src/
+	if test -n "${DESTDIR}"; then \
+		$(PYTHON3) setup.py build install --root="${DESTDIR}"; \
+	else \
+		$(PYTHON3) setup.py build install; \
+	fi
+
+# build & upload PyPi package with source code of the core
+sdist:
+	rm -rf src/ dist/
+	$(PYTHON3) setup.py sdist register upload
+
+# build & upload PyPi package with prebuilt core
+bdist:
+	rm -rf src/ dist/
+	$(PYTHON3) setup.py bdist_wheel register upload
+
+clean:
+	rm -rf build/ src/ dist/ *.egg-info
+	rm -rf capstone/lib capstone/include pyx/lib pyx/include
+	rm -f pyx/*.c pyx/__init__.py
+	for f in capstone/*.py; do rm -f pyx/$$(basename $$f)x; done
+	rm -f MANIFEST
+	rm -f *.pyc capstone/*.pyc
+
+
+TESTS = test_basic.py test_detail.py test_arm.py test_aarch64.py test_m68k.py test_mips.py
+TESTS += test_ppc.py test_sparc.py test_systemz.py test_x86.py test_xcore.py test_tms320c64x.py
+TESTS += test_m680x.py test_skipdata.py test_mos65xx.py test_bpf.py test_riscv.py
+TESTS += test_evm.py test_tricore.py test_wasm.py test_sh.py test_hppa.py
+TESTS += test_lite.py test_iter.py test_customized_mnem.py test_alpha.py
+
+check:
+	@for t in $(TESTS); do \
+		echo Check $$t ... ; \
+		./tests/$$t > /dev/null; \
+		if [ $$? -eq 0 ]; then echo OK; else echo FAILED; exit 1; fi \
+	done
+

thirdparty/capstone/bindings/python/README.txt

@@ -0,0 +1,64 @@
+To install Capstone, you should run `pip install capstone`.
+
+If you would like to build Capstone with just the source distribution, without
+pip, just run `python setup.py install` in the folder with setup.py in it.
+
+In order to use this source distribution, you will need an environment that can
+compile C code. On Linux, this is usually easy, but on Windows, this involves
+installing Visual Studio and using the "Developer Command Prompt" to perform the
+installation. See BUILDING.txt for more information.
+
+By default, attempting to install the python bindings will trigger a build of
+the capstone native core. If this is undesirable for whatever reason, for
+instance, you already have a globally installed copy of libcapstone, you may
+inhibit the build by setting the environment variable LIBCAPSTONE_PATH. The
+exact value is not checked, just setting it will inhibit the build. During
+execution, this variable may be set to the path of a directory containing a
+specific version of libcapstone you would like to use.
+
+If you don't want to build your own copy of Capstone, you can use a precompiled
+binary distribution from PyPI. Saying `pip install capstone` should
+automatically obtain an appropriate copy for your system. If it does not, please
+open an issue at https://github.com/capstone-engine/capstone.
+
+--------------------------------------------------------------------------------
+
+Capstone is a disassembly framework with the target of becoming the ultimate
+disasm engine for binary analysis and reversing in the security community.
+
+Created by Nguyen Anh Quynh, then developed and maintained by a small community,
+Capstone offers some unparalleled features:
+
+- Support multiple hardware architectures: ARM, AARCH64 (ARMv8), Mips, PPC, Sparc,
+  SystemZ, XCore and X86 (including X86_64).
+
+- Having clean/simple/lightweight/intuitive architecture-neutral API.
+
+- Provide details on disassembled instruction (called “decomposer” by others).
+
+- Provide semantics of the disassembled instruction, such as list of implicit
+  registers read & written.
+
+- Implemented in pure C language, with lightweight wrappers for C++, C#, Go,
+  Java, NodeJS, Ocaml, Python, Ruby & Vala ready (available in main code,
+  or provided externally by the community).
+
+- Native support for all popular platforms: Windows, Mac OSX, iOS, Android,
+  Linux, *BSD, Solaris, etc.
+
+- Thread-safe by design.
+
+- Special support for embedding into firmware or OS kernel.
+
+- High performance & suitable for malware analysis (capable of handling various
+  X86 malware tricks).
+
+- Distributed under the open source BSD license.
+
+Further information is available at http://www.capstone-engine.org
+
+
+[License]
+
+This project is released under the BSD license. If you redistribute the binary
+or source code of Capstone, please attach file LICENSE.TXT with your products.

thirdparty/capstone/bindings/python/build_wheel.sh

@@ -0,0 +1,16 @@
+#!/bin/bash
+set -e -x
+
+cd bindings/python
+if [ -f /opt/python/cp311-cp311/bin/python3 ];then
+  # Use manylinux Python
+  /opt/python/cp311-cp311/bin/python3 -m pip install wheel
+  /opt/python/cp311-cp311/bin/python3 setup.py bdist_wheel
+else
+  python3 -m pip install wheel
+  python3 setup.py bdist_wheel
+fi
+
+cd dist
+auditwheel repair *.whl
+mv -f wheelhouse/*.whl .

thirdparty/capstone/bindings/python/capstone/aarch64.py

@@ -0,0 +1,159 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .aarch64_const import *
+
+# define the API
+class AArch64OpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint),
+        ('index', ctypes.c_uint),
+        ('disp', ctypes.c_int32),
+    )
+
+class AArch64ImmRange(ctypes.Structure):
+    _fields_ = (
+        ('first', ctypes.c_int8),
+        ('offset', ctypes.c_int8),
+    )
+
+class AArch64SMESliceOffset(ctypes.Union):
+    _fields_ = (
+        ('imm', ctypes.c_int8),
+        ('imm_range', AArch64ImmRange)
+    )
+
+class AArch64OpSme(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('tile', ctypes.c_uint),
+        ('slice_reg', ctypes.c_uint),
+        ('slice_offset', AArch64SMESliceOffset),
+        ('has_range_offset', ctypes.c_bool),
+        ('is_vertical', ctypes.c_bool),
+    )
+
+class AArch64OpPred(ctypes.Structure):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('vec_select', ctypes.c_uint),
+        ('imm_index', ctypes.c_int),
+    )
+
+class AArch64OpShift(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', ctypes.c_uint),
+    )
+
+class AArch64SysOpSysReg(ctypes.Union):
+    _fields_ = (
+        ('sysreg', ctypes.c_uint),
+        ('tlbi', ctypes.c_uint),
+        ('ic', ctypes.c_uint),
+        ('raw_val', ctypes.c_uint64),
+    )
+
+class AArch64SysOpSysImm(ctypes.Union):
+    _fields_ = (
+        ('dbnxs', ctypes.c_uint),
+        ('exactfpimm', ctypes.c_uint),
+        ('raw_val', ctypes.c_uint64),
+    )
+
+class AArch64SysOpSysAlias(ctypes.Union):
+    _fields_ = (
+        ('svcr', ctypes.c_uint),
+        ('at', ctypes.c_uint),
+        ('db', ctypes.c_uint),
+        ('dc', ctypes.c_uint),
+        ('isb', ctypes.c_uint),
+        ('tsb', ctypes.c_uint),
+        ('prfm', ctypes.c_uint),
+        ('sveprfm', ctypes.c_uint),
+        ('rprfm', ctypes.c_uint),
+        ('pstateimm0_15', ctypes.c_uint),
+        ('pstateimm0_1', ctypes.c_uint),
+        ('psb', ctypes.c_uint),
+        ('bti', ctypes.c_uint),
+        ('svepredpat', ctypes.c_uint),
+        ('sveveclenspecifier', ctypes.c_uint),
+        ('raw_val', ctypes.c_uint64),
+    )
+class AArch64SysOp(ctypes.Structure):
+    _fields_ = (
+        ('reg', AArch64SysOpSysReg),
+        ('imm', AArch64SysOpSysImm),
+        ('alias', AArch64SysOpSysAlias),
+        ('sub_type', ctypes.c_uint),
+    )
+
+class AArch64OpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int64),
+        ('imm_range', AArch64ImmRange),
+        ('fp', ctypes.c_double),
+        ('mem', AArch64OpMem),
+        ('sysop', AArch64SysOp),
+        ('sme', AArch64OpSme),
+        ('pred', AArch64OpPred),
+    )
+
+class AArch64Op(ctypes.Structure):
+    _fields_ = (
+        ('vector_index', ctypes.c_int),
+        ('vas', ctypes.c_uint),
+        ('shift', AArch64OpShift),
+        ('ext', ctypes.c_uint),
+        ('type', ctypes.c_uint),
+        ('is_vreg', ctypes.c_bool),
+        ('value', AArch64OpValue),
+        ('access', ctypes.c_uint8),
+        ('is_list_member', ctypes.c_bool),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def fp(self):
+        return self.value.fp
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+    @property
+    def imm_range(self):
+        return self.value.imm_range
+
+    @property
+    def sysop(self):
+        return self.value.sysop
+
+    @property
+    def sme(self):
+        return self.value.sme
+
+
+
+class CsAArch64(ctypes.Structure):
+    _fields_ = (
+        ('cc', ctypes.c_uint),
+        ('update_flags', ctypes.c_bool),
+        ('post_index', ctypes.c_bool),
+        ('is_doing_sme', ctypes.c_bool),
+        ('op_count', ctypes.c_uint8),
+        ('operands', AArch64Op * 8),
+    )
+
+def get_arch_info(a):
+    return (a.cc, a.update_flags, a.post_index, copy_ctypes_list(a.operands[:a.op_count]))
+

thirdparty/capstone/bindings/python/capstone/alpha.py

@@ -0,0 +1,43 @@
+import ctypes
+from . import copy_ctypes_list
+from .alpha_const import *
+
+class AlphaOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint8),
+        ('disp', ctypes.c_int32),
+    )
+
+
+class AlphaOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int32),
+    )
+
+
+class AlphaOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', AlphaOpValue),
+        ('access', ctypes.c_uint8)
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+
+# Instruction structure
+class CsAlpha(ctypes.Structure):
+    _fields_ = (
+        ('op_count', ctypes.c_uint8),
+        ('operands', AlphaOp * 3)
+    )
+
+def get_arch_info(a):
+    return (copy_ctypes_list(a.operands[:a.op_count]))

thirdparty/capstone/bindings/python/capstone/alpha_const.py

@@ -0,0 +1,241 @@
+from . import CS_OP_INVALID, CS_OP_REG, CS_OP_IMM, CS_OP_FP, CS_OP_PRED, CS_OP_SPECIAL, CS_OP_MEM, CS_OP_MEM_REG, CS_OP_MEM_IMM, UINT16_MAX
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [alpha_const.py]
+
+# Operand type for instruction's operands
+ALPHA_OP_INVALID = CS_OP_INVALID
+ALPHA_OP_REG = CS_OP_REG
+ALPHA_OP_IMM = CS_OP_IMM
+
+# Alpha registers
+
+Alpha_REG_INVALID = 0
+Alpha_REG_F0 = 1
+Alpha_REG_F1 = 2
+Alpha_REG_F2 = 3
+Alpha_REG_F3 = 4
+Alpha_REG_F4 = 5
+Alpha_REG_F5 = 6
+Alpha_REG_F6 = 7
+Alpha_REG_F7 = 8
+Alpha_REG_F8 = 9
+Alpha_REG_F9 = 10
+Alpha_REG_F10 = 11
+Alpha_REG_F11 = 12
+Alpha_REG_F12 = 13
+Alpha_REG_F13 = 14
+Alpha_REG_F14 = 15
+Alpha_REG_F15 = 16
+Alpha_REG_F16 = 17
+Alpha_REG_F17 = 18
+Alpha_REG_F18 = 19
+Alpha_REG_F19 = 20
+Alpha_REG_F20 = 21
+Alpha_REG_F21 = 22
+Alpha_REG_F22 = 23
+Alpha_REG_F23 = 24
+Alpha_REG_F24 = 25
+Alpha_REG_F25 = 26
+Alpha_REG_F26 = 27
+Alpha_REG_F27 = 28
+Alpha_REG_F28 = 29
+Alpha_REG_F29 = 30
+Alpha_REG_F30 = 31
+Alpha_REG_F31 = 32
+Alpha_REG_R0 = 33
+Alpha_REG_R1 = 34
+Alpha_REG_R2 = 35
+Alpha_REG_R3 = 36
+Alpha_REG_R4 = 37
+Alpha_REG_R5 = 38
+Alpha_REG_R6 = 39
+Alpha_REG_R7 = 40
+Alpha_REG_R8 = 41
+Alpha_REG_R9 = 42
+Alpha_REG_R10 = 43
+Alpha_REG_R11 = 44
+Alpha_REG_R12 = 45
+Alpha_REG_R13 = 46
+Alpha_REG_R14 = 47
+Alpha_REG_R15 = 48
+Alpha_REG_R16 = 49
+Alpha_REG_R17 = 50
+Alpha_REG_R18 = 51
+Alpha_REG_R19 = 52
+Alpha_REG_R20 = 53
+Alpha_REG_R21 = 54
+Alpha_REG_R22 = 55
+Alpha_REG_R23 = 56
+Alpha_REG_R24 = 57
+Alpha_REG_R25 = 58
+Alpha_REG_R26 = 59
+Alpha_REG_R27 = 60
+Alpha_REG_R28 = 61
+Alpha_REG_R29 = 62
+Alpha_REG_R30 = 63
+Alpha_REG_R31 = 64
+Alpha_REG_ENDING = 65
+
+# Alpha instruction
+
+Alpha_INS_INVALID = 0
+Alpha_INS_ADDL = 1
+Alpha_INS_ADDQ = 2
+Alpha_INS_ADDSsSU = 3
+Alpha_INS_ADDTsSU = 4
+Alpha_INS_AND = 5
+Alpha_INS_BEQ = 6
+Alpha_INS_BGE = 7
+Alpha_INS_BGT = 8
+Alpha_INS_BIC = 9
+Alpha_INS_BIS = 10
+Alpha_INS_BLBC = 11
+Alpha_INS_BLBS = 12
+Alpha_INS_BLE = 13
+Alpha_INS_BLT = 14
+Alpha_INS_BNE = 15
+Alpha_INS_BR = 16
+Alpha_INS_BSR = 17
+Alpha_INS_CMOVEQ = 18
+Alpha_INS_CMOVGE = 19
+Alpha_INS_CMOVGT = 20
+Alpha_INS_CMOVLBC = 21
+Alpha_INS_CMOVLBS = 22
+Alpha_INS_CMOVLE = 23
+Alpha_INS_CMOVLT = 24
+Alpha_INS_CMOVNE = 25
+Alpha_INS_CMPBGE = 26
+Alpha_INS_CMPEQ = 27
+Alpha_INS_CMPLE = 28
+Alpha_INS_CMPLT = 29
+Alpha_INS_CMPTEQsSU = 30
+Alpha_INS_CMPTLEsSU = 31
+Alpha_INS_CMPTLTsSU = 32
+Alpha_INS_CMPTUNsSU = 33
+Alpha_INS_CMPULE = 34
+Alpha_INS_CMPULT = 35
+Alpha_INS_COND_BRANCH = 36
+Alpha_INS_CPYSE = 37
+Alpha_INS_CPYSN = 38
+Alpha_INS_CPYS = 39
+Alpha_INS_CTLZ = 40
+Alpha_INS_CTPOP = 41
+Alpha_INS_CTTZ = 42
+Alpha_INS_CVTQSsSUI = 43
+Alpha_INS_CVTQTsSUI = 44
+Alpha_INS_CVTSTsS = 45
+Alpha_INS_CVTTQsSVC = 46
+Alpha_INS_CVTTSsSUI = 47
+Alpha_INS_DIVSsSU = 48
+Alpha_INS_DIVTsSU = 49
+Alpha_INS_ECB = 50
+Alpha_INS_EQV = 51
+Alpha_INS_EXCB = 52
+Alpha_INS_EXTBL = 53
+Alpha_INS_EXTLH = 54
+Alpha_INS_EXTLL = 55
+Alpha_INS_EXTQH = 56
+Alpha_INS_EXTQL = 57
+Alpha_INS_EXTWH = 58
+Alpha_INS_EXTWL = 59
+Alpha_INS_FBEQ = 60
+Alpha_INS_FBGE = 61
+Alpha_INS_FBGT = 62
+Alpha_INS_FBLE = 63
+Alpha_INS_FBLT = 64
+Alpha_INS_FBNE = 65
+Alpha_INS_FCMOVEQ = 66
+Alpha_INS_FCMOVGE = 67
+Alpha_INS_FCMOVGT = 68
+Alpha_INS_FCMOVLE = 69
+Alpha_INS_FCMOVLT = 70
+Alpha_INS_FCMOVNE = 71
+Alpha_INS_FETCH = 72
+Alpha_INS_FETCH_M = 73
+Alpha_INS_FTOIS = 74
+Alpha_INS_FTOIT = 75
+Alpha_INS_INSBL = 76
+Alpha_INS_INSLH = 77
+Alpha_INS_INSLL = 78
+Alpha_INS_INSQH = 79
+Alpha_INS_INSQL = 80
+Alpha_INS_INSWH = 81
+Alpha_INS_INSWL = 82
+Alpha_INS_ITOFS = 83
+Alpha_INS_ITOFT = 84
+Alpha_INS_JMP = 85
+Alpha_INS_JSR = 86
+Alpha_INS_JSR_COROUTINE = 87
+Alpha_INS_LDA = 88
+Alpha_INS_LDAH = 89
+Alpha_INS_LDBU = 90
+Alpha_INS_LDL = 91
+Alpha_INS_LDL_L = 92
+Alpha_INS_LDQ = 93
+Alpha_INS_LDQ_L = 94
+Alpha_INS_LDQ_U = 95
+Alpha_INS_LDS = 96
+Alpha_INS_LDT = 97
+Alpha_INS_LDWU = 98
+Alpha_INS_MB = 99
+Alpha_INS_MSKBL = 100
+Alpha_INS_MSKLH = 101
+Alpha_INS_MSKLL = 102
+Alpha_INS_MSKQH = 103
+Alpha_INS_MSKQL = 104
+Alpha_INS_MSKWH = 105
+Alpha_INS_MSKWL = 106
+Alpha_INS_MULL = 107
+Alpha_INS_MULQ = 108
+Alpha_INS_MULSsSU = 109
+Alpha_INS_MULTsSU = 110
+Alpha_INS_ORNOT = 111
+Alpha_INS_RC = 112
+Alpha_INS_RET = 113
+Alpha_INS_RPCC = 114
+Alpha_INS_RS = 115
+Alpha_INS_S4ADDL = 116
+Alpha_INS_S4ADDQ = 117
+Alpha_INS_S4SUBL = 118
+Alpha_INS_S4SUBQ = 119
+Alpha_INS_S8ADDL = 120
+Alpha_INS_S8ADDQ = 121
+Alpha_INS_S8SUBL = 122
+Alpha_INS_S8SUBQ = 123
+Alpha_INS_SEXTB = 124
+Alpha_INS_SEXTW = 125
+Alpha_INS_SLL = 126
+Alpha_INS_SQRTSsSU = 127
+Alpha_INS_SQRTTsSU = 128
+Alpha_INS_SRA = 129
+Alpha_INS_SRL = 130
+Alpha_INS_STB = 131
+Alpha_INS_STL = 132
+Alpha_INS_STL_C = 133
+Alpha_INS_STQ = 134
+Alpha_INS_STQ_C = 135
+Alpha_INS_STQ_U = 136
+Alpha_INS_STS = 137
+Alpha_INS_STT = 138
+Alpha_INS_STW = 139
+Alpha_INS_SUBL = 140
+Alpha_INS_SUBQ = 141
+Alpha_INS_SUBSsSU = 142
+Alpha_INS_SUBTsSU = 143
+Alpha_INS_TRAPB = 144
+Alpha_INS_UMULH = 145
+Alpha_INS_WH64 = 146
+Alpha_INS_WH64EN = 147
+Alpha_INS_WMB = 148
+Alpha_INS_XOR = 149
+Alpha_INS_ZAPNOT = 150
+ALPHA_INS_ENDING = 151
+
+# Group of Alpha instructions
+
+Alpha_GRP_INVALID = 0
+
+# Generic groups
+Alpha_GRP_CALL = 1
+Alpha_GRP_JUMP = 2
+Alpha_GRP_BRANCH_RELATIVE = 3
+Alpha_GRP_ENDING = 4

thirdparty/capstone/bindings/python/capstone/arm.py

@@ -0,0 +1,109 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .arm_const import *
+
+# define the API
+class ArmOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint),
+        ('index', ctypes.c_uint),
+        ('scale', ctypes.c_int),
+        ('disp', ctypes.c_int),
+        ('lshift', ctypes.c_int),
+        ('align', ctypes.c_uint),
+    )
+
+class ArmOpShift(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', ctypes.c_uint),
+    )
+
+class ArmSysopReg(ctypes.Union):
+    _fields_ = (
+        ('mclasssysreg', ctypes.c_uint),
+        ('bankedreg', ctypes.c_uint),
+    )
+
+class ArmOpSysop(ctypes.Structure):
+    _fields_ = (
+        ('reg', ArmSysopReg),
+        ('psr_bits', ctypes.c_uint),
+        ('sysm', ctypes.c_uint16),
+        ('msr_mask', ctypes.c_uint8),
+    )
+
+class ArmOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('sysop', ArmOpSysop),
+        ('imm', ctypes.c_int64),
+        ('pred', ctypes.c_int),
+        ('fp', ctypes.c_double),
+        ('mem', ArmOpMem),
+        ('setend', ctypes.c_int),
+    )
+
+class ArmOp(ctypes.Structure):
+    _fields_ = (
+        ('vector_index', ctypes.c_int),
+        ('shift', ArmOpShift),
+        ('type', ctypes.c_uint),
+        ('value', ArmOpValue),
+        ('subtracted', ctypes.c_bool),
+        ('access', ctypes.c_uint8),
+        ('neon_lane', ctypes.c_int8),
+    )
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def sysop(self):
+        return self.value.sysop
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def pred(self):
+        return self.value.pred
+
+    @property
+    def fp(self):
+        return self.value.fp
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+    @property
+    def setend(self):
+        return self.value.setend
+
+
+class CsArm(ctypes.Structure):
+    _fields_ = (
+        ('usermode', ctypes.c_bool),
+        ('vector_size', ctypes.c_int),
+        ('vector_data', ctypes.c_int),
+        ('cps_mode', ctypes.c_int),
+        ('cps_flag', ctypes.c_int),
+        ('cc', ctypes.c_uint),
+        ('vcc', ctypes.c_uint),
+        ('update_flags', ctypes.c_bool),
+        ('post_index', ctypes.c_bool),
+        ('mem_barrier', ctypes.c_int),
+        ('pred_mask', ctypes.c_uint8),
+        ('op_count', ctypes.c_uint8),
+        ('operands', ArmOp * 36),
+    )
+
+def get_arch_info(a):
+    return (a.usermode, a.vector_size, a.vector_data, a.cps_mode, a.cps_flag, a.cc, a.vcc, a.update_flags, \
+        a.post_index, a.mem_barrier, a.pred_mask, copy_ctypes_list(a.operands[:a.op_count]))
+

thirdparty/capstone/bindings/python/capstone/bpf.py

@@ -0,0 +1,69 @@
+# Capstone Python bindings
+# BPF by david942j <david942j@gmail.com>, 2019
+
+import ctypes
+from . import copy_ctypes_list
+from .bpf_const import *
+
+class BPFOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint8),
+        ('disp', ctypes.c_int32),
+    )
+
+class BPFOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint8),
+        ('imm', ctypes.c_uint64),
+        ('off', ctypes.c_uint32),
+        ('mem', BPFOpMem),
+        ('mmem', ctypes.c_uint32),
+        ('msh', ctypes.c_uint32),
+        ('ext', ctypes.c_uint32),
+    )
+
+class BPFOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', BPFOpValue),
+        ('access', ctypes.c_uint8),
+    )
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def off(self):
+        return self.value.off
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+    @property
+    def mmem(self):
+        return self.value.mmem
+
+    @property
+    def msh(self):
+        return self.value.msh
+
+    @property
+    def ext(self):
+        return self.value.ext
+
+
+class CsBPF(ctypes.Structure):
+    _fields_ = (
+        ('op_count', ctypes.c_uint8),
+        ('operands', BPFOp * 4),
+    )
+
+def get_arch_info(a):
+    return (copy_ctypes_list(a.operands[:a.op_count]))
+

thirdparty/capstone/bindings/python/capstone/bpf_const.py

@@ -0,0 +1,118 @@
+from . import CS_OP_INVALID, CS_OP_REG, CS_OP_IMM, CS_OP_FP, CS_OP_PRED, CS_OP_SPECIAL, CS_OP_MEM, CS_OP_MEM_REG, CS_OP_MEM_IMM, UINT16_MAX
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [bpf_const.py]
+
+BPF_OP_INVALID = 0
+BPF_OP_REG = 1
+BPF_OP_IMM = 2
+BPF_OP_OFF = 3
+BPF_OP_MEM = 4
+BPF_OP_MMEM = 5
+BPF_OP_MSH = 6
+BPF_OP_EXT = 7
+
+BPF_REG_INVALID = 0
+BPF_REG_A = 1
+BPF_REG_X = 2
+BPF_REG_R0 = 3
+BPF_REG_R1 = 4
+BPF_REG_R2 = 5
+BPF_REG_R3 = 6
+BPF_REG_R4 = 7
+BPF_REG_R5 = 8
+BPF_REG_R6 = 9
+BPF_REG_R7 = 10
+BPF_REG_R8 = 11
+BPF_REG_R9 = 12
+BPF_REG_R10 = 13
+BPF_REG_ENDING = 14
+
+BPF_EXT_INVALID = 0
+BPF_EXT_LEN = 1
+
+BPF_INS_INVALID = 0
+BPF_INS_ADD = 1
+BPF_INS_SUB = 2
+BPF_INS_MUL = 3
+BPF_INS_DIV = 4
+BPF_INS_OR = 5
+BPF_INS_AND = 6
+BPF_INS_LSH = 7
+BPF_INS_RSH = 8
+BPF_INS_NEG = 9
+BPF_INS_MOD = 10
+BPF_INS_XOR = 11
+BPF_INS_MOV = 12
+BPF_INS_ARSH = 13
+BPF_INS_ADD64 = 14
+BPF_INS_SUB64 = 15
+BPF_INS_MUL64 = 16
+BPF_INS_DIV64 = 17
+BPF_INS_OR64 = 18
+BPF_INS_AND64 = 19
+BPF_INS_LSH64 = 20
+BPF_INS_RSH64 = 21
+BPF_INS_NEG64 = 22
+BPF_INS_MOD64 = 23
+BPF_INS_XOR64 = 24
+BPF_INS_MOV64 = 25
+BPF_INS_ARSH64 = 26
+BPF_INS_LE16 = 27
+BPF_INS_LE32 = 28
+BPF_INS_LE64 = 29
+BPF_INS_BE16 = 30
+BPF_INS_BE32 = 31
+BPF_INS_BE64 = 32
+BPF_INS_BSWAP16 = 33
+BPF_INS_BSWAP32 = 34
+BPF_INS_BSWAP64 = 35
+BPF_INS_LDW = 36
+BPF_INS_LDH = 37
+BPF_INS_LDB = 38
+BPF_INS_LDDW = 39
+BPF_INS_LDXW = 40
+BPF_INS_LDXH = 41
+BPF_INS_LDXB = 42
+BPF_INS_LDXDW = 43
+BPF_INS_STW = 44
+BPF_INS_STH = 45
+BPF_INS_STB = 46
+BPF_INS_STDW = 47
+BPF_INS_STXW = 48
+BPF_INS_STXH = 49
+BPF_INS_STXB = 50
+BPF_INS_STXDW = 51
+BPF_INS_XADDW = 52
+BPF_INS_XADDDW = 53
+BPF_INS_JMP = 54
+BPF_INS_JEQ = 55
+BPF_INS_JGT = 56
+BPF_INS_JGE = 57
+BPF_INS_JSET = 58
+BPF_INS_JNE = 59
+BPF_INS_JSGT = 60
+BPF_INS_JSGE = 61
+BPF_INS_CALL = 62
+BPF_INS_CALLX = 63
+BPF_INS_EXIT = 64
+BPF_INS_JLT = 65
+BPF_INS_JLE = 66
+BPF_INS_JSLT = 67
+BPF_INS_JSLE = 68
+BPF_INS_RET = 69
+BPF_INS_TAX = 70
+BPF_INS_TXA = 71
+BPF_INS_ENDING = 72
+BPF_INS_LD = BPF_INS_LDW
+BPF_INS_LDX = BPF_INS_LDXW
+BPF_INS_ST = BPF_INS_STW
+BPF_INS_STX = BPF_INS_STXW
+
+BPF_GRP_INVALID = 0
+BPF_GRP_LOAD = 1
+BPF_GRP_STORE = 2
+BPF_GRP_ALU = 3
+BPF_GRP_JUMP = 4
+BPF_GRP_CALL = 5
+BPF_GRP_RETURN = 6
+BPF_GRP_MISC = 7
+BPF_GRP_ENDING = 8

thirdparty/capstone/bindings/python/capstone/evm.py

@@ -0,0 +1,17 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .evm_const import *
+
+# define the API
+class CsEvm(ctypes.Structure):
+    _fields_ = (
+        ('pop', ctypes.c_byte),
+        ('push', ctypes.c_byte),
+        ('fee', ctypes.c_uint),
+    )
+
+def get_arch_info(a):
+    return (a.pop, a.push, a.fee)
+

thirdparty/capstone/bindings/python/capstone/evm_const.py

@@ -0,0 +1,152 @@
+from . import CS_OP_INVALID, CS_OP_REG, CS_OP_IMM, CS_OP_FP, CS_OP_PRED, CS_OP_SPECIAL, CS_OP_MEM, CS_OP_MEM_REG, CS_OP_MEM_IMM, UINT16_MAX
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [evm_const.py]
+
+EVM_INS_STOP = 0
+EVM_INS_ADD = 1
+EVM_INS_MUL = 2
+EVM_INS_SUB = 3
+EVM_INS_DIV = 4
+EVM_INS_SDIV = 5
+EVM_INS_MOD = 6
+EVM_INS_SMOD = 7
+EVM_INS_ADDMOD = 8
+EVM_INS_MULMOD = 9
+EVM_INS_EXP = 10
+EVM_INS_SIGNEXTEND = 11
+EVM_INS_LT = 16
+EVM_INS_GT = 17
+EVM_INS_SLT = 18
+EVM_INS_SGT = 19
+EVM_INS_EQ = 20
+EVM_INS_ISZERO = 21
+EVM_INS_AND = 22
+EVM_INS_OR = 23
+EVM_INS_XOR = 24
+EVM_INS_NOT = 25
+EVM_INS_BYTE = 26
+EVM_INS_SHA3 = 32
+EVM_INS_ADDRESS = 48
+EVM_INS_BALANCE = 49
+EVM_INS_ORIGIN = 50
+EVM_INS_CALLER = 51
+EVM_INS_CALLVALUE = 52
+EVM_INS_CALLDATALOAD = 53
+EVM_INS_CALLDATASIZE = 54
+EVM_INS_CALLDATACOPY = 55
+EVM_INS_CODESIZE = 56
+EVM_INS_CODECOPY = 57
+EVM_INS_GASPRICE = 58
+EVM_INS_EXTCODESIZE = 59
+EVM_INS_EXTCODECOPY = 60
+EVM_INS_RETURNDATASIZE = 61
+EVM_INS_RETURNDATACOPY = 62
+EVM_INS_BLOCKHASH = 64
+EVM_INS_COINBASE = 65
+EVM_INS_TIMESTAMP = 66
+EVM_INS_NUMBER = 67
+EVM_INS_DIFFICULTY = 68
+EVM_INS_GASLIMIT = 69
+EVM_INS_POP = 80
+EVM_INS_MLOAD = 81
+EVM_INS_MSTORE = 82
+EVM_INS_MSTORE8 = 83
+EVM_INS_SLOAD = 84
+EVM_INS_SSTORE = 85
+EVM_INS_JUMP = 86
+EVM_INS_JUMPI = 87
+EVM_INS_PC = 88
+EVM_INS_MSIZE = 89
+EVM_INS_GAS = 90
+EVM_INS_JUMPDEST = 91
+EVM_INS_PUSH1 = 96
+EVM_INS_PUSH2 = 97
+EVM_INS_PUSH3 = 98
+EVM_INS_PUSH4 = 99
+EVM_INS_PUSH5 = 100
+EVM_INS_PUSH6 = 101
+EVM_INS_PUSH7 = 102
+EVM_INS_PUSH8 = 103
+EVM_INS_PUSH9 = 104
+EVM_INS_PUSH10 = 105
+EVM_INS_PUSH11 = 106
+EVM_INS_PUSH12 = 107
+EVM_INS_PUSH13 = 108
+EVM_INS_PUSH14 = 109
+EVM_INS_PUSH15 = 110
+EVM_INS_PUSH16 = 111
+EVM_INS_PUSH17 = 112
+EVM_INS_PUSH18 = 113
+EVM_INS_PUSH19 = 114
+EVM_INS_PUSH20 = 115
+EVM_INS_PUSH21 = 116
+EVM_INS_PUSH22 = 117
+EVM_INS_PUSH23 = 118
+EVM_INS_PUSH24 = 119
+EVM_INS_PUSH25 = 120
+EVM_INS_PUSH26 = 121
+EVM_INS_PUSH27 = 122
+EVM_INS_PUSH28 = 123
+EVM_INS_PUSH29 = 124
+EVM_INS_PUSH30 = 125
+EVM_INS_PUSH31 = 126
+EVM_INS_PUSH32 = 127
+EVM_INS_DUP1 = 128
+EVM_INS_DUP2 = 129
+EVM_INS_DUP3 = 130
+EVM_INS_DUP4 = 131
+EVM_INS_DUP5 = 132
+EVM_INS_DUP6 = 133
+EVM_INS_DUP7 = 134
+EVM_INS_DUP8 = 135
+EVM_INS_DUP9 = 136
+EVM_INS_DUP10 = 137
+EVM_INS_DUP11 = 138
+EVM_INS_DUP12 = 139
+EVM_INS_DUP13 = 140
+EVM_INS_DUP14 = 141
+EVM_INS_DUP15 = 142
+EVM_INS_DUP16 = 143
+EVM_INS_SWAP1 = 144
+EVM_INS_SWAP2 = 145
+EVM_INS_SWAP3 = 146
+EVM_INS_SWAP4 = 147
+EVM_INS_SWAP5 = 148
+EVM_INS_SWAP6 = 149
+EVM_INS_SWAP7 = 150
+EVM_INS_SWAP8 = 151
+EVM_INS_SWAP9 = 152
+EVM_INS_SWAP10 = 153
+EVM_INS_SWAP11 = 154
+EVM_INS_SWAP12 = 155
+EVM_INS_SWAP13 = 156
+EVM_INS_SWAP14 = 157
+EVM_INS_SWAP15 = 158
+EVM_INS_SWAP16 = 159
+EVM_INS_LOG0 = 160
+EVM_INS_LOG1 = 161
+EVM_INS_LOG2 = 162
+EVM_INS_LOG3 = 163
+EVM_INS_LOG4 = 164
+EVM_INS_CREATE = 240
+EVM_INS_CALL = 241
+EVM_INS_CALLCODE = 242
+EVM_INS_RETURN = 243
+EVM_INS_DELEGATECALL = 244
+EVM_INS_CALLBLACKBOX = 245
+EVM_INS_STATICCALL = 250
+EVM_INS_REVERT = 253
+EVM_INS_SUICIDE = 255
+EVM_INS_INVALID = 512
+EVM_INS_ENDING = 513
+
+EVM_GRP_INVALID = 0
+EVM_GRP_JUMP = 1
+EVM_GRP_MATH = 8
+EVM_GRP_STACK_WRITE = 9
+EVM_GRP_STACK_READ = 10
+EVM_GRP_MEM_WRITE = 11
+EVM_GRP_MEM_READ = 12
+EVM_GRP_STORE_WRITE = 13
+EVM_GRP_STORE_READ = 14
+EVM_GRP_HALT = 15
+EVM_GRP_ENDING = 16

thirdparty/capstone/bindings/python/capstone/hppa.py

@@ -0,0 +1,72 @@
+# Capstone Python bindings, by Dmitry Sibirtsev <sibirtsevdl@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .hppa_const import *
+
+
+
+class HPPAOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint),
+        ('space', ctypes.c_uint),
+        ('base_access', ctypes.c_uint8),
+    )
+
+class HPPAModifierValue(ctypes.Union):
+    _fields_ = (
+        ('str_mod', ctypes.c_char_p),
+        ('int_mod', ctypes.c_uint32)
+    )
+
+class HPPAModifier(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_int),
+        ('value', HPPAModifierValue)
+    )
+
+class HPPAExt(ctypes.Structure):
+    _fields_ = (
+        ('modifiers', HPPAModifier * 5),
+        ('mod_num', ctypes.c_uint8),
+        ('b_writable', ctypes.c_bool),
+        ('cmplt', ctypes.c_bool)
+    )
+
+class HPPAOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int64),
+        ('mem', HPPAOpMem)
+    )
+
+
+class HPPAOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint8),
+        ('value', HPPAOpValue),
+        ('access', ctypes.c_uint8)
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+    
+    @property    
+    def mem(self):
+        return self.value.mem
+
+
+# Instruction structure
+class CsHPPA(ctypes.Structure):
+    _fields_ = (
+        ('op_count', ctypes.c_uint8),
+        ('operands', HPPAOp * 5)
+    )
+
+def get_arch_info(a):
+    return (copy_ctypes_list(a.operands[:a.op_count]))