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Sajid
2024-09-07 18:00:09 +06:00
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299
thirdparty/capstone/bindings/ocaml/Makefile vendored Normal file
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# Capstone Disassembler Engine
# By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015
LIB = capstone
FLAGS = '-Wall -Wextra -Wwrite-strings'
PYTHON2 ?= python
all: arm_const.cmxa arm64_const.cmxa m680x_const.cmxa mips_const.cmxa ppc_const.cmxa sparc_const.cmxa sysz_const.cmxa x86_const.cmxa xcore_const.cmxa arm.cmxa arm64.cmxa m680x.cmxa mips.cmxa ppc.cmxa x86.cmxa sparc.cmxa systemz.cmxa xcore.cmxa capstone.cmxa test_basic.cmx test_detail.cmx test_x86.cmx test_arm.cmx test_aarch64.cmx test_mips.cmx test_ppc.cmx test_sparc.cmx test_systemz.cmx test_xcore.cmx test_m680x.cmx ocaml.o
ocamlopt -o test_basic -ccopt $(FLAGS) ocaml.o capstone.cmx test_basic.cmx -cclib -l$(LIB)
ocamlopt -o test_detail -ccopt $(FLAGS) capstone.cmx ocaml.o test_detail.cmx -cclib -l$(LIB)
ocamlopt -o test_x86 -ccopt $(FLAGS) capstone.cmx ocaml.o x86.cmx x86_const.cmx test_x86.cmx -cclib -l$(LIB)
ocamlopt -o test_arm -ccopt $(FLAGS) capstone.cmx ocaml.o arm.cmx arm_const.cmx test_arm.cmx -cclib -l$(LIB)
ocamlopt -o test_aarch64 -ccopt $(FLAGS) capstone.cmx ocaml.o arm64.cmx arm64_const.cmx test_aarch64.cmx -cclib -l$(LIB)
ocamlopt -o test_mips -ccopt $(FLAGS) capstone.cmx ocaml.o mips.cmx mips_const.cmx test_mips.cmx -cclib -l$(LIB)
ocamlopt -o test_ppc -ccopt $(FLAGS) capstone.cmx ocaml.o ppc.cmx ppc_const.cmx test_ppc.cmx -cclib -l$(LIB)
ocamlopt -o test_sparc -ccopt $(FLAGS) capstone.cmx ocaml.o sparc.cmx sparc_const.cmx test_sparc.cmx -cclib -l$(LIB)
ocamlopt -o test_systemz -ccopt $(FLAGS) capstone.cmx ocaml.o systemz.cmx sysz_const.cmx test_systemz.cmx -cclib -l$(LIB)
ocamlopt -o test_xcore -ccopt $(FLAGS) capstone.cmx ocaml.o xcore.cmx xcore_const.cmx test_xcore.cmx -cclib -l$(LIB)
ocamlopt -o test_m680x -ccopt $(FLAGS) capstone.cmx ocaml.o m680x.cmx m680x_const.cmx test_m680x.cmx -cclib -l$(LIB)
test_basic.cmx: test_basic.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_detail.cmx: test_detail.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_x86.cmx: test_x86.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_arm.cmx: test_arm.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_aarch64.cmx: test_aarch64.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_mips.cmx: test_mips.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_ppc.cmx: test_ppc.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_sparc.cmx: test_sparc.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_systemz.cmx: test_systemz.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_xcore.cmx: test_xcore.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_m680x.cmx: test_m680x.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
ocaml.o: ocaml.c
ocamlc -ccopt $(FLAGS) -c $<
capstone.mli: capstone.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
capstone.cmi: capstone.mli
ocamlc -ccopt $(FLAGS) -c $<
capstone.cmx: capstone.ml capstone.cmi
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
capstone.cmxa: capstone.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $< -cclib -lsb_ocaml -cclib -l$(LIB)
x86.mli: x86.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
x86.cmi: x86.mli
ocamlc -ccopt $(FLAGS) -c $<
x86.cmx: x86.ml x86.cmi
ocamlopt -ccopt $(FLAGS) -c $<
x86.cmxa: x86.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
x86_const.mli: x86_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
x86_const.cmi: x86_const.mli
ocamlc -ccopt $(FLAGS) -c $<
x86_const.cmx: x86_const.ml x86_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
x86_const.cmxa: x86_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
arm.mli: arm.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
arm.cmi: arm.mli
ocamlc -ccopt $(FLAGS) -c $<
arm.cmx: arm.ml arm.cmi
ocamlopt -ccopt $(FLAGS) -c $<
arm.cmxa: arm.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
arm_const.mli: arm_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
arm_const.cmi: arm_const.mli
ocamlc -ccopt $(FLAGS) -c $<
arm_const.cmx: arm_const.ml arm_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
arm_const.cmxa: arm_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
arm64.mli: arm64.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
arm64.cmi: arm64.mli
ocamlc -ccopt $(FLAGS) -c $<
arm64.cmx: arm64.ml arm64.cmi
ocamlopt -ccopt $(FLAGS) -c $<
arm64.cmxa: arm64.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
arm64_const.mli: arm64_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
arm64_const.cmi: arm64_const.mli
ocamlc -ccopt $(FLAGS) -c $<
arm64_const.cmx: arm64_const.ml arm64_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
arm64_const.cmxa: arm64_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
m680x.mli: m680x.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
m680x.cmi: m680x.mli
ocamlc -ccopt $(FLAGS) -c $<
m680x.cmx: m680x.ml m680x.cmi
ocamlopt -ccopt $(FLAGS) -c $<
m680x.cmxa: m680x.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
m680x_const.mli: m680x_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
m680x_const.cmi: m680x_const.mli
ocamlc -ccopt $(FLAGS) -c $<
m680x_const.cmx: m680x_const.ml m680x_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
m680x_const.cmxa: m680x_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
mips.mli: mips.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
mips.cmi: mips.mli
ocamlc -ccopt $(FLAGS) -c $<
mips.cmx: mips.ml mips.cmi
ocamlopt -ccopt $(FLAGS) -c $<
mips.cmxa: mips.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
mips_const.mli: mips_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
mips_const.cmi: mips_const.mli
ocamlc -ccopt $(FLAGS) -c $<
mips_const.cmx: mips_const.ml mips_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
mips_const.cmxa: mips_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
ppc.mli: ppc.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
ppc.cmi: ppc.mli
ocamlc -ccopt $(FLAGS) -c $<
ppc.cmx: ppc.ml ppc.cmi
ocamlopt -ccopt $(FLAGS) -c $<
ppc.cmxa: ppc.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
ppc_const.mli: ppc_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
ppc_const.cmi: ppc_const.mli
ocamlc -ccopt $(FLAGS) -c $<
ppc_const.cmx: ppc_const.ml ppc_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
ppc_const.cmxa: ppc_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
sparc.mli: sparc.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
sparc.cmi: sparc.mli
ocamlc -ccopt $(FLAGS) -c $<
sparc.cmx: sparc.ml sparc.cmi
ocamlopt -ccopt $(FLAGS) -c $<
sparc.cmxa: sparc.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
sparc_const.mli: sparc_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
sparc_const.cmi: sparc_const.mli
ocamlc -ccopt $(FLAGS) -c $<
sparc_const.cmx: sparc_const.ml sparc_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
sparc_const.cmxa: sparc_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
systemz.mli: systemz.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
systemz.cmi: systemz.mli
ocamlc -ccopt $(FLAGS) -c $<
systemz.cmx: systemz.ml systemz.cmi
ocamlopt -ccopt $(FLAGS) -c $<
systemz.cmxa: systemz.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
sysz_const.mli: sysz_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
sysz_const.cmi: sysz_const.mli
ocamlc -ccopt $(FLAGS) -c $<
sysz_const.cmx: sysz_const.ml sysz_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
sysz_const.cmxa: sysz_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
xcore.mli: xcore.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
xcore.cmi: xcore.mli
ocamlc -ccopt $(FLAGS) -c $<
xcore.cmx: xcore.ml xcore.cmi
ocamlopt -ccopt $(FLAGS) -c $<
xcore.cmxa: xcore.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
xcore_const.mli: xcore_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
xcore_const.cmi: xcore_const.mli
ocamlc -ccopt $(FLAGS) -c $<
xcore_const.cmx: xcore_const.ml xcore_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
xcore_const.cmxa: xcore_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
clean:
rm -f *.[oa] *.so *.cm[ixoa] *.cmxa *.mli test_basic test_detail test_x86 test_arm test_aarch64 test_mips test_ppc test_sparc test_systemz test_xcore test_m680x
gen_const:
cd .. && $(PYTHON2) const_generator.py ocaml
TESTS = test_basic test_detail test_arm test_aarch64 test_m680x test_mips test_ppc
TESTS += test_sparc test_systemz test_x86 test_xcore
check:
@for t in $(TESTS); do \
echo Check $$t ... ; \
./$$t > /dev/null && echo OK || echo FAILED; \
done

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To compile Ocaml binding, Ocaml toolchain is needed. On Ubuntu Linux,
you can install Ocaml with:
$ sudo apt-get install ocaml-nox
To compile Ocaml binding, simply run "make" on the command line.
This directory also contains some test code to show how to use Capstone API.
- test_basic.ml
This code shows the most simple form of API where we only want to get basic
information out of disassembled instruction, such as address, mnemonic and
operand string.
- test_detail.ml:
This code shows how to access to architecture-neutral information in disassembled
instructions, such as implicit registers read/written, or groups of instructions
that this instruction belong to.
- test_<arch>.ml
These code show how to access architecture-specific information for each
architecture.

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thirdparty/capstone/bindings/ocaml/arm.ml vendored Normal file
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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Arm_const
let _CS_OP_ARCH = 5;;
let _CS_OP_CIMM = _CS_OP_ARCH (* C-Immediate *)
let _CS_OP_PIMM = _CS_OP_ARCH + 1 (* P-Immediate *)
(* architecture specific info of instruction *)
type arm_op_shift = {
shift_type: int; (* TODO: covert this to pattern like arm_op_value? *)
shift_value: int;
}
type arm_op_mem = {
base: int;
index: int;
scale: int;
disp: int;
lshift: int;
}
type arm_op_value =
| ARM_OP_INVALID of int
| ARM_OP_REG of int
| ARM_OP_CIMM of int
| ARM_OP_PIMM of int
| ARM_OP_IMM of int
| ARM_OP_FP of float
| ARM_OP_MEM of arm_op_mem
| ARM_OP_SETEND of int
type arm_op = {
vector_index: int;
shift: arm_op_shift;
value: arm_op_value;
subtracted: bool;
access: int;
neon_lane: int;
}
type cs_arm = {
usermode: bool;
vector_size: int;
vector_data: int;
cps_mode: int;
cps_flag: int;
cc: int;
update_flags: bool;
writeback: bool;
mem_barrier: int;
operands: arm_op array;
}

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thirdparty/capstone/bindings/ocaml/arm64.ml vendored Normal file
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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Arm64_const
(* architecture specific info of instruction *)
type arm64_op_shift = {
shift_type: int;
shift_value: int;
}
type arm64_op_mem = {
base: int;
index: int;
disp: int
}
type arm64_op_value =
| ARM64_OP_INVALID of int
| ARM64_OP_REG of int
| ARM64_OP_CIMM of int
| ARM64_OP_IMM of int
| ARM64_OP_FP of float
| ARM64_OP_MEM of arm64_op_mem
| ARM64_OP_REG_MRS of int
| ARM64_OP_REG_MSR of int
| ARM64_OP_PSTATE of int
| ARM64_OP_SYS of int
| ARM64_OP_PREFETCH of int
| ARM64_OP_BARRIER of int
type arm64_op = {
vector_index: int;
vas: int;
shift: arm64_op_shift;
ext: int;
value: arm64_op_value;
}
type cs_arm64 = {
cc: int;
update_flags: bool;
writeback: bool;
operands: arm64_op array;
}

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(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.ml] *)
let _ARM_SFT_INVALID = 0;;
let _ARM_SFT_ASR = 1;;
let _ARM_SFT_LSL = 2;;
let _ARM_SFT_LSR = 3;;
let _ARM_SFT_ROR = 4;;
let _ARM_SFT_RRX = 5;;
let _ARM_SFT_ASR_REG = 6;;
let _ARM_SFT_LSL_REG = 7;;
let _ARM_SFT_LSR_REG = 8;;
let _ARM_SFT_ROR_REG = 9;;
let _ARM_SFT_RRX_REG = 10;;
let _ARM_CC_INVALID = 0;;
let _ARM_CC_EQ = 1;;
let _ARM_CC_NE = 2;;
let _ARM_CC_HS = 3;;
let _ARM_CC_LO = 4;;
let _ARM_CC_MI = 5;;
let _ARM_CC_PL = 6;;
let _ARM_CC_VS = 7;;
let _ARM_CC_VC = 8;;
let _ARM_CC_HI = 9;;
let _ARM_CC_LS = 10;;
let _ARM_CC_GE = 11;;
let _ARM_CC_LT = 12;;
let _ARM_CC_GT = 13;;
let _ARM_CC_LE = 14;;
let _ARM_CC_AL = 15;;
let _ARM_SYSREG_INVALID = 0;;
let _ARM_SYSREG_SPSR_C = 1;;
let _ARM_SYSREG_SPSR_X = 2;;
let _ARM_SYSREG_SPSR_S = 4;;
let _ARM_SYSREG_SPSR_F = 8;;
let _ARM_SYSREG_CPSR_C = 16;;
let _ARM_SYSREG_CPSR_X = 32;;
let _ARM_SYSREG_CPSR_S = 64;;
let _ARM_SYSREG_CPSR_F = 128;;
let _ARM_SYSREG_APSR = 256;;
let _ARM_SYSREG_APSR_G = 257;;
let _ARM_SYSREG_APSR_NZCVQ = 258;;
let _ARM_SYSREG_APSR_NZCVQG = 259;;
let _ARM_SYSREG_IAPSR = 260;;
let _ARM_SYSREG_IAPSR_G = 261;;
let _ARM_SYSREG_IAPSR_NZCVQG = 262;;
let _ARM_SYSREG_IAPSR_NZCVQ = 263;;
let _ARM_SYSREG_EAPSR = 264;;
let _ARM_SYSREG_EAPSR_G = 265;;
let _ARM_SYSREG_EAPSR_NZCVQG = 266;;
let _ARM_SYSREG_EAPSR_NZCVQ = 267;;
let _ARM_SYSREG_XPSR = 268;;
let _ARM_SYSREG_XPSR_G = 269;;
let _ARM_SYSREG_XPSR_NZCVQG = 270;;
let _ARM_SYSREG_XPSR_NZCVQ = 271;;
let _ARM_SYSREG_IPSR = 272;;
let _ARM_SYSREG_EPSR = 273;;
let _ARM_SYSREG_IEPSR = 274;;
let _ARM_SYSREG_MSP = 275;;
let _ARM_SYSREG_PSP = 276;;
let _ARM_SYSREG_PRIMASK = 277;;
let _ARM_SYSREG_BASEPRI = 278;;
let _ARM_SYSREG_BASEPRI_MAX = 279;;
let _ARM_SYSREG_FAULTMASK = 280;;
let _ARM_SYSREG_CONTROL = 281;;
let _ARM_SYSREG_MSPLIM = 282;;
let _ARM_SYSREG_PSPLIM = 283;;
let _ARM_SYSREG_MSP_NS = 284;;
let _ARM_SYSREG_PSP_NS = 285;;
let _ARM_SYSREG_MSPLIM_NS = 286;;
let _ARM_SYSREG_PSPLIM_NS = 287;;
let _ARM_SYSREG_PRIMASK_NS = 288;;
let _ARM_SYSREG_BASEPRI_NS = 289;;
let _ARM_SYSREG_FAULTMASK_NS = 290;;
let _ARM_SYSREG_CONTROL_NS = 291;;
let _ARM_SYSREG_SP_NS = 292;;
let _ARM_SYSREG_R8_USR = 293;;
let _ARM_SYSREG_R9_USR = 294;;
let _ARM_SYSREG_R10_USR = 295;;
let _ARM_SYSREG_R11_USR = 296;;
let _ARM_SYSREG_R12_USR = 297;;
let _ARM_SYSREG_SP_USR = 298;;
let _ARM_SYSREG_LR_USR = 299;;
let _ARM_SYSREG_R8_FIQ = 300;;
let _ARM_SYSREG_R9_FIQ = 301;;
let _ARM_SYSREG_R10_FIQ = 302;;
let _ARM_SYSREG_R11_FIQ = 303;;
let _ARM_SYSREG_R12_FIQ = 304;;
let _ARM_SYSREG_SP_FIQ = 305;;
let _ARM_SYSREG_LR_FIQ = 306;;
let _ARM_SYSREG_LR_IRQ = 307;;
let _ARM_SYSREG_SP_IRQ = 308;;
let _ARM_SYSREG_LR_SVC = 309;;
let _ARM_SYSREG_SP_SVC = 310;;
let _ARM_SYSREG_LR_ABT = 311;;
let _ARM_SYSREG_SP_ABT = 312;;
let _ARM_SYSREG_LR_UND = 313;;
let _ARM_SYSREG_SP_UND = 314;;
let _ARM_SYSREG_LR_MON = 315;;
let _ARM_SYSREG_SP_MON = 316;;
let _ARM_SYSREG_ELR_HYP = 317;;
let _ARM_SYSREG_SP_HYP = 318;;
let _ARM_SYSREG_SPSR_FIQ = 319;;
let _ARM_SYSREG_SPSR_IRQ = 320;;
let _ARM_SYSREG_SPSR_SVC = 321;;
let _ARM_SYSREG_SPSR_ABT = 322;;
let _ARM_SYSREG_SPSR_UND = 323;;
let _ARM_SYSREG_SPSR_MON = 324;;
let _ARM_SYSREG_SPSR_HYP = 325;;
let _ARM_MB_INVALID = 0;;
let _ARM_MB_RESERVED_0 = 1;;
let _ARM_MB_OSHLD = 2;;
let _ARM_MB_OSHST = 3;;
let _ARM_MB_OSH = 4;;
let _ARM_MB_RESERVED_4 = 5;;
let _ARM_MB_NSHLD = 6;;
let _ARM_MB_NSHST = 7;;
let _ARM_MB_NSH = 8;;
let _ARM_MB_RESERVED_8 = 9;;
let _ARM_MB_ISHLD = 10;;
let _ARM_MB_ISHST = 11;;
let _ARM_MB_ISH = 12;;
let _ARM_MB_RESERVED_12 = 13;;
let _ARM_MB_LD = 14;;
let _ARM_MB_ST = 15;;
let _ARM_MB_SY = 16;;
let _ARM_OP_INVALID = 0;;
let _ARM_OP_REG = 1;;
let _ARM_OP_IMM = 2;;
let _ARM_OP_MEM = 3;;
let _ARM_OP_FP = 4;;
let _ARM_OP_CIMM = 64;;
let _ARM_OP_PIMM = 65;;
let _ARM_OP_SETEND = 66;;
let _ARM_OP_SYSREG = 67;;
let _ARM_SETEND_INVALID = 0;;
let _ARM_SETEND_BE = 1;;
let _ARM_SETEND_LE = 2;;
let _ARM_CPSMODE_INVALID = 0;;
let _ARM_CPSMODE_IE = 2;;
let _ARM_CPSMODE_ID = 3;;
let _ARM_CPSFLAG_INVALID = 0;;
let _ARM_CPSFLAG_F = 1;;
let _ARM_CPSFLAG_I = 2;;
let _ARM_CPSFLAG_A = 4;;
let _ARM_CPSFLAG_NONE = 16;;
let _ARM_VECTORDATA_INVALID = 0;;
let _ARM_VECTORDATA_I8 = 1;;
let _ARM_VECTORDATA_I16 = 2;;
let _ARM_VECTORDATA_I32 = 3;;
let _ARM_VECTORDATA_I64 = 4;;
let _ARM_VECTORDATA_S8 = 5;;
let _ARM_VECTORDATA_S16 = 6;;
let _ARM_VECTORDATA_S32 = 7;;
let _ARM_VECTORDATA_S64 = 8;;
let _ARM_VECTORDATA_U8 = 9;;
let _ARM_VECTORDATA_U16 = 10;;
let _ARM_VECTORDATA_U32 = 11;;
let _ARM_VECTORDATA_U64 = 12;;
let _ARM_VECTORDATA_P8 = 13;;
let _ARM_VECTORDATA_F16 = 14;;
let _ARM_VECTORDATA_F32 = 15;;
let _ARM_VECTORDATA_F64 = 16;;
let _ARM_VECTORDATA_F16F64 = 17;;
let _ARM_VECTORDATA_F64F16 = 18;;
let _ARM_VECTORDATA_F32F16 = 19;;
let _ARM_VECTORDATA_F16F32 = 20;;
let _ARM_VECTORDATA_F64F32 = 21;;
let _ARM_VECTORDATA_F32F64 = 22;;
let _ARM_VECTORDATA_S32F32 = 23;;
let _ARM_VECTORDATA_U32F32 = 24;;
let _ARM_VECTORDATA_F32S32 = 25;;
let _ARM_VECTORDATA_F32U32 = 26;;
let _ARM_VECTORDATA_F64S16 = 27;;
let _ARM_VECTORDATA_F32S16 = 28;;
let _ARM_VECTORDATA_F64S32 = 29;;
let _ARM_VECTORDATA_S16F64 = 30;;
let _ARM_VECTORDATA_S16F32 = 31;;
let _ARM_VECTORDATA_S32F64 = 32;;
let _ARM_VECTORDATA_U16F64 = 33;;
let _ARM_VECTORDATA_U16F32 = 34;;
let _ARM_VECTORDATA_U32F64 = 35;;
let _ARM_VECTORDATA_F64U16 = 36;;
let _ARM_VECTORDATA_F32U16 = 37;;
let _ARM_VECTORDATA_F64U32 = 38;;
let _ARM_VECTORDATA_F16U16 = 39;;
let _ARM_VECTORDATA_U16F16 = 40;;
let _ARM_VECTORDATA_F16U32 = 41;;
let _ARM_VECTORDATA_U32F16 = 42;;
let _ARM_REG_INVALID = 0;;
let _ARM_REG_APSR = 1;;
let _ARM_REG_APSR_NZCV = 2;;
let _ARM_REG_CPSR = 3;;
let _ARM_REG_FPEXC = 4;;
let _ARM_REG_FPINST = 5;;
let _ARM_REG_FPSCR = 6;;
let _ARM_REG_FPSCR_NZCV = 7;;
let _ARM_REG_FPSID = 8;;
let _ARM_REG_ITSTATE = 9;;
let _ARM_REG_LR = 10;;
let _ARM_REG_PC = 11;;
let _ARM_REG_SP = 12;;
let _ARM_REG_SPSR = 13;;
let _ARM_REG_D0 = 14;;
let _ARM_REG_D1 = 15;;
let _ARM_REG_D2 = 16;;
let _ARM_REG_D3 = 17;;
let _ARM_REG_D4 = 18;;
let _ARM_REG_D5 = 19;;
let _ARM_REG_D6 = 20;;
let _ARM_REG_D7 = 21;;
let _ARM_REG_D8 = 22;;
let _ARM_REG_D9 = 23;;
let _ARM_REG_D10 = 24;;
let _ARM_REG_D11 = 25;;
let _ARM_REG_D12 = 26;;
let _ARM_REG_D13 = 27;;
let _ARM_REG_D14 = 28;;
let _ARM_REG_D15 = 29;;
let _ARM_REG_D16 = 30;;
let _ARM_REG_D17 = 31;;
let _ARM_REG_D18 = 32;;
let _ARM_REG_D19 = 33;;
let _ARM_REG_D20 = 34;;
let _ARM_REG_D21 = 35;;
let _ARM_REG_D22 = 36;;
let _ARM_REG_D23 = 37;;
let _ARM_REG_D24 = 38;;
let _ARM_REG_D25 = 39;;
let _ARM_REG_D26 = 40;;
let _ARM_REG_D27 = 41;;
let _ARM_REG_D28 = 42;;
let _ARM_REG_D29 = 43;;
let _ARM_REG_D30 = 44;;
let _ARM_REG_D31 = 45;;
let _ARM_REG_FPINST2 = 46;;
let _ARM_REG_MVFR0 = 47;;
let _ARM_REG_MVFR1 = 48;;
let _ARM_REG_MVFR2 = 49;;
let _ARM_REG_Q0 = 50;;
let _ARM_REG_Q1 = 51;;
let _ARM_REG_Q2 = 52;;
let _ARM_REG_Q3 = 53;;
let _ARM_REG_Q4 = 54;;
let _ARM_REG_Q5 = 55;;
let _ARM_REG_Q6 = 56;;
let _ARM_REG_Q7 = 57;;
let _ARM_REG_Q8 = 58;;
let _ARM_REG_Q9 = 59;;
let _ARM_REG_Q10 = 60;;
let _ARM_REG_Q11 = 61;;
let _ARM_REG_Q12 = 62;;
let _ARM_REG_Q13 = 63;;
let _ARM_REG_Q14 = 64;;
let _ARM_REG_Q15 = 65;;
let _ARM_REG_R0 = 66;;
let _ARM_REG_R1 = 67;;
let _ARM_REG_R2 = 68;;
let _ARM_REG_R3 = 69;;
let _ARM_REG_R4 = 70;;
let _ARM_REG_R5 = 71;;
let _ARM_REG_R6 = 72;;
let _ARM_REG_R7 = 73;;
let _ARM_REG_R8 = 74;;
let _ARM_REG_R9 = 75;;
let _ARM_REG_R10 = 76;;
let _ARM_REG_R11 = 77;;
let _ARM_REG_R12 = 78;;
let _ARM_REG_S0 = 79;;
let _ARM_REG_S1 = 80;;
let _ARM_REG_S2 = 81;;
let _ARM_REG_S3 = 82;;
let _ARM_REG_S4 = 83;;
let _ARM_REG_S5 = 84;;
let _ARM_REG_S6 = 85;;
let _ARM_REG_S7 = 86;;
let _ARM_REG_S8 = 87;;
let _ARM_REG_S9 = 88;;
let _ARM_REG_S10 = 89;;
let _ARM_REG_S11 = 90;;
let _ARM_REG_S12 = 91;;
let _ARM_REG_S13 = 92;;
let _ARM_REG_S14 = 93;;
let _ARM_REG_S15 = 94;;
let _ARM_REG_S16 = 95;;
let _ARM_REG_S17 = 96;;
let _ARM_REG_S18 = 97;;
let _ARM_REG_S19 = 98;;
let _ARM_REG_S20 = 99;;
let _ARM_REG_S21 = 100;;
let _ARM_REG_S22 = 101;;
let _ARM_REG_S23 = 102;;
let _ARM_REG_S24 = 103;;
let _ARM_REG_S25 = 104;;
let _ARM_REG_S26 = 105;;
let _ARM_REG_S27 = 106;;
let _ARM_REG_S28 = 107;;
let _ARM_REG_S29 = 108;;
let _ARM_REG_S30 = 109;;
let _ARM_REG_S31 = 110;;
let _ARM_REG_ENDING = 111;;
let _ARM_REG_R13 = _ARM_REG_SP;;
let _ARM_REG_R14 = _ARM_REG_LR;;
let _ARM_REG_R15 = _ARM_REG_PC;;
let _ARM_REG_SB = _ARM_REG_R9;;
let _ARM_REG_SL = _ARM_REG_R10;;
let _ARM_REG_FP = _ARM_REG_R11;;
let _ARM_REG_IP = _ARM_REG_R12;;
let _ARM_INS_INVALID = 0;;
let _ARM_INS_ADC = 1;;
let _ARM_INS_ADD = 2;;
let _ARM_INS_ADDW = 3;;
let _ARM_INS_ADR = 4;;
let _ARM_INS_AESD = 5;;
let _ARM_INS_AESE = 6;;
let _ARM_INS_AESIMC = 7;;
let _ARM_INS_AESMC = 8;;
let _ARM_INS_AND = 9;;
let _ARM_INS_ASR = 10;;
let _ARM_INS_B = 11;;
let _ARM_INS_BFC = 12;;
let _ARM_INS_BFI = 13;;
let _ARM_INS_BIC = 14;;
let _ARM_INS_BKPT = 15;;
let _ARM_INS_BL = 16;;
let _ARM_INS_BLX = 17;;
let _ARM_INS_BLXNS = 18;;
let _ARM_INS_BX = 19;;
let _ARM_INS_BXJ = 20;;
let _ARM_INS_BXNS = 21;;
let _ARM_INS_CBNZ = 22;;
let _ARM_INS_CBZ = 23;;
let _ARM_INS_CDP = 24;;
let _ARM_INS_CDP2 = 25;;
let _ARM_INS_CLREX = 26;;
let _ARM_INS_CLZ = 27;;
let _ARM_INS_CMN = 28;;
let _ARM_INS_CMP = 29;;
let _ARM_INS_CPS = 30;;
let _ARM_INS_CRC32B = 31;;
let _ARM_INS_CRC32CB = 32;;
let _ARM_INS_CRC32CH = 33;;
let _ARM_INS_CRC32CW = 34;;
let _ARM_INS_CRC32H = 35;;
let _ARM_INS_CRC32W = 36;;
let _ARM_INS_CSDB = 37;;
let _ARM_INS_DBG = 38;;
let _ARM_INS_DCPS1 = 39;;
let _ARM_INS_DCPS2 = 40;;
let _ARM_INS_DCPS3 = 41;;
let _ARM_INS_DFB = 42;;
let _ARM_INS_DMB = 43;;
let _ARM_INS_DSB = 44;;
let _ARM_INS_EOR = 45;;
let _ARM_INS_ERET = 46;;
let _ARM_INS_ESB = 47;;
let _ARM_INS_FADDD = 48;;
let _ARM_INS_FADDS = 49;;
let _ARM_INS_FCMPZD = 50;;
let _ARM_INS_FCMPZS = 51;;
let _ARM_INS_FCONSTD = 52;;
let _ARM_INS_FCONSTS = 53;;
let _ARM_INS_FLDMDBX = 54;;
let _ARM_INS_FLDMIAX = 55;;
let _ARM_INS_FMDHR = 56;;
let _ARM_INS_FMDLR = 57;;
let _ARM_INS_FMSTAT = 58;;
let _ARM_INS_FSTMDBX = 59;;
let _ARM_INS_FSTMIAX = 60;;
let _ARM_INS_FSUBD = 61;;
let _ARM_INS_FSUBS = 62;;
let _ARM_INS_HINT = 63;;
let _ARM_INS_HLT = 64;;
let _ARM_INS_HVC = 65;;
let _ARM_INS_ISB = 66;;
let _ARM_INS_IT = 67;;
let _ARM_INS_LDA = 68;;
let _ARM_INS_LDAB = 69;;
let _ARM_INS_LDAEX = 70;;
let _ARM_INS_LDAEXB = 71;;
let _ARM_INS_LDAEXD = 72;;
let _ARM_INS_LDAEXH = 73;;
let _ARM_INS_LDAH = 74;;
let _ARM_INS_LDC = 75;;
let _ARM_INS_LDC2 = 76;;
let _ARM_INS_LDC2L = 77;;
let _ARM_INS_LDCL = 78;;
let _ARM_INS_LDM = 79;;
let _ARM_INS_LDMDA = 80;;
let _ARM_INS_LDMDB = 81;;
let _ARM_INS_LDMIB = 82;;
let _ARM_INS_LDR = 83;;
let _ARM_INS_LDRB = 84;;
let _ARM_INS_LDRBT = 85;;
let _ARM_INS_LDRD = 86;;
let _ARM_INS_LDREX = 87;;
let _ARM_INS_LDREXB = 88;;
let _ARM_INS_LDREXD = 89;;
let _ARM_INS_LDREXH = 90;;
let _ARM_INS_LDRH = 91;;
let _ARM_INS_LDRHT = 92;;
let _ARM_INS_LDRSB = 93;;
let _ARM_INS_LDRSBT = 94;;
let _ARM_INS_LDRSH = 95;;
let _ARM_INS_LDRSHT = 96;;
let _ARM_INS_LDRT = 97;;
let _ARM_INS_LSL = 98;;
let _ARM_INS_LSR = 99;;
let _ARM_INS_MCR = 100;;
let _ARM_INS_MCR2 = 101;;
let _ARM_INS_MCRR = 102;;
let _ARM_INS_MCRR2 = 103;;
let _ARM_INS_MLA = 104;;
let _ARM_INS_MLS = 105;;
let _ARM_INS_MOV = 106;;
let _ARM_INS_MOVS = 107;;
let _ARM_INS_MOVT = 108;;
let _ARM_INS_MOVW = 109;;
let _ARM_INS_MRC = 110;;
let _ARM_INS_MRC2 = 111;;
let _ARM_INS_MRRC = 112;;
let _ARM_INS_MRRC2 = 113;;
let _ARM_INS_MRS = 114;;
let _ARM_INS_MSR = 115;;
let _ARM_INS_MUL = 116;;
let _ARM_INS_MVN = 117;;
let _ARM_INS_NEG = 118;;
let _ARM_INS_NOP = 119;;
let _ARM_INS_ORN = 120;;
let _ARM_INS_ORR = 121;;
let _ARM_INS_PKHBT = 122;;
let _ARM_INS_PKHTB = 123;;
let _ARM_INS_PLD = 124;;
let _ARM_INS_PLDW = 125;;
let _ARM_INS_PLI = 126;;
let _ARM_INS_POP = 127;;
let _ARM_INS_PUSH = 128;;
let _ARM_INS_QADD = 129;;
let _ARM_INS_QADD16 = 130;;
let _ARM_INS_QADD8 = 131;;
let _ARM_INS_QASX = 132;;
let _ARM_INS_QDADD = 133;;
let _ARM_INS_QDSUB = 134;;
let _ARM_INS_QSAX = 135;;
let _ARM_INS_QSUB = 136;;
let _ARM_INS_QSUB16 = 137;;
let _ARM_INS_QSUB8 = 138;;
let _ARM_INS_RBIT = 139;;
let _ARM_INS_REV = 140;;
let _ARM_INS_REV16 = 141;;
let _ARM_INS_REVSH = 142;;
let _ARM_INS_RFEDA = 143;;
let _ARM_INS_RFEDB = 144;;
let _ARM_INS_RFEIA = 145;;
let _ARM_INS_RFEIB = 146;;
let _ARM_INS_ROR = 147;;
let _ARM_INS_RRX = 148;;
let _ARM_INS_RSB = 149;;
let _ARM_INS_RSC = 150;;
let _ARM_INS_SADD16 = 151;;
let _ARM_INS_SADD8 = 152;;
let _ARM_INS_SASX = 153;;
let _ARM_INS_SBC = 154;;
let _ARM_INS_SBFX = 155;;
let _ARM_INS_SDIV = 156;;
let _ARM_INS_SEL = 157;;
let _ARM_INS_SETEND = 158;;
let _ARM_INS_SETPAN = 159;;
let _ARM_INS_SEV = 160;;
let _ARM_INS_SEVL = 161;;
let _ARM_INS_SG = 162;;
let _ARM_INS_SHA1C = 163;;
let _ARM_INS_SHA1H = 164;;
let _ARM_INS_SHA1M = 165;;
let _ARM_INS_SHA1P = 166;;
let _ARM_INS_SHA1SU0 = 167;;
let _ARM_INS_SHA1SU1 = 168;;
let _ARM_INS_SHA256H = 169;;
let _ARM_INS_SHA256H2 = 170;;
let _ARM_INS_SHA256SU0 = 171;;
let _ARM_INS_SHA256SU1 = 172;;
let _ARM_INS_SHADD16 = 173;;
let _ARM_INS_SHADD8 = 174;;
let _ARM_INS_SHASX = 175;;
let _ARM_INS_SHSAX = 176;;
let _ARM_INS_SHSUB16 = 177;;
let _ARM_INS_SHSUB8 = 178;;
let _ARM_INS_SMC = 179;;
let _ARM_INS_SMLABB = 180;;
let _ARM_INS_SMLABT = 181;;
let _ARM_INS_SMLAD = 182;;
let _ARM_INS_SMLADX = 183;;
let _ARM_INS_SMLAL = 184;;
let _ARM_INS_SMLALBB = 185;;
let _ARM_INS_SMLALBT = 186;;
let _ARM_INS_SMLALD = 187;;
let _ARM_INS_SMLALDX = 188;;
let _ARM_INS_SMLALTB = 189;;
let _ARM_INS_SMLALTT = 190;;
let _ARM_INS_SMLATB = 191;;
let _ARM_INS_SMLATT = 192;;
let _ARM_INS_SMLAWB = 193;;
let _ARM_INS_SMLAWT = 194;;
let _ARM_INS_SMLSD = 195;;
let _ARM_INS_SMLSDX = 196;;
let _ARM_INS_SMLSLD = 197;;
let _ARM_INS_SMLSLDX = 198;;
let _ARM_INS_SMMLA = 199;;
let _ARM_INS_SMMLAR = 200;;
let _ARM_INS_SMMLS = 201;;
let _ARM_INS_SMMLSR = 202;;
let _ARM_INS_SMMUL = 203;;
let _ARM_INS_SMMULR = 204;;
let _ARM_INS_SMUAD = 205;;
let _ARM_INS_SMUADX = 206;;
let _ARM_INS_SMULBB = 207;;
let _ARM_INS_SMULBT = 208;;
let _ARM_INS_SMULL = 209;;
let _ARM_INS_SMULTB = 210;;
let _ARM_INS_SMULTT = 211;;
let _ARM_INS_SMULWB = 212;;
let _ARM_INS_SMULWT = 213;;
let _ARM_INS_SMUSD = 214;;
let _ARM_INS_SMUSDX = 215;;
let _ARM_INS_SRSDA = 216;;
let _ARM_INS_SRSDB = 217;;
let _ARM_INS_SRSIA = 218;;
let _ARM_INS_SRSIB = 219;;
let _ARM_INS_SSAT = 220;;
let _ARM_INS_SSAT16 = 221;;
let _ARM_INS_SSAX = 222;;
let _ARM_INS_SSUB16 = 223;;
let _ARM_INS_SSUB8 = 224;;
let _ARM_INS_STC = 225;;
let _ARM_INS_STC2 = 226;;
let _ARM_INS_STC2L = 227;;
let _ARM_INS_STCL = 228;;
let _ARM_INS_STL = 229;;
let _ARM_INS_STLB = 230;;
let _ARM_INS_STLEX = 231;;
let _ARM_INS_STLEXB = 232;;
let _ARM_INS_STLEXD = 233;;
let _ARM_INS_STLEXH = 234;;
let _ARM_INS_STLH = 235;;
let _ARM_INS_STM = 236;;
let _ARM_INS_STMDA = 237;;
let _ARM_INS_STMDB = 238;;
let _ARM_INS_STMIB = 239;;
let _ARM_INS_STR = 240;;
let _ARM_INS_STRB = 241;;
let _ARM_INS_STRBT = 242;;
let _ARM_INS_STRD = 243;;
let _ARM_INS_STREX = 244;;
let _ARM_INS_STREXB = 245;;
let _ARM_INS_STREXD = 246;;
let _ARM_INS_STREXH = 247;;
let _ARM_INS_STRH = 248;;
let _ARM_INS_STRHT = 249;;
let _ARM_INS_STRT = 250;;
let _ARM_INS_SUB = 251;;
let _ARM_INS_SUBS = 252;;
let _ARM_INS_SUBW = 253;;
let _ARM_INS_SVC = 254;;
let _ARM_INS_SWP = 255;;
let _ARM_INS_SWPB = 256;;
let _ARM_INS_SXTAB = 257;;
let _ARM_INS_SXTAB16 = 258;;
let _ARM_INS_SXTAH = 259;;
let _ARM_INS_SXTB = 260;;
let _ARM_INS_SXTB16 = 261;;
let _ARM_INS_SXTH = 262;;
let _ARM_INS_TBB = 263;;
let _ARM_INS_TBH = 264;;
let _ARM_INS_TEQ = 265;;
let _ARM_INS_TRAP = 266;;
let _ARM_INS_TSB = 267;;
let _ARM_INS_TST = 268;;
let _ARM_INS_TT = 269;;
let _ARM_INS_TTA = 270;;
let _ARM_INS_TTAT = 271;;
let _ARM_INS_TTT = 272;;
let _ARM_INS_UADD16 = 273;;
let _ARM_INS_UADD8 = 274;;
let _ARM_INS_UASX = 275;;
let _ARM_INS_UBFX = 276;;
let _ARM_INS_UDF = 277;;
let _ARM_INS_UDIV = 278;;
let _ARM_INS_UHADD16 = 279;;
let _ARM_INS_UHADD8 = 280;;
let _ARM_INS_UHASX = 281;;
let _ARM_INS_UHSAX = 282;;
let _ARM_INS_UHSUB16 = 283;;
let _ARM_INS_UHSUB8 = 284;;
let _ARM_INS_UMAAL = 285;;
let _ARM_INS_UMLAL = 286;;
let _ARM_INS_UMULL = 287;;
let _ARM_INS_UQADD16 = 288;;
let _ARM_INS_UQADD8 = 289;;
let _ARM_INS_UQASX = 290;;
let _ARM_INS_UQSAX = 291;;
let _ARM_INS_UQSUB16 = 292;;
let _ARM_INS_UQSUB8 = 293;;
let _ARM_INS_USAD8 = 294;;
let _ARM_INS_USADA8 = 295;;
let _ARM_INS_USAT = 296;;
let _ARM_INS_USAT16 = 297;;
let _ARM_INS_USAX = 298;;
let _ARM_INS_USUB16 = 299;;
let _ARM_INS_USUB8 = 300;;
let _ARM_INS_UXTAB = 301;;
let _ARM_INS_UXTAB16 = 302;;
let _ARM_INS_UXTAH = 303;;
let _ARM_INS_UXTB = 304;;
let _ARM_INS_UXTB16 = 305;;
let _ARM_INS_UXTH = 306;;
let _ARM_INS_VABA = 307;;
let _ARM_INS_VABAL = 308;;
let _ARM_INS_VABD = 309;;
let _ARM_INS_VABDL = 310;;
let _ARM_INS_VABS = 311;;
let _ARM_INS_VACGE = 312;;
let _ARM_INS_VACGT = 313;;
let _ARM_INS_VACLE = 314;;
let _ARM_INS_VACLT = 315;;
let _ARM_INS_VADD = 316;;
let _ARM_INS_VADDHN = 317;;
let _ARM_INS_VADDL = 318;;
let _ARM_INS_VADDW = 319;;
let _ARM_INS_VAND = 320;;
let _ARM_INS_VBIC = 321;;
let _ARM_INS_VBIF = 322;;
let _ARM_INS_VBIT = 323;;
let _ARM_INS_VBSL = 324;;
let _ARM_INS_VCADD = 325;;
let _ARM_INS_VCEQ = 326;;
let _ARM_INS_VCGE = 327;;
let _ARM_INS_VCGT = 328;;
let _ARM_INS_VCLE = 329;;
let _ARM_INS_VCLS = 330;;
let _ARM_INS_VCLT = 331;;
let _ARM_INS_VCLZ = 332;;
let _ARM_INS_VCMLA = 333;;
let _ARM_INS_VCMP = 334;;
let _ARM_INS_VCMPE = 335;;
let _ARM_INS_VCNT = 336;;
let _ARM_INS_VCVT = 337;;
let _ARM_INS_VCVTA = 338;;
let _ARM_INS_VCVTB = 339;;
let _ARM_INS_VCVTM = 340;;
let _ARM_INS_VCVTN = 341;;
let _ARM_INS_VCVTP = 342;;
let _ARM_INS_VCVTR = 343;;
let _ARM_INS_VCVTT = 344;;
let _ARM_INS_VDIV = 345;;
let _ARM_INS_VDUP = 346;;
let _ARM_INS_VEOR = 347;;
let _ARM_INS_VEXT = 348;;
let _ARM_INS_VFMA = 349;;
let _ARM_INS_VFMS = 350;;
let _ARM_INS_VFNMA = 351;;
let _ARM_INS_VFNMS = 352;;
let _ARM_INS_VHADD = 353;;
let _ARM_INS_VHSUB = 354;;
let _ARM_INS_VINS = 355;;
let _ARM_INS_VJCVT = 356;;
let _ARM_INS_VLD1 = 357;;
let _ARM_INS_VLD2 = 358;;
let _ARM_INS_VLD3 = 359;;
let _ARM_INS_VLD4 = 360;;
let _ARM_INS_VLDMDB = 361;;
let _ARM_INS_VLDMIA = 362;;
let _ARM_INS_VLDR = 363;;
let _ARM_INS_VLLDM = 364;;
let _ARM_INS_VLSTM = 365;;
let _ARM_INS_VMAX = 366;;
let _ARM_INS_VMAXNM = 367;;
let _ARM_INS_VMIN = 368;;
let _ARM_INS_VMINNM = 369;;
let _ARM_INS_VMLA = 370;;
let _ARM_INS_VMLAL = 371;;
let _ARM_INS_VMLS = 372;;
let _ARM_INS_VMLSL = 373;;
let _ARM_INS_VMOV = 374;;
let _ARM_INS_VMOVL = 375;;
let _ARM_INS_VMOVN = 376;;
let _ARM_INS_VMOVX = 377;;
let _ARM_INS_VMRS = 378;;
let _ARM_INS_VMSR = 379;;
let _ARM_INS_VMUL = 380;;
let _ARM_INS_VMULL = 381;;
let _ARM_INS_VMVN = 382;;
let _ARM_INS_VNEG = 383;;
let _ARM_INS_VNMLA = 384;;
let _ARM_INS_VNMLS = 385;;
let _ARM_INS_VNMUL = 386;;
let _ARM_INS_VORN = 387;;
let _ARM_INS_VORR = 388;;
let _ARM_INS_VPADAL = 389;;
let _ARM_INS_VPADD = 390;;
let _ARM_INS_VPADDL = 391;;
let _ARM_INS_VPMAX = 392;;
let _ARM_INS_VPMIN = 393;;
let _ARM_INS_VPOP = 394;;
let _ARM_INS_VPUSH = 395;;
let _ARM_INS_VQABS = 396;;
let _ARM_INS_VQADD = 397;;
let _ARM_INS_VQDMLAL = 398;;
let _ARM_INS_VQDMLSL = 399;;
let _ARM_INS_VQDMULH = 400;;
let _ARM_INS_VQDMULL = 401;;
let _ARM_INS_VQMOVN = 402;;
let _ARM_INS_VQMOVUN = 403;;
let _ARM_INS_VQNEG = 404;;
let _ARM_INS_VQRDMLAH = 405;;
let _ARM_INS_VQRDMLSH = 406;;
let _ARM_INS_VQRDMULH = 407;;
let _ARM_INS_VQRSHL = 408;;
let _ARM_INS_VQRSHRN = 409;;
let _ARM_INS_VQRSHRUN = 410;;
let _ARM_INS_VQSHL = 411;;
let _ARM_INS_VQSHLU = 412;;
let _ARM_INS_VQSHRN = 413;;
let _ARM_INS_VQSHRUN = 414;;
let _ARM_INS_VQSUB = 415;;
let _ARM_INS_VRADDHN = 416;;
let _ARM_INS_VRECPE = 417;;
let _ARM_INS_VRECPS = 418;;
let _ARM_INS_VREV16 = 419;;
let _ARM_INS_VREV32 = 420;;
let _ARM_INS_VREV64 = 421;;
let _ARM_INS_VRHADD = 422;;
let _ARM_INS_VRINTA = 423;;
let _ARM_INS_VRINTM = 424;;
let _ARM_INS_VRINTN = 425;;
let _ARM_INS_VRINTP = 426;;
let _ARM_INS_VRINTR = 427;;
let _ARM_INS_VRINTX = 428;;
let _ARM_INS_VRINTZ = 429;;
let _ARM_INS_VRSHL = 430;;
let _ARM_INS_VRSHR = 431;;
let _ARM_INS_VRSHRN = 432;;
let _ARM_INS_VRSQRTE = 433;;
let _ARM_INS_VRSQRTS = 434;;
let _ARM_INS_VRSRA = 435;;
let _ARM_INS_VRSUBHN = 436;;
let _ARM_INS_VSDOT = 437;;
let _ARM_INS_VSELEQ = 438;;
let _ARM_INS_VSELGE = 439;;
let _ARM_INS_VSELGT = 440;;
let _ARM_INS_VSELVS = 441;;
let _ARM_INS_VSHL = 442;;
let _ARM_INS_VSHLL = 443;;
let _ARM_INS_VSHR = 444;;
let _ARM_INS_VSHRN = 445;;
let _ARM_INS_VSLI = 446;;
let _ARM_INS_VSQRT = 447;;
let _ARM_INS_VSRA = 448;;
let _ARM_INS_VSRI = 449;;
let _ARM_INS_VST1 = 450;;
let _ARM_INS_VST2 = 451;;
let _ARM_INS_VST3 = 452;;
let _ARM_INS_VST4 = 453;;
let _ARM_INS_VSTMDB = 454;;
let _ARM_INS_VSTMIA = 455;;
let _ARM_INS_VSTR = 456;;
let _ARM_INS_VSUB = 457;;
let _ARM_INS_VSUBHN = 458;;
let _ARM_INS_VSUBL = 459;;
let _ARM_INS_VSUBW = 460;;
let _ARM_INS_VSWP = 461;;
let _ARM_INS_VTBL = 462;;
let _ARM_INS_VTBX = 463;;
let _ARM_INS_VTRN = 464;;
let _ARM_INS_VTST = 465;;
let _ARM_INS_VUDOT = 466;;
let _ARM_INS_VUZP = 467;;
let _ARM_INS_VZIP = 468;;
let _ARM_INS_WFE = 469;;
let _ARM_INS_WFI = 470;;
let _ARM_INS_YIELD = 471;;
let _ARM_INS_ENDING = 472;;
let _ARM_GRP_INVALID = 0;;
let _ARM_GRP_JUMP = 1;;
let _ARM_GRP_CALL = 2;;
let _ARM_GRP_INT = 4;;
let _ARM_GRP_PRIVILEGE = 6;;
let _ARM_GRP_BRANCH_RELATIVE = 7;;
let _ARM_GRP_CRYPTO = 128;;
let _ARM_GRP_DATABARRIER = 129;;
let _ARM_GRP_DIVIDE = 130;;
let _ARM_GRP_FPARMV8 = 131;;
let _ARM_GRP_MULTPRO = 132;;
let _ARM_GRP_NEON = 133;;
let _ARM_GRP_T2EXTRACTPACK = 134;;
let _ARM_GRP_THUMB2DSP = 135;;
let _ARM_GRP_TRUSTZONE = 136;;
let _ARM_GRP_V4T = 137;;
let _ARM_GRP_V5T = 138;;
let _ARM_GRP_V5TE = 139;;
let _ARM_GRP_V6 = 140;;
let _ARM_GRP_V6T2 = 141;;
let _ARM_GRP_V7 = 142;;
let _ARM_GRP_V8 = 143;;
let _ARM_GRP_VFP2 = 144;;
let _ARM_GRP_VFP3 = 145;;
let _ARM_GRP_VFP4 = 146;;
let _ARM_GRP_ARM = 147;;
let _ARM_GRP_MCLASS = 148;;
let _ARM_GRP_NOTMCLASS = 149;;
let _ARM_GRP_THUMB = 150;;
let _ARM_GRP_THUMB1ONLY = 151;;
let _ARM_GRP_THUMB2 = 152;;
let _ARM_GRP_PREV8 = 153;;
let _ARM_GRP_FPVMLX = 154;;
let _ARM_GRP_MULOPS = 155;;
let _ARM_GRP_CRC = 156;;
let _ARM_GRP_DPVFP = 157;;
let _ARM_GRP_V6M = 158;;
let _ARM_GRP_VIRTUALIZATION = 159;;
let _ARM_GRP_ENDING = 160;;

217
thirdparty/capstone/bindings/ocaml/capstone.ml vendored Normal file
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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Arm
open Arm64
open Mips
open Ppc
open X86
open Sparc
open Systemz
open Xcore
open M680x
open Printf (* debug *)
(* Hardware architectures *)
type arch =
| CS_ARCH_ARM
| CS_ARCH_ARM64
| CS_ARCH_MIPS
| CS_ARCH_X86
| CS_ARCH_PPC
| CS_ARCH_SPARC
| CS_ARCH_SYSZ
| CS_ARCH_XCORE
| CS_ARCH_M68K
| CS_ARCH_TMS320C64X
| CS_ARCH_M680X
(* Hardware modes *)
type mode =
| CS_MODE_LITTLE_ENDIAN (* little-endian mode (default mode) *)
| CS_MODE_ARM (* ARM mode *)
| CS_MODE_16 (* 16-bit mode (for X86) *)
| CS_MODE_32 (* 32-bit mode (for X86) *)
| CS_MODE_64 (* 64-bit mode (for X86, PPC) *)
| CS_MODE_THUMB (* ARM's Thumb mode, including Thumb-2 *)
| CS_MODE_MCLASS (* ARM's MClass mode *)
| CS_MODE_V8 (* ARMv8 A32 encodings for ARM *)
| CS_MODE_MICRO (* MicroMips mode (MIPS architecture) *)
| CS_MODE_MIPS3 (* Mips3 mode (MIPS architecture) *)
| CS_MODE_MIPS32R6 (* Mips32-R6 mode (MIPS architecture) *)
| CS_MODE_MIPS2 (* Mips2 mode (MIPS architecture) *)
| CS_MODE_V9 (* SparcV9 mode (Sparc architecture) *)
| CS_MODE_BIG_ENDIAN (* big-endian mode *)
| CS_MODE_MIPS32 (* Mips32 mode (for Mips) *)
| CS_MODE_MIPS64 (* Mips64 mode (for Mips) *)
| CS_MODE_QPX (* Quad Processing eXtensions mode (PowerPC) *)
| CS_MODE_SPE (* Signal Processing Engine mode (PowerPC) *)
| CS_MODE_BOOKE (* Book-E mode (PowerPC) *)
| CS_MODE_PS (* Paired-singles mode (PowerPC) *)
| CS_MODE_M680X_6301 (* M680X Hitachi 6301,6303 mode *)
| CS_MODE_M680X_6309 (* M680X Hitachi 6309 mode *)
| CS_MODE_M680X_6800 (* M680X Motorola 6800,6802 mode *)
| CS_MODE_M680X_6801 (* M680X Motorola 6801,6803 mode *)
| CS_MODE_M680X_6805 (* M680X Motorola 6805 mode *)
| CS_MODE_M680X_6808 (* M680X Motorola 6808 mode *)
| CS_MODE_M680X_6809 (* M680X Motorola 6809 mode *)
| CS_MODE_M680X_6811 (* M680X Motorola/Freescale 68HC11 mode *)
| CS_MODE_M680X_CPU12 (* M680X Motorola/Freescale/NXP CPU12 mode *)
| CS_MODE_M680X_HCS08 (* M680X Freescale HCS08 mode *)
(* Runtime option for the disassembled engine *)
type opt_type =
| CS_OPT_SYNTAX (* Assembly output syntax *)
| CS_OPT_DETAIL (* Break down instruction structure into details *)
| CS_OPT_MODE (* Change engine's mode at run-time *)
| CS_OPT_MEM (* User-defined dynamic memory related functions *)
| CS_OPT_SKIPDATA (* Skip data when disassembling. Then engine is in SKIPDATA mode. *)
| CS_OPT_SKIPDATA_SETUP (* Setup user-defined function for SKIPDATA option *)
(* Common instruction operand access types - to be consistent across all architectures. *)
(* It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE *)
let _CS_AC_INVALID = 0;; (* Uninitialized/invalid access type. *)
let _CS_AC_READ = 1 lsl 0;; (* Operand read from memory or register. *)
let _CS_AC_WRITE = 1 lsl 1;; (* Operand write to memory or register. *)
(* Runtime option value (associated with option type above) *)
let _CS_OPT_OFF = 0L;; (* Turn OFF an option - default option of CS_OPT_DETAIL, CS_OPT_SKIPDATA. *)
let _CS_OPT_ON = 3L;; (* Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA). *)
let _CS_OPT_SYNTAX_DEFAULT = 0L;; (* Default asm syntax (CS_OPT_SYNTAX). *)
let _CS_OPT_SYNTAX_INTEL = 1L;; (* X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX). *)
let _CS_OPT_SYNTAX_ATT = 2L;; (* X86 ATT asm syntax (CS_OPT_SYNTAX). *)
let _CS_OPT_SYNTAX_NOREGNAME = 3L;; (* Prints register name with only number (CS_OPT_SYNTAX) *)
(* Common instruction operand types - to be consistent across all architectures. *)
let _CS_OP_INVALID = 0;; (* uninitialized/invalid operand. *)
let _CS_OP_REG = 1;; (* Register operand. *)
let _CS_OP_IMM = 2;; (* Immediate operand. *)
let _CS_OP_MEM = 3;; (* Memory operand. *)
let _CS_OP_FP = 4;; (* Floating-Point operand. *)
(* Common instruction groups - to be consistent across all architectures. *)
let _CS_GRP_INVALID = 0;; (* uninitialized/invalid group. *)
let _CS_GRP_JUMP = 1;; (* all jump instructions (conditional+direct+indirect jumps) *)
let _CS_GRP_CALL = 2;; (* all call instructions *)
let _CS_GRP_RET = 3;; (* all return instructions *)
let _CS_GRP_INT = 4;; (* all interrupt instructions (int+syscall) *)
let _CS_GRP_IRET = 5;; (* all interrupt return instructions *)
let _CS_GRP_PRIVILEGE = 6;; (* all privileged instructions *)
type cs_arch =
| CS_INFO_ARM of cs_arm
| CS_INFO_ARM64 of cs_arm64
| CS_INFO_MIPS of cs_mips
| CS_INFO_X86 of cs_x86
| CS_INFO_PPC of cs_ppc
| CS_INFO_SPARC of cs_sparc
| CS_INFO_SYSZ of cs_sysz
| CS_INFO_XCORE of cs_xcore
| CS_INFO_M680X of cs_m680x
type csh = {
h: Int64.t;
a: arch;
}
type cs_insn0 = {
id: int;
address: int;
size: int;
bytes: int array;
mnemonic: string;
op_str: string;
regs_read: int array;
regs_write: int array;
groups: int array;
arch: cs_arch;
}
external _cs_open: arch -> mode list -> Int64.t option = "ocaml_open"
external cs_disasm_quick: arch -> mode list -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm"
external _cs_disasm_internal: arch -> Int64.t -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm_internal"
external _cs_reg_name: Int64.t -> int -> string = "ocaml_register_name"
external _cs_insn_name: Int64.t -> int -> string = "ocaml_instruction_name"
external _cs_group_name: Int64.t -> int -> string = "ocaml_group_name"
external cs_version: unit -> int = "ocaml_version"
external _cs_option: Int64.t -> opt_type -> Int64.t -> int = "ocaml_option"
external _cs_close: Int64.t -> int = "ocaml_close"
let cs_open _arch _mode: csh = (
let _handle = _cs_open _arch _mode in (
match _handle with
| None -> { h = 0L; a = _arch }
| Some v -> { h = v; a = _arch }
);
);;
let cs_close handle = (
_cs_close handle.h;
)
let cs_option handle opt value = (
_cs_option handle.h opt value;
);;
let cs_disasm handle code address count = (
_cs_disasm_internal handle.a handle.h code address count;
);;
let cs_reg_name handle id = (
_cs_reg_name handle.h id;
);;
let cs_insn_name handle id = (
_cs_insn_name handle.h id;
);;
let cs_group_name handle id = (
_cs_group_name handle.h id;
);;
class cs_insn c a =
let csh = c in
let (id, address, size, bytes, mnemonic, op_str, regs_read,
regs_write, groups, arch) =
(a.id, a.address, a.size, a.bytes, a.mnemonic, a.op_str,
a.regs_read, a.regs_write, a.groups, a.arch) in
object
method id = id;
method address = address;
method size = size;
method bytes = bytes;
method mnemonic = mnemonic;
method op_str = op_str;
method regs_read = regs_read;
method regs_write = regs_write;
method groups = groups;
method arch = arch;
method reg_name id = _cs_reg_name csh.h id;
method insn_name id = _cs_insn_name csh.h id;
method group_name id = _cs_group_name csh.h id;
end;;
let cs_insn_group handle insn group_id =
List.exists (fun g -> g == group_id) (Array.to_list insn.groups);;
let cs_reg_read handle insn reg_id =
List.exists (fun g -> g == reg_id) (Array.to_list insn.regs_read);;
let cs_reg_write handle insn reg_id =
List.exists (fun g -> g == reg_id) (Array.to_list insn.regs_write);;
class cs a m =
let mode = m and arch = a in
let handle = cs_open arch mode in
object
method disasm code offset count =
let insns = (_cs_disasm_internal arch handle.h code offset count) in
List.map (fun x -> new cs_insn handle x) insns;
end;;

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(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [evm_const.ml] *)
let _EVM_INS_STOP = 0;;
let _EVM_INS_ADD = 1;;
let _EVM_INS_MUL = 2;;
let _EVM_INS_SUB = 3;;
let _EVM_INS_DIV = 4;;
let _EVM_INS_SDIV = 5;;
let _EVM_INS_MOD = 6;;
let _EVM_INS_SMOD = 7;;
let _EVM_INS_ADDMOD = 8;;
let _EVM_INS_MULMOD = 9;;
let _EVM_INS_EXP = 10;;
let _EVM_INS_SIGNEXTEND = 11;;
let _EVM_INS_LT = 16;;
let _EVM_INS_GT = 17;;
let _EVM_INS_SLT = 18;;
let _EVM_INS_SGT = 19;;
let _EVM_INS_EQ = 20;;
let _EVM_INS_ISZERO = 21;;
let _EVM_INS_AND = 22;;
let _EVM_INS_OR = 23;;
let _EVM_INS_XOR = 24;;
let _EVM_INS_NOT = 25;;
let _EVM_INS_BYTE = 26;;
let _EVM_INS_SHA3 = 32;;
let _EVM_INS_ADDRESS = 48;;
let _EVM_INS_BALANCE = 49;;
let _EVM_INS_ORIGIN = 50;;
let _EVM_INS_CALLER = 51;;
let _EVM_INS_CALLVALUE = 52;;
let _EVM_INS_CALLDATALOAD = 53;;
let _EVM_INS_CALLDATASIZE = 54;;
let _EVM_INS_CALLDATACOPY = 55;;
let _EVM_INS_CODESIZE = 56;;
let _EVM_INS_CODECOPY = 57;;
let _EVM_INS_GASPRICE = 58;;
let _EVM_INS_EXTCODESIZE = 59;;
let _EVM_INS_EXTCODECOPY = 60;;
let _EVM_INS_RETURNDATASIZE = 61;;
let _EVM_INS_RETURNDATACOPY = 62;;
let _EVM_INS_BLOCKHASH = 64;;
let _EVM_INS_COINBASE = 65;;
let _EVM_INS_TIMESTAMP = 66;;
let _EVM_INS_NUMBER = 67;;
let _EVM_INS_DIFFICULTY = 68;;
let _EVM_INS_GASLIMIT = 69;;
let _EVM_INS_POP = 80;;
let _EVM_INS_MLOAD = 81;;
let _EVM_INS_MSTORE = 82;;
let _EVM_INS_MSTORE8 = 83;;
let _EVM_INS_SLOAD = 84;;
let _EVM_INS_SSTORE = 85;;
let _EVM_INS_JUMP = 86;;
let _EVM_INS_JUMPI = 87;;
let _EVM_INS_PC = 88;;
let _EVM_INS_MSIZE = 89;;
let _EVM_INS_GAS = 90;;
let _EVM_INS_JUMPDEST = 91;;
let _EVM_INS_PUSH1 = 96;;
let _EVM_INS_PUSH2 = 97;;
let _EVM_INS_PUSH3 = 98;;
let _EVM_INS_PUSH4 = 99;;
let _EVM_INS_PUSH5 = 100;;
let _EVM_INS_PUSH6 = 101;;
let _EVM_INS_PUSH7 = 102;;
let _EVM_INS_PUSH8 = 103;;
let _EVM_INS_PUSH9 = 104;;
let _EVM_INS_PUSH10 = 105;;
let _EVM_INS_PUSH11 = 106;;
let _EVM_INS_PUSH12 = 107;;
let _EVM_INS_PUSH13 = 108;;
let _EVM_INS_PUSH14 = 109;;
let _EVM_INS_PUSH15 = 110;;
let _EVM_INS_PUSH16 = 111;;
let _EVM_INS_PUSH17 = 112;;
let _EVM_INS_PUSH18 = 113;;
let _EVM_INS_PUSH19 = 114;;
let _EVM_INS_PUSH20 = 115;;
let _EVM_INS_PUSH21 = 116;;
let _EVM_INS_PUSH22 = 117;;
let _EVM_INS_PUSH23 = 118;;
let _EVM_INS_PUSH24 = 119;;
let _EVM_INS_PUSH25 = 120;;
let _EVM_INS_PUSH26 = 121;;
let _EVM_INS_PUSH27 = 122;;
let _EVM_INS_PUSH28 = 123;;
let _EVM_INS_PUSH29 = 124;;
let _EVM_INS_PUSH30 = 125;;
let _EVM_INS_PUSH31 = 126;;
let _EVM_INS_PUSH32 = 127;;
let _EVM_INS_DUP1 = 128;;
let _EVM_INS_DUP2 = 129;;
let _EVM_INS_DUP3 = 130;;
let _EVM_INS_DUP4 = 131;;
let _EVM_INS_DUP5 = 132;;
let _EVM_INS_DUP6 = 133;;
let _EVM_INS_DUP7 = 134;;
let _EVM_INS_DUP8 = 135;;
let _EVM_INS_DUP9 = 136;;
let _EVM_INS_DUP10 = 137;;
let _EVM_INS_DUP11 = 138;;
let _EVM_INS_DUP12 = 139;;
let _EVM_INS_DUP13 = 140;;
let _EVM_INS_DUP14 = 141;;
let _EVM_INS_DUP15 = 142;;
let _EVM_INS_DUP16 = 143;;
let _EVM_INS_SWAP1 = 144;;
let _EVM_INS_SWAP2 = 145;;
let _EVM_INS_SWAP3 = 146;;
let _EVM_INS_SWAP4 = 147;;
let _EVM_INS_SWAP5 = 148;;
let _EVM_INS_SWAP6 = 149;;
let _EVM_INS_SWAP7 = 150;;
let _EVM_INS_SWAP8 = 151;;
let _EVM_INS_SWAP9 = 152;;
let _EVM_INS_SWAP10 = 153;;
let _EVM_INS_SWAP11 = 154;;
let _EVM_INS_SWAP12 = 155;;
let _EVM_INS_SWAP13 = 156;;
let _EVM_INS_SWAP14 = 157;;
let _EVM_INS_SWAP15 = 158;;
let _EVM_INS_SWAP16 = 159;;
let _EVM_INS_LOG0 = 160;;
let _EVM_INS_LOG1 = 161;;
let _EVM_INS_LOG2 = 162;;
let _EVM_INS_LOG3 = 163;;
let _EVM_INS_LOG4 = 164;;
let _EVM_INS_CREATE = 240;;
let _EVM_INS_CALL = 241;;
let _EVM_INS_CALLCODE = 242;;
let _EVM_INS_RETURN = 243;;
let _EVM_INS_DELEGATECALL = 244;;
let _EVM_INS_CALLBLACKBOX = 245;;
let _EVM_INS_STATICCALL = 250;;
let _EVM_INS_REVERT = 253;;
let _EVM_INS_SUICIDE = 255;;
let _EVM_INS_INVALID = 512;;
let _EVM_INS_ENDING = 513;;
let _EVM_GRP_INVALID = 0;;
let _EVM_GRP_JUMP = 1;;
let _EVM_GRP_MATH = 8;;
let _EVM_GRP_STACK_WRITE = 9;;
let _EVM_GRP_STACK_READ = 10;;
let _EVM_GRP_MEM_WRITE = 11;;
let _EVM_GRP_MEM_READ = 12;;
let _EVM_GRP_STORE_WRITE = 13;;
let _EVM_GRP_STORE_READ = 14;;
let _EVM_GRP_HALT = 15;;
let _EVM_GRP_ENDING = 16;;

48
thirdparty/capstone/bindings/ocaml/m680x.ml vendored Normal file
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(* Capstone Disassembly Engine
* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 *)
open M680x_const
(* architecture specific info of instruction *)
type m680x_op_idx = {
base_reg: int;
offset_reg: int;
offset: int;
offset_addr: int;
offset_bits: int;
inc_dec: int;
flags: int;
}
type m680x_op_rel = {
addr_rel: int;
offset: int;
}
type m680x_op_ext = {
addr_ext: int;
indirect: bool;
}
type m680x_op_value =
| M680X_OP_INVALID of int
| M680X_OP_IMMEDIATE of int
| M680X_OP_REGISTER of int
| M680X_OP_INDEXED of m680x_op_idx
| M680X_OP_RELATIVE of m680x_op_rel
| M680X_OP_EXTENDED of m680x_op_ext
| M680X_OP_DIRECT of int
| M680X_OP_CONSTANT of int
type m680x_op = {
value: m680x_op_value;
size: int;
access: int;
}
type cs_m680x = {
flags: int;
operands: m680x_op array;
}

415
thirdparty/capstone/bindings/ocaml/m680x_const.ml vendored Normal file
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(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m680x_const.ml] *)
let _M680X_OPERAND_COUNT = 9;;
let _M680X_REG_INVALID = 0;;
let _M680X_REG_A = 1;;
let _M680X_REG_B = 2;;
let _M680X_REG_E = 3;;
let _M680X_REG_F = 4;;
let _M680X_REG_0 = 5;;
let _M680X_REG_D = 6;;
let _M680X_REG_W = 7;;
let _M680X_REG_CC = 8;;
let _M680X_REG_DP = 9;;
let _M680X_REG_MD = 10;;
let _M680X_REG_HX = 11;;
let _M680X_REG_H = 12;;
let _M680X_REG_X = 13;;
let _M680X_REG_Y = 14;;
let _M680X_REG_S = 15;;
let _M680X_REG_U = 16;;
let _M680X_REG_V = 17;;
let _M680X_REG_Q = 18;;
let _M680X_REG_PC = 19;;
let _M680X_REG_TMP2 = 20;;
let _M680X_REG_TMP3 = 21;;
let _M680X_REG_ENDING = 22;;
let _M680X_OP_INVALID = 0;;
let _M680X_OP_REGISTER = 1;;
let _M680X_OP_IMMEDIATE = 2;;
let _M680X_OP_INDEXED = 3;;
let _M680X_OP_EXTENDED = 4;;
let _M680X_OP_DIRECT = 5;;
let _M680X_OP_RELATIVE = 6;;
let _M680X_OP_CONSTANT = 7;;
let _M680X_OFFSET_NONE = 0;;
let _M680X_OFFSET_BITS_5 = 5;;
let _M680X_OFFSET_BITS_8 = 8;;
let _M680X_OFFSET_BITS_9 = 9;;
let _M680X_OFFSET_BITS_16 = 16;;
let _M680X_IDX_INDIRECT = 1;;
let _M680X_IDX_NO_COMMA = 2;;
let _M680X_IDX_POST_INC_DEC = 4;;
let _M680X_GRP_INVALID = 0;;
let _M680X_GRP_JUMP = 1;;
let _M680X_GRP_CALL = 2;;
let _M680X_GRP_RET = 3;;
let _M680X_GRP_INT = 4;;
let _M680X_GRP_IRET = 5;;
let _M680X_GRP_PRIV = 6;;
let _M680X_GRP_BRAREL = 7;;
let _M680X_GRP_ENDING = 8;;
let _M680X_FIRST_OP_IN_MNEM = 1;;
let _M680X_SECOND_OP_IN_MNEM = 2;;
let _M680X_INS_INVLD = 0;;
let _M680X_INS_ABA = 1;;
let _M680X_INS_ABX = 2;;
let _M680X_INS_ABY = 3;;
let _M680X_INS_ADC = 4;;
let _M680X_INS_ADCA = 5;;
let _M680X_INS_ADCB = 6;;
let _M680X_INS_ADCD = 7;;
let _M680X_INS_ADCR = 8;;
let _M680X_INS_ADD = 9;;
let _M680X_INS_ADDA = 10;;
let _M680X_INS_ADDB = 11;;
let _M680X_INS_ADDD = 12;;
let _M680X_INS_ADDE = 13;;
let _M680X_INS_ADDF = 14;;
let _M680X_INS_ADDR = 15;;
let _M680X_INS_ADDW = 16;;
let _M680X_INS_AIM = 17;;
let _M680X_INS_AIS = 18;;
let _M680X_INS_AIX = 19;;
let _M680X_INS_AND = 20;;
let _M680X_INS_ANDA = 21;;
let _M680X_INS_ANDB = 22;;
let _M680X_INS_ANDCC = 23;;
let _M680X_INS_ANDD = 24;;
let _M680X_INS_ANDR = 25;;
let _M680X_INS_ASL = 26;;
let _M680X_INS_ASLA = 27;;
let _M680X_INS_ASLB = 28;;
let _M680X_INS_ASLD = 29;;
let _M680X_INS_ASR = 30;;
let _M680X_INS_ASRA = 31;;
let _M680X_INS_ASRB = 32;;
let _M680X_INS_ASRD = 33;;
let _M680X_INS_ASRX = 34;;
let _M680X_INS_BAND = 35;;
let _M680X_INS_BCC = 36;;
let _M680X_INS_BCLR = 37;;
let _M680X_INS_BCS = 38;;
let _M680X_INS_BEOR = 39;;
let _M680X_INS_BEQ = 40;;
let _M680X_INS_BGE = 41;;
let _M680X_INS_BGND = 42;;
let _M680X_INS_BGT = 43;;
let _M680X_INS_BHCC = 44;;
let _M680X_INS_BHCS = 45;;
let _M680X_INS_BHI = 46;;
let _M680X_INS_BIAND = 47;;
let _M680X_INS_BIEOR = 48;;
let _M680X_INS_BIH = 49;;
let _M680X_INS_BIL = 50;;
let _M680X_INS_BIOR = 51;;
let _M680X_INS_BIT = 52;;
let _M680X_INS_BITA = 53;;
let _M680X_INS_BITB = 54;;
let _M680X_INS_BITD = 55;;
let _M680X_INS_BITMD = 56;;
let _M680X_INS_BLE = 57;;
let _M680X_INS_BLS = 58;;
let _M680X_INS_BLT = 59;;
let _M680X_INS_BMC = 60;;
let _M680X_INS_BMI = 61;;
let _M680X_INS_BMS = 62;;
let _M680X_INS_BNE = 63;;
let _M680X_INS_BOR = 64;;
let _M680X_INS_BPL = 65;;
let _M680X_INS_BRCLR = 66;;
let _M680X_INS_BRSET = 67;;
let _M680X_INS_BRA = 68;;
let _M680X_INS_BRN = 69;;
let _M680X_INS_BSET = 70;;
let _M680X_INS_BSR = 71;;
let _M680X_INS_BVC = 72;;
let _M680X_INS_BVS = 73;;
let _M680X_INS_CALL = 74;;
let _M680X_INS_CBA = 75;;
let _M680X_INS_CBEQ = 76;;
let _M680X_INS_CBEQA = 77;;
let _M680X_INS_CBEQX = 78;;
let _M680X_INS_CLC = 79;;
let _M680X_INS_CLI = 80;;
let _M680X_INS_CLR = 81;;
let _M680X_INS_CLRA = 82;;
let _M680X_INS_CLRB = 83;;
let _M680X_INS_CLRD = 84;;
let _M680X_INS_CLRE = 85;;
let _M680X_INS_CLRF = 86;;
let _M680X_INS_CLRH = 87;;
let _M680X_INS_CLRW = 88;;
let _M680X_INS_CLRX = 89;;
let _M680X_INS_CLV = 90;;
let _M680X_INS_CMP = 91;;
let _M680X_INS_CMPA = 92;;
let _M680X_INS_CMPB = 93;;
let _M680X_INS_CMPD = 94;;
let _M680X_INS_CMPE = 95;;
let _M680X_INS_CMPF = 96;;
let _M680X_INS_CMPR = 97;;
let _M680X_INS_CMPS = 98;;
let _M680X_INS_CMPU = 99;;
let _M680X_INS_CMPW = 100;;
let _M680X_INS_CMPX = 101;;
let _M680X_INS_CMPY = 102;;
let _M680X_INS_COM = 103;;
let _M680X_INS_COMA = 104;;
let _M680X_INS_COMB = 105;;
let _M680X_INS_COMD = 106;;
let _M680X_INS_COME = 107;;
let _M680X_INS_COMF = 108;;
let _M680X_INS_COMW = 109;;
let _M680X_INS_COMX = 110;;
let _M680X_INS_CPD = 111;;
let _M680X_INS_CPHX = 112;;
let _M680X_INS_CPS = 113;;
let _M680X_INS_CPX = 114;;
let _M680X_INS_CPY = 115;;
let _M680X_INS_CWAI = 116;;
let _M680X_INS_DAA = 117;;
let _M680X_INS_DBEQ = 118;;
let _M680X_INS_DBNE = 119;;
let _M680X_INS_DBNZ = 120;;
let _M680X_INS_DBNZA = 121;;
let _M680X_INS_DBNZX = 122;;
let _M680X_INS_DEC = 123;;
let _M680X_INS_DECA = 124;;
let _M680X_INS_DECB = 125;;
let _M680X_INS_DECD = 126;;
let _M680X_INS_DECE = 127;;
let _M680X_INS_DECF = 128;;
let _M680X_INS_DECW = 129;;
let _M680X_INS_DECX = 130;;
let _M680X_INS_DES = 131;;
let _M680X_INS_DEX = 132;;
let _M680X_INS_DEY = 133;;
let _M680X_INS_DIV = 134;;
let _M680X_INS_DIVD = 135;;
let _M680X_INS_DIVQ = 136;;
let _M680X_INS_EDIV = 137;;
let _M680X_INS_EDIVS = 138;;
let _M680X_INS_EIM = 139;;
let _M680X_INS_EMACS = 140;;
let _M680X_INS_EMAXD = 141;;
let _M680X_INS_EMAXM = 142;;
let _M680X_INS_EMIND = 143;;
let _M680X_INS_EMINM = 144;;
let _M680X_INS_EMUL = 145;;
let _M680X_INS_EMULS = 146;;
let _M680X_INS_EOR = 147;;
let _M680X_INS_EORA = 148;;
let _M680X_INS_EORB = 149;;
let _M680X_INS_EORD = 150;;
let _M680X_INS_EORR = 151;;
let _M680X_INS_ETBL = 152;;
let _M680X_INS_EXG = 153;;
let _M680X_INS_FDIV = 154;;
let _M680X_INS_IBEQ = 155;;
let _M680X_INS_IBNE = 156;;
let _M680X_INS_IDIV = 157;;
let _M680X_INS_IDIVS = 158;;
let _M680X_INS_ILLGL = 159;;
let _M680X_INS_INC = 160;;
let _M680X_INS_INCA = 161;;
let _M680X_INS_INCB = 162;;
let _M680X_INS_INCD = 163;;
let _M680X_INS_INCE = 164;;
let _M680X_INS_INCF = 165;;
let _M680X_INS_INCW = 166;;
let _M680X_INS_INCX = 167;;
let _M680X_INS_INS = 168;;
let _M680X_INS_INX = 169;;
let _M680X_INS_INY = 170;;
let _M680X_INS_JMP = 171;;
let _M680X_INS_JSR = 172;;
let _M680X_INS_LBCC = 173;;
let _M680X_INS_LBCS = 174;;
let _M680X_INS_LBEQ = 175;;
let _M680X_INS_LBGE = 176;;
let _M680X_INS_LBGT = 177;;
let _M680X_INS_LBHI = 178;;
let _M680X_INS_LBLE = 179;;
let _M680X_INS_LBLS = 180;;
let _M680X_INS_LBLT = 181;;
let _M680X_INS_LBMI = 182;;
let _M680X_INS_LBNE = 183;;
let _M680X_INS_LBPL = 184;;
let _M680X_INS_LBRA = 185;;
let _M680X_INS_LBRN = 186;;
let _M680X_INS_LBSR = 187;;
let _M680X_INS_LBVC = 188;;
let _M680X_INS_LBVS = 189;;
let _M680X_INS_LDA = 190;;
let _M680X_INS_LDAA = 191;;
let _M680X_INS_LDAB = 192;;
let _M680X_INS_LDB = 193;;
let _M680X_INS_LDBT = 194;;
let _M680X_INS_LDD = 195;;
let _M680X_INS_LDE = 196;;
let _M680X_INS_LDF = 197;;
let _M680X_INS_LDHX = 198;;
let _M680X_INS_LDMD = 199;;
let _M680X_INS_LDQ = 200;;
let _M680X_INS_LDS = 201;;
let _M680X_INS_LDU = 202;;
let _M680X_INS_LDW = 203;;
let _M680X_INS_LDX = 204;;
let _M680X_INS_LDY = 205;;
let _M680X_INS_LEAS = 206;;
let _M680X_INS_LEAU = 207;;
let _M680X_INS_LEAX = 208;;
let _M680X_INS_LEAY = 209;;
let _M680X_INS_LSL = 210;;
let _M680X_INS_LSLA = 211;;
let _M680X_INS_LSLB = 212;;
let _M680X_INS_LSLD = 213;;
let _M680X_INS_LSLX = 214;;
let _M680X_INS_LSR = 215;;
let _M680X_INS_LSRA = 216;;
let _M680X_INS_LSRB = 217;;
let _M680X_INS_LSRD = 218;;
let _M680X_INS_LSRW = 219;;
let _M680X_INS_LSRX = 220;;
let _M680X_INS_MAXA = 221;;
let _M680X_INS_MAXM = 222;;
let _M680X_INS_MEM = 223;;
let _M680X_INS_MINA = 224;;
let _M680X_INS_MINM = 225;;
let _M680X_INS_MOV = 226;;
let _M680X_INS_MOVB = 227;;
let _M680X_INS_MOVW = 228;;
let _M680X_INS_MUL = 229;;
let _M680X_INS_MULD = 230;;
let _M680X_INS_NEG = 231;;
let _M680X_INS_NEGA = 232;;
let _M680X_INS_NEGB = 233;;
let _M680X_INS_NEGD = 234;;
let _M680X_INS_NEGX = 235;;
let _M680X_INS_NOP = 236;;
let _M680X_INS_NSA = 237;;
let _M680X_INS_OIM = 238;;
let _M680X_INS_ORA = 239;;
let _M680X_INS_ORAA = 240;;
let _M680X_INS_ORAB = 241;;
let _M680X_INS_ORB = 242;;
let _M680X_INS_ORCC = 243;;
let _M680X_INS_ORD = 244;;
let _M680X_INS_ORR = 245;;
let _M680X_INS_PSHA = 246;;
let _M680X_INS_PSHB = 247;;
let _M680X_INS_PSHC = 248;;
let _M680X_INS_PSHD = 249;;
let _M680X_INS_PSHH = 250;;
let _M680X_INS_PSHS = 251;;
let _M680X_INS_PSHSW = 252;;
let _M680X_INS_PSHU = 253;;
let _M680X_INS_PSHUW = 254;;
let _M680X_INS_PSHX = 255;;
let _M680X_INS_PSHY = 256;;
let _M680X_INS_PULA = 257;;
let _M680X_INS_PULB = 258;;
let _M680X_INS_PULC = 259;;
let _M680X_INS_PULD = 260;;
let _M680X_INS_PULH = 261;;
let _M680X_INS_PULS = 262;;
let _M680X_INS_PULSW = 263;;
let _M680X_INS_PULU = 264;;
let _M680X_INS_PULUW = 265;;
let _M680X_INS_PULX = 266;;
let _M680X_INS_PULY = 267;;
let _M680X_INS_REV = 268;;
let _M680X_INS_REVW = 269;;
let _M680X_INS_ROL = 270;;
let _M680X_INS_ROLA = 271;;
let _M680X_INS_ROLB = 272;;
let _M680X_INS_ROLD = 273;;
let _M680X_INS_ROLW = 274;;
let _M680X_INS_ROLX = 275;;
let _M680X_INS_ROR = 276;;
let _M680X_INS_RORA = 277;;
let _M680X_INS_RORB = 278;;
let _M680X_INS_RORD = 279;;
let _M680X_INS_RORW = 280;;
let _M680X_INS_RORX = 281;;
let _M680X_INS_RSP = 282;;
let _M680X_INS_RTC = 283;;
let _M680X_INS_RTI = 284;;
let _M680X_INS_RTS = 285;;
let _M680X_INS_SBA = 286;;
let _M680X_INS_SBC = 287;;
let _M680X_INS_SBCA = 288;;
let _M680X_INS_SBCB = 289;;
let _M680X_INS_SBCD = 290;;
let _M680X_INS_SBCR = 291;;
let _M680X_INS_SEC = 292;;
let _M680X_INS_SEI = 293;;
let _M680X_INS_SEV = 294;;
let _M680X_INS_SEX = 295;;
let _M680X_INS_SEXW = 296;;
let _M680X_INS_SLP = 297;;
let _M680X_INS_STA = 298;;
let _M680X_INS_STAA = 299;;
let _M680X_INS_STAB = 300;;
let _M680X_INS_STB = 301;;
let _M680X_INS_STBT = 302;;
let _M680X_INS_STD = 303;;
let _M680X_INS_STE = 304;;
let _M680X_INS_STF = 305;;
let _M680X_INS_STOP = 306;;
let _M680X_INS_STHX = 307;;
let _M680X_INS_STQ = 308;;
let _M680X_INS_STS = 309;;
let _M680X_INS_STU = 310;;
let _M680X_INS_STW = 311;;
let _M680X_INS_STX = 312;;
let _M680X_INS_STY = 313;;
let _M680X_INS_SUB = 314;;
let _M680X_INS_SUBA = 315;;
let _M680X_INS_SUBB = 316;;
let _M680X_INS_SUBD = 317;;
let _M680X_INS_SUBE = 318;;
let _M680X_INS_SUBF = 319;;
let _M680X_INS_SUBR = 320;;
let _M680X_INS_SUBW = 321;;
let _M680X_INS_SWI = 322;;
let _M680X_INS_SWI2 = 323;;
let _M680X_INS_SWI3 = 324;;
let _M680X_INS_SYNC = 325;;
let _M680X_INS_TAB = 326;;
let _M680X_INS_TAP = 327;;
let _M680X_INS_TAX = 328;;
let _M680X_INS_TBA = 329;;
let _M680X_INS_TBEQ = 330;;
let _M680X_INS_TBL = 331;;
let _M680X_INS_TBNE = 332;;
let _M680X_INS_TEST = 333;;
let _M680X_INS_TFM = 334;;
let _M680X_INS_TFR = 335;;
let _M680X_INS_TIM = 336;;
let _M680X_INS_TPA = 337;;
let _M680X_INS_TST = 338;;
let _M680X_INS_TSTA = 339;;
let _M680X_INS_TSTB = 340;;
let _M680X_INS_TSTD = 341;;
let _M680X_INS_TSTE = 342;;
let _M680X_INS_TSTF = 343;;
let _M680X_INS_TSTW = 344;;
let _M680X_INS_TSTX = 345;;
let _M680X_INS_TSX = 346;;
let _M680X_INS_TSY = 347;;
let _M680X_INS_TXA = 348;;
let _M680X_INS_TXS = 349;;
let _M680X_INS_TYS = 350;;
let _M680X_INS_WAI = 351;;
let _M680X_INS_WAIT = 352;;
let _M680X_INS_WAV = 353;;
let _M680X_INS_WAVR = 354;;
let _M680X_INS_XGDX = 355;;
let _M680X_INS_XGDY = 356;;
let _M680X_INS_ENDING = 357;;

485
thirdparty/capstone/bindings/ocaml/m68k_const.ml vendored Normal file
View File

@@ -0,0 +1,485 @@
(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m68k_const.ml] *)
let _M68K_OPERAND_COUNT = 4;;
let _M68K_REG_INVALID = 0;;
let _M68K_REG_D0 = 1;;
let _M68K_REG_D1 = 2;;
let _M68K_REG_D2 = 3;;
let _M68K_REG_D3 = 4;;
let _M68K_REG_D4 = 5;;
let _M68K_REG_D5 = 6;;
let _M68K_REG_D6 = 7;;
let _M68K_REG_D7 = 8;;
let _M68K_REG_A0 = 9;;
let _M68K_REG_A1 = 10;;
let _M68K_REG_A2 = 11;;
let _M68K_REG_A3 = 12;;
let _M68K_REG_A4 = 13;;
let _M68K_REG_A5 = 14;;
let _M68K_REG_A6 = 15;;
let _M68K_REG_A7 = 16;;
let _M68K_REG_FP0 = 17;;
let _M68K_REG_FP1 = 18;;
let _M68K_REG_FP2 = 19;;
let _M68K_REG_FP3 = 20;;
let _M68K_REG_FP4 = 21;;
let _M68K_REG_FP5 = 22;;
let _M68K_REG_FP6 = 23;;
let _M68K_REG_FP7 = 24;;
let _M68K_REG_PC = 25;;
let _M68K_REG_SR = 26;;
let _M68K_REG_CCR = 27;;
let _M68K_REG_SFC = 28;;
let _M68K_REG_DFC = 29;;
let _M68K_REG_USP = 30;;
let _M68K_REG_VBR = 31;;
let _M68K_REG_CACR = 32;;
let _M68K_REG_CAAR = 33;;
let _M68K_REG_MSP = 34;;
let _M68K_REG_ISP = 35;;
let _M68K_REG_TC = 36;;
let _M68K_REG_ITT0 = 37;;
let _M68K_REG_ITT1 = 38;;
let _M68K_REG_DTT0 = 39;;
let _M68K_REG_DTT1 = 40;;
let _M68K_REG_MMUSR = 41;;
let _M68K_REG_URP = 42;;
let _M68K_REG_SRP = 43;;
let _M68K_REG_FPCR = 44;;
let _M68K_REG_FPSR = 45;;
let _M68K_REG_FPIAR = 46;;
let _M68K_REG_ENDING = 47;;
let _M68K_AM_NONE = 0;;
let _M68K_AM_REG_DIRECT_DATA = 1;;
let _M68K_AM_REG_DIRECT_ADDR = 2;;
let _M68K_AM_REGI_ADDR = 3;;
let _M68K_AM_REGI_ADDR_POST_INC = 4;;
let _M68K_AM_REGI_ADDR_PRE_DEC = 5;;
let _M68K_AM_REGI_ADDR_DISP = 6;;
let _M68K_AM_AREGI_INDEX_8_BIT_DISP = 7;;
let _M68K_AM_AREGI_INDEX_BASE_DISP = 8;;
let _M68K_AM_MEMI_POST_INDEX = 9;;
let _M68K_AM_MEMI_PRE_INDEX = 10;;
let _M68K_AM_PCI_DISP = 11;;
let _M68K_AM_PCI_INDEX_8_BIT_DISP = 12;;
let _M68K_AM_PCI_INDEX_BASE_DISP = 13;;
let _M68K_AM_PC_MEMI_POST_INDEX = 14;;
let _M68K_AM_PC_MEMI_PRE_INDEX = 15;;
let _M68K_AM_ABSOLUTE_DATA_SHORT = 16;;
let _M68K_AM_ABSOLUTE_DATA_LONG = 17;;
let _M68K_AM_IMMEDIATE = 18;;
let _M68K_AM_BRANCH_DISPLACEMENT = 19;;
let _M68K_OP_INVALID = 0;;
let _M68K_OP_REG = 1;;
let _M68K_OP_IMM = 2;;
let _M68K_OP_MEM = 3;;
let _M68K_OP_FP_SINGLE = 4;;
let _M68K_OP_FP_DOUBLE = 5;;
let _M68K_OP_REG_BITS = 6;;
let _M68K_OP_REG_PAIR = 7;;
let _M68K_OP_BR_DISP = 8;;
let _M68K_OP_BR_DISP_SIZE_INVALID = 0;;
let _M68K_OP_BR_DISP_SIZE_BYTE = 1;;
let _M68K_OP_BR_DISP_SIZE_WORD = 2;;
let _M68K_OP_BR_DISP_SIZE_LONG = 4;;
let _M68K_CPU_SIZE_NONE = 0;;
let _M68K_CPU_SIZE_BYTE = 1;;
let _M68K_CPU_SIZE_WORD = 2;;
let _M68K_CPU_SIZE_LONG = 4;;
let _M68K_FPU_SIZE_NONE = 0;;
let _M68K_FPU_SIZE_SINGLE = 4;;
let _M68K_FPU_SIZE_DOUBLE = 8;;
let _M68K_FPU_SIZE_EXTENDED = 12;;
let _M68K_SIZE_TYPE_INVALID = 0;;
let _M68K_SIZE_TYPE_CPU = 1;;
let _M68K_SIZE_TYPE_FPU = 2;;
let _M68K_INS_INVALID = 0;;
let _M68K_INS_ABCD = 1;;
let _M68K_INS_ADD = 2;;
let _M68K_INS_ADDA = 3;;
let _M68K_INS_ADDI = 4;;
let _M68K_INS_ADDQ = 5;;
let _M68K_INS_ADDX = 6;;
let _M68K_INS_AND = 7;;
let _M68K_INS_ANDI = 8;;
let _M68K_INS_ASL = 9;;
let _M68K_INS_ASR = 10;;
let _M68K_INS_BHS = 11;;
let _M68K_INS_BLO = 12;;
let _M68K_INS_BHI = 13;;
let _M68K_INS_BLS = 14;;
let _M68K_INS_BCC = 15;;
let _M68K_INS_BCS = 16;;
let _M68K_INS_BNE = 17;;
let _M68K_INS_BEQ = 18;;
let _M68K_INS_BVC = 19;;
let _M68K_INS_BVS = 20;;
let _M68K_INS_BPL = 21;;
let _M68K_INS_BMI = 22;;
let _M68K_INS_BGE = 23;;
let _M68K_INS_BLT = 24;;
let _M68K_INS_BGT = 25;;
let _M68K_INS_BLE = 26;;
let _M68K_INS_BRA = 27;;
let _M68K_INS_BSR = 28;;
let _M68K_INS_BCHG = 29;;
let _M68K_INS_BCLR = 30;;
let _M68K_INS_BSET = 31;;
let _M68K_INS_BTST = 32;;
let _M68K_INS_BFCHG = 33;;
let _M68K_INS_BFCLR = 34;;
let _M68K_INS_BFEXTS = 35;;
let _M68K_INS_BFEXTU = 36;;
let _M68K_INS_BFFFO = 37;;
let _M68K_INS_BFINS = 38;;
let _M68K_INS_BFSET = 39;;
let _M68K_INS_BFTST = 40;;
let _M68K_INS_BKPT = 41;;
let _M68K_INS_CALLM = 42;;
let _M68K_INS_CAS = 43;;
let _M68K_INS_CAS2 = 44;;
let _M68K_INS_CHK = 45;;
let _M68K_INS_CHK2 = 46;;
let _M68K_INS_CLR = 47;;
let _M68K_INS_CMP = 48;;
let _M68K_INS_CMPA = 49;;
let _M68K_INS_CMPI = 50;;
let _M68K_INS_CMPM = 51;;
let _M68K_INS_CMP2 = 52;;
let _M68K_INS_CINVL = 53;;
let _M68K_INS_CINVP = 54;;
let _M68K_INS_CINVA = 55;;
let _M68K_INS_CPUSHL = 56;;
let _M68K_INS_CPUSHP = 57;;
let _M68K_INS_CPUSHA = 58;;
let _M68K_INS_DBT = 59;;
let _M68K_INS_DBF = 60;;
let _M68K_INS_DBHI = 61;;
let _M68K_INS_DBLS = 62;;
let _M68K_INS_DBCC = 63;;
let _M68K_INS_DBCS = 64;;
let _M68K_INS_DBNE = 65;;
let _M68K_INS_DBEQ = 66;;
let _M68K_INS_DBVC = 67;;
let _M68K_INS_DBVS = 68;;
let _M68K_INS_DBPL = 69;;
let _M68K_INS_DBMI = 70;;
let _M68K_INS_DBGE = 71;;
let _M68K_INS_DBLT = 72;;
let _M68K_INS_DBGT = 73;;
let _M68K_INS_DBLE = 74;;
let _M68K_INS_DBRA = 75;;
let _M68K_INS_DIVS = 76;;
let _M68K_INS_DIVSL = 77;;
let _M68K_INS_DIVU = 78;;
let _M68K_INS_DIVUL = 79;;
let _M68K_INS_EOR = 80;;
let _M68K_INS_EORI = 81;;
let _M68K_INS_EXG = 82;;
let _M68K_INS_EXT = 83;;
let _M68K_INS_EXTB = 84;;
let _M68K_INS_FABS = 85;;
let _M68K_INS_FSABS = 86;;
let _M68K_INS_FDABS = 87;;
let _M68K_INS_FACOS = 88;;
let _M68K_INS_FADD = 89;;
let _M68K_INS_FSADD = 90;;
let _M68K_INS_FDADD = 91;;
let _M68K_INS_FASIN = 92;;
let _M68K_INS_FATAN = 93;;
let _M68K_INS_FATANH = 94;;
let _M68K_INS_FBF = 95;;
let _M68K_INS_FBEQ = 96;;
let _M68K_INS_FBOGT = 97;;
let _M68K_INS_FBOGE = 98;;
let _M68K_INS_FBOLT = 99;;
let _M68K_INS_FBOLE = 100;;
let _M68K_INS_FBOGL = 101;;
let _M68K_INS_FBOR = 102;;
let _M68K_INS_FBUN = 103;;
let _M68K_INS_FBUEQ = 104;;
let _M68K_INS_FBUGT = 105;;
let _M68K_INS_FBUGE = 106;;
let _M68K_INS_FBULT = 107;;
let _M68K_INS_FBULE = 108;;
let _M68K_INS_FBNE = 109;;
let _M68K_INS_FBT = 110;;
let _M68K_INS_FBSF = 111;;
let _M68K_INS_FBSEQ = 112;;
let _M68K_INS_FBGT = 113;;
let _M68K_INS_FBGE = 114;;
let _M68K_INS_FBLT = 115;;
let _M68K_INS_FBLE = 116;;
let _M68K_INS_FBGL = 117;;
let _M68K_INS_FBGLE = 118;;
let _M68K_INS_FBNGLE = 119;;
let _M68K_INS_FBNGL = 120;;
let _M68K_INS_FBNLE = 121;;
let _M68K_INS_FBNLT = 122;;
let _M68K_INS_FBNGE = 123;;
let _M68K_INS_FBNGT = 124;;
let _M68K_INS_FBSNE = 125;;
let _M68K_INS_FBST = 126;;
let _M68K_INS_FCMP = 127;;
let _M68K_INS_FCOS = 128;;
let _M68K_INS_FCOSH = 129;;
let _M68K_INS_FDBF = 130;;
let _M68K_INS_FDBEQ = 131;;
let _M68K_INS_FDBOGT = 132;;
let _M68K_INS_FDBOGE = 133;;
let _M68K_INS_FDBOLT = 134;;
let _M68K_INS_FDBOLE = 135;;
let _M68K_INS_FDBOGL = 136;;
let _M68K_INS_FDBOR = 137;;
let _M68K_INS_FDBUN = 138;;
let _M68K_INS_FDBUEQ = 139;;
let _M68K_INS_FDBUGT = 140;;
let _M68K_INS_FDBUGE = 141;;
let _M68K_INS_FDBULT = 142;;
let _M68K_INS_FDBULE = 143;;
let _M68K_INS_FDBNE = 144;;
let _M68K_INS_FDBT = 145;;
let _M68K_INS_FDBSF = 146;;
let _M68K_INS_FDBSEQ = 147;;
let _M68K_INS_FDBGT = 148;;
let _M68K_INS_FDBGE = 149;;
let _M68K_INS_FDBLT = 150;;
let _M68K_INS_FDBLE = 151;;
let _M68K_INS_FDBGL = 152;;
let _M68K_INS_FDBGLE = 153;;
let _M68K_INS_FDBNGLE = 154;;
let _M68K_INS_FDBNGL = 155;;
let _M68K_INS_FDBNLE = 156;;
let _M68K_INS_FDBNLT = 157;;
let _M68K_INS_FDBNGE = 158;;
let _M68K_INS_FDBNGT = 159;;
let _M68K_INS_FDBSNE = 160;;
let _M68K_INS_FDBST = 161;;
let _M68K_INS_FDIV = 162;;
let _M68K_INS_FSDIV = 163;;
let _M68K_INS_FDDIV = 164;;
let _M68K_INS_FETOX = 165;;
let _M68K_INS_FETOXM1 = 166;;
let _M68K_INS_FGETEXP = 167;;
let _M68K_INS_FGETMAN = 168;;
let _M68K_INS_FINT = 169;;
let _M68K_INS_FINTRZ = 170;;
let _M68K_INS_FLOG10 = 171;;
let _M68K_INS_FLOG2 = 172;;
let _M68K_INS_FLOGN = 173;;
let _M68K_INS_FLOGNP1 = 174;;
let _M68K_INS_FMOD = 175;;
let _M68K_INS_FMOVE = 176;;
let _M68K_INS_FSMOVE = 177;;
let _M68K_INS_FDMOVE = 178;;
let _M68K_INS_FMOVECR = 179;;
let _M68K_INS_FMOVEM = 180;;
let _M68K_INS_FMUL = 181;;
let _M68K_INS_FSMUL = 182;;
let _M68K_INS_FDMUL = 183;;
let _M68K_INS_FNEG = 184;;
let _M68K_INS_FSNEG = 185;;
let _M68K_INS_FDNEG = 186;;
let _M68K_INS_FNOP = 187;;
let _M68K_INS_FREM = 188;;
let _M68K_INS_FRESTORE = 189;;
let _M68K_INS_FSAVE = 190;;
let _M68K_INS_FSCALE = 191;;
let _M68K_INS_FSGLDIV = 192;;
let _M68K_INS_FSGLMUL = 193;;
let _M68K_INS_FSIN = 194;;
let _M68K_INS_FSINCOS = 195;;
let _M68K_INS_FSINH = 196;;
let _M68K_INS_FSQRT = 197;;
let _M68K_INS_FSSQRT = 198;;
let _M68K_INS_FDSQRT = 199;;
let _M68K_INS_FSF = 200;;
let _M68K_INS_FSBEQ = 201;;
let _M68K_INS_FSOGT = 202;;
let _M68K_INS_FSOGE = 203;;
let _M68K_INS_FSOLT = 204;;
let _M68K_INS_FSOLE = 205;;
let _M68K_INS_FSOGL = 206;;
let _M68K_INS_FSOR = 207;;
let _M68K_INS_FSUN = 208;;
let _M68K_INS_FSUEQ = 209;;
let _M68K_INS_FSUGT = 210;;
let _M68K_INS_FSUGE = 211;;
let _M68K_INS_FSULT = 212;;
let _M68K_INS_FSULE = 213;;
let _M68K_INS_FSNE = 214;;
let _M68K_INS_FST = 215;;
let _M68K_INS_FSSF = 216;;
let _M68K_INS_FSSEQ = 217;;
let _M68K_INS_FSGT = 218;;
let _M68K_INS_FSGE = 219;;
let _M68K_INS_FSLT = 220;;
let _M68K_INS_FSLE = 221;;
let _M68K_INS_FSGL = 222;;
let _M68K_INS_FSGLE = 223;;
let _M68K_INS_FSNGLE = 224;;
let _M68K_INS_FSNGL = 225;;
let _M68K_INS_FSNLE = 226;;
let _M68K_INS_FSNLT = 227;;
let _M68K_INS_FSNGE = 228;;
let _M68K_INS_FSNGT = 229;;
let _M68K_INS_FSSNE = 230;;
let _M68K_INS_FSST = 231;;
let _M68K_INS_FSUB = 232;;
let _M68K_INS_FSSUB = 233;;
let _M68K_INS_FDSUB = 234;;
let _M68K_INS_FTAN = 235;;
let _M68K_INS_FTANH = 236;;
let _M68K_INS_FTENTOX = 237;;
let _M68K_INS_FTRAPF = 238;;
let _M68K_INS_FTRAPEQ = 239;;
let _M68K_INS_FTRAPOGT = 240;;
let _M68K_INS_FTRAPOGE = 241;;
let _M68K_INS_FTRAPOLT = 242;;
let _M68K_INS_FTRAPOLE = 243;;
let _M68K_INS_FTRAPOGL = 244;;
let _M68K_INS_FTRAPOR = 245;;
let _M68K_INS_FTRAPUN = 246;;
let _M68K_INS_FTRAPUEQ = 247;;
let _M68K_INS_FTRAPUGT = 248;;
let _M68K_INS_FTRAPUGE = 249;;
let _M68K_INS_FTRAPULT = 250;;
let _M68K_INS_FTRAPULE = 251;;
let _M68K_INS_FTRAPNE = 252;;
let _M68K_INS_FTRAPT = 253;;
let _M68K_INS_FTRAPSF = 254;;
let _M68K_INS_FTRAPSEQ = 255;;
let _M68K_INS_FTRAPGT = 256;;
let _M68K_INS_FTRAPGE = 257;;
let _M68K_INS_FTRAPLT = 258;;
let _M68K_INS_FTRAPLE = 259;;
let _M68K_INS_FTRAPGL = 260;;
let _M68K_INS_FTRAPGLE = 261;;
let _M68K_INS_FTRAPNGLE = 262;;
let _M68K_INS_FTRAPNGL = 263;;
let _M68K_INS_FTRAPNLE = 264;;
let _M68K_INS_FTRAPNLT = 265;;
let _M68K_INS_FTRAPNGE = 266;;
let _M68K_INS_FTRAPNGT = 267;;
let _M68K_INS_FTRAPSNE = 268;;
let _M68K_INS_FTRAPST = 269;;
let _M68K_INS_FTST = 270;;
let _M68K_INS_FTWOTOX = 271;;
let _M68K_INS_HALT = 272;;
let _M68K_INS_ILLEGAL = 273;;
let _M68K_INS_JMP = 274;;
let _M68K_INS_JSR = 275;;
let _M68K_INS_LEA = 276;;
let _M68K_INS_LINK = 277;;
let _M68K_INS_LPSTOP = 278;;
let _M68K_INS_LSL = 279;;
let _M68K_INS_LSR = 280;;
let _M68K_INS_MOVE = 281;;
let _M68K_INS_MOVEA = 282;;
let _M68K_INS_MOVEC = 283;;
let _M68K_INS_MOVEM = 284;;
let _M68K_INS_MOVEP = 285;;
let _M68K_INS_MOVEQ = 286;;
let _M68K_INS_MOVES = 287;;
let _M68K_INS_MOVE16 = 288;;
let _M68K_INS_MULS = 289;;
let _M68K_INS_MULU = 290;;
let _M68K_INS_NBCD = 291;;
let _M68K_INS_NEG = 292;;
let _M68K_INS_NEGX = 293;;
let _M68K_INS_NOP = 294;;
let _M68K_INS_NOT = 295;;
let _M68K_INS_OR = 296;;
let _M68K_INS_ORI = 297;;
let _M68K_INS_PACK = 298;;
let _M68K_INS_PEA = 299;;
let _M68K_INS_PFLUSH = 300;;
let _M68K_INS_PFLUSHA = 301;;
let _M68K_INS_PFLUSHAN = 302;;
let _M68K_INS_PFLUSHN = 303;;
let _M68K_INS_PLOADR = 304;;
let _M68K_INS_PLOADW = 305;;
let _M68K_INS_PLPAR = 306;;
let _M68K_INS_PLPAW = 307;;
let _M68K_INS_PMOVE = 308;;
let _M68K_INS_PMOVEFD = 309;;
let _M68K_INS_PTESTR = 310;;
let _M68K_INS_PTESTW = 311;;
let _M68K_INS_PULSE = 312;;
let _M68K_INS_REMS = 313;;
let _M68K_INS_REMU = 314;;
let _M68K_INS_RESET = 315;;
let _M68K_INS_ROL = 316;;
let _M68K_INS_ROR = 317;;
let _M68K_INS_ROXL = 318;;
let _M68K_INS_ROXR = 319;;
let _M68K_INS_RTD = 320;;
let _M68K_INS_RTE = 321;;
let _M68K_INS_RTM = 322;;
let _M68K_INS_RTR = 323;;
let _M68K_INS_RTS = 324;;
let _M68K_INS_SBCD = 325;;
let _M68K_INS_ST = 326;;
let _M68K_INS_SF = 327;;
let _M68K_INS_SHI = 328;;
let _M68K_INS_SLS = 329;;
let _M68K_INS_SCC = 330;;
let _M68K_INS_SHS = 331;;
let _M68K_INS_SCS = 332;;
let _M68K_INS_SLO = 333;;
let _M68K_INS_SNE = 334;;
let _M68K_INS_SEQ = 335;;
let _M68K_INS_SVC = 336;;
let _M68K_INS_SVS = 337;;
let _M68K_INS_SPL = 338;;
let _M68K_INS_SMI = 339;;
let _M68K_INS_SGE = 340;;
let _M68K_INS_SLT = 341;;
let _M68K_INS_SGT = 342;;
let _M68K_INS_SLE = 343;;
let _M68K_INS_STOP = 344;;
let _M68K_INS_SUB = 345;;
let _M68K_INS_SUBA = 346;;
let _M68K_INS_SUBI = 347;;
let _M68K_INS_SUBQ = 348;;
let _M68K_INS_SUBX = 349;;
let _M68K_INS_SWAP = 350;;
let _M68K_INS_TAS = 351;;
let _M68K_INS_TRAP = 352;;
let _M68K_INS_TRAPV = 353;;
let _M68K_INS_TRAPT = 354;;
let _M68K_INS_TRAPF = 355;;
let _M68K_INS_TRAPHI = 356;;
let _M68K_INS_TRAPLS = 357;;
let _M68K_INS_TRAPCC = 358;;
let _M68K_INS_TRAPHS = 359;;
let _M68K_INS_TRAPCS = 360;;
let _M68K_INS_TRAPLO = 361;;
let _M68K_INS_TRAPNE = 362;;
let _M68K_INS_TRAPEQ = 363;;
let _M68K_INS_TRAPVC = 364;;
let _M68K_INS_TRAPVS = 365;;
let _M68K_INS_TRAPPL = 366;;
let _M68K_INS_TRAPMI = 367;;
let _M68K_INS_TRAPGE = 368;;
let _M68K_INS_TRAPLT = 369;;
let _M68K_INS_TRAPGT = 370;;
let _M68K_INS_TRAPLE = 371;;
let _M68K_INS_TST = 372;;
let _M68K_INS_UNLK = 373;;
let _M68K_INS_UNPK = 374;;
let _M68K_INS_ENDING = 375;;
let _M68K_GRP_INVALID = 0;;
let _M68K_GRP_JUMP = 1;;
let _M68K_GRP_RET = 3;;
let _M68K_GRP_IRET = 5;;
let _M68K_GRP_BRANCH_RELATIVE = 7;;
let _M68K_GRP_ENDING = 8;;

24
thirdparty/capstone/bindings/ocaml/mips.ml vendored Normal file
View File

@@ -0,0 +1,24 @@
(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Mips_const
(* architecture specific info of instruction *)
type mips_op_mem = {
base: int;
disp: int
}
type mips_op_value =
| MIPS_OP_INVALID of int
| MIPS_OP_REG of int
| MIPS_OP_IMM of int
| MIPS_OP_MEM of mips_op_mem
type mips_op = {
value: mips_op_value;
}
type cs_mips = {
operands: mips_op array;
}

861
thirdparty/capstone/bindings/ocaml/mips_const.ml vendored Normal file
View File

@@ -0,0 +1,861 @@
(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.ml] *)
let _MIPS_OP_INVALID = 0;;
let _MIPS_OP_REG = 1;;
let _MIPS_OP_IMM = 2;;
let _MIPS_OP_MEM = 3;;
let _MIPS_REG_INVALID = 0;;
let _MIPS_REG_PC = 1;;
let _MIPS_REG_0 = 2;;
let _MIPS_REG_1 = 3;;
let _MIPS_REG_2 = 4;;
let _MIPS_REG_3 = 5;;
let _MIPS_REG_4 = 6;;
let _MIPS_REG_5 = 7;;
let _MIPS_REG_6 = 8;;
let _MIPS_REG_7 = 9;;
let _MIPS_REG_8 = 10;;
let _MIPS_REG_9 = 11;;
let _MIPS_REG_10 = 12;;
let _MIPS_REG_11 = 13;;
let _MIPS_REG_12 = 14;;
let _MIPS_REG_13 = 15;;
let _MIPS_REG_14 = 16;;
let _MIPS_REG_15 = 17;;
let _MIPS_REG_16 = 18;;
let _MIPS_REG_17 = 19;;
let _MIPS_REG_18 = 20;;
let _MIPS_REG_19 = 21;;
let _MIPS_REG_20 = 22;;
let _MIPS_REG_21 = 23;;
let _MIPS_REG_22 = 24;;
let _MIPS_REG_23 = 25;;
let _MIPS_REG_24 = 26;;
let _MIPS_REG_25 = 27;;
let _MIPS_REG_26 = 28;;
let _MIPS_REG_27 = 29;;
let _MIPS_REG_28 = 30;;
let _MIPS_REG_29 = 31;;
let _MIPS_REG_30 = 32;;
let _MIPS_REG_31 = 33;;
let _MIPS_REG_DSPCCOND = 34;;
let _MIPS_REG_DSPCARRY = 35;;
let _MIPS_REG_DSPEFI = 36;;
let _MIPS_REG_DSPOUTFLAG = 37;;
let _MIPS_REG_DSPOUTFLAG16_19 = 38;;
let _MIPS_REG_DSPOUTFLAG20 = 39;;
let _MIPS_REG_DSPOUTFLAG21 = 40;;
let _MIPS_REG_DSPOUTFLAG22 = 41;;
let _MIPS_REG_DSPOUTFLAG23 = 42;;
let _MIPS_REG_DSPPOS = 43;;
let _MIPS_REG_DSPSCOUNT = 44;;
let _MIPS_REG_AC0 = 45;;
let _MIPS_REG_AC1 = 46;;
let _MIPS_REG_AC2 = 47;;
let _MIPS_REG_AC3 = 48;;
let _MIPS_REG_CC0 = 49;;
let _MIPS_REG_CC1 = 50;;
let _MIPS_REG_CC2 = 51;;
let _MIPS_REG_CC3 = 52;;
let _MIPS_REG_CC4 = 53;;
let _MIPS_REG_CC5 = 54;;
let _MIPS_REG_CC6 = 55;;
let _MIPS_REG_CC7 = 56;;
let _MIPS_REG_F0 = 57;;
let _MIPS_REG_F1 = 58;;
let _MIPS_REG_F2 = 59;;
let _MIPS_REG_F3 = 60;;
let _MIPS_REG_F4 = 61;;
let _MIPS_REG_F5 = 62;;
let _MIPS_REG_F6 = 63;;
let _MIPS_REG_F7 = 64;;
let _MIPS_REG_F8 = 65;;
let _MIPS_REG_F9 = 66;;
let _MIPS_REG_F10 = 67;;
let _MIPS_REG_F11 = 68;;
let _MIPS_REG_F12 = 69;;
let _MIPS_REG_F13 = 70;;
let _MIPS_REG_F14 = 71;;
let _MIPS_REG_F15 = 72;;
let _MIPS_REG_F16 = 73;;
let _MIPS_REG_F17 = 74;;
let _MIPS_REG_F18 = 75;;
let _MIPS_REG_F19 = 76;;
let _MIPS_REG_F20 = 77;;
let _MIPS_REG_F21 = 78;;
let _MIPS_REG_F22 = 79;;
let _MIPS_REG_F23 = 80;;
let _MIPS_REG_F24 = 81;;
let _MIPS_REG_F25 = 82;;
let _MIPS_REG_F26 = 83;;
let _MIPS_REG_F27 = 84;;
let _MIPS_REG_F28 = 85;;
let _MIPS_REG_F29 = 86;;
let _MIPS_REG_F30 = 87;;
let _MIPS_REG_F31 = 88;;
let _MIPS_REG_FCC0 = 89;;
let _MIPS_REG_FCC1 = 90;;
let _MIPS_REG_FCC2 = 91;;
let _MIPS_REG_FCC3 = 92;;
let _MIPS_REG_FCC4 = 93;;
let _MIPS_REG_FCC5 = 94;;
let _MIPS_REG_FCC6 = 95;;
let _MIPS_REG_FCC7 = 96;;
let _MIPS_REG_W0 = 97;;
let _MIPS_REG_W1 = 98;;
let _MIPS_REG_W2 = 99;;
let _MIPS_REG_W3 = 100;;
let _MIPS_REG_W4 = 101;;
let _MIPS_REG_W5 = 102;;
let _MIPS_REG_W6 = 103;;
let _MIPS_REG_W7 = 104;;
let _MIPS_REG_W8 = 105;;
let _MIPS_REG_W9 = 106;;
let _MIPS_REG_W10 = 107;;
let _MIPS_REG_W11 = 108;;
let _MIPS_REG_W12 = 109;;
let _MIPS_REG_W13 = 110;;
let _MIPS_REG_W14 = 111;;
let _MIPS_REG_W15 = 112;;
let _MIPS_REG_W16 = 113;;
let _MIPS_REG_W17 = 114;;
let _MIPS_REG_W18 = 115;;
let _MIPS_REG_W19 = 116;;
let _MIPS_REG_W20 = 117;;
let _MIPS_REG_W21 = 118;;
let _MIPS_REG_W22 = 119;;
let _MIPS_REG_W23 = 120;;
let _MIPS_REG_W24 = 121;;
let _MIPS_REG_W25 = 122;;
let _MIPS_REG_W26 = 123;;
let _MIPS_REG_W27 = 124;;
let _MIPS_REG_W28 = 125;;
let _MIPS_REG_W29 = 126;;
let _MIPS_REG_W30 = 127;;
let _MIPS_REG_W31 = 128;;
let _MIPS_REG_HI = 129;;
let _MIPS_REG_LO = 130;;
let _MIPS_REG_P0 = 131;;
let _MIPS_REG_P1 = 132;;
let _MIPS_REG_P2 = 133;;
let _MIPS_REG_MPL0 = 134;;
let _MIPS_REG_MPL1 = 135;;
let _MIPS_REG_MPL2 = 136;;
let _MIPS_REG_ENDING = 137;;
let _MIPS_REG_ZERO = _MIPS_REG_0;;
let _MIPS_REG_AT = _MIPS_REG_1;;
let _MIPS_REG_V0 = _MIPS_REG_2;;
let _MIPS_REG_V1 = _MIPS_REG_3;;
let _MIPS_REG_A0 = _MIPS_REG_4;;
let _MIPS_REG_A1 = _MIPS_REG_5;;
let _MIPS_REG_A2 = _MIPS_REG_6;;
let _MIPS_REG_A3 = _MIPS_REG_7;;
let _MIPS_REG_T0 = _MIPS_REG_8;;
let _MIPS_REG_T1 = _MIPS_REG_9;;
let _MIPS_REG_T2 = _MIPS_REG_10;;
let _MIPS_REG_T3 = _MIPS_REG_11;;
let _MIPS_REG_T4 = _MIPS_REG_12;;
let _MIPS_REG_T5 = _MIPS_REG_13;;
let _MIPS_REG_T6 = _MIPS_REG_14;;
let _MIPS_REG_T7 = _MIPS_REG_15;;
let _MIPS_REG_S0 = _MIPS_REG_16;;
let _MIPS_REG_S1 = _MIPS_REG_17;;
let _MIPS_REG_S2 = _MIPS_REG_18;;
let _MIPS_REG_S3 = _MIPS_REG_19;;
let _MIPS_REG_S4 = _MIPS_REG_20;;
let _MIPS_REG_S5 = _MIPS_REG_21;;
let _MIPS_REG_S6 = _MIPS_REG_22;;
let _MIPS_REG_S7 = _MIPS_REG_23;;
let _MIPS_REG_T8 = _MIPS_REG_24;;
let _MIPS_REG_T9 = _MIPS_REG_25;;
let _MIPS_REG_K0 = _MIPS_REG_26;;
let _MIPS_REG_K1 = _MIPS_REG_27;;
let _MIPS_REG_GP = _MIPS_REG_28;;
let _MIPS_REG_SP = _MIPS_REG_29;;
let _MIPS_REG_FP = _MIPS_REG_30;;
let _MIPS_REG_S8 = _MIPS_REG_30;;
let _MIPS_REG_RA = _MIPS_REG_31;;
let _MIPS_REG_HI0 = _MIPS_REG_AC0;;
let _MIPS_REG_HI1 = _MIPS_REG_AC1;;
let _MIPS_REG_HI2 = _MIPS_REG_AC2;;
let _MIPS_REG_HI3 = _MIPS_REG_AC3;;
let _MIPS_REG_LO0 = _MIPS_REG_HI0;;
let _MIPS_REG_LO1 = _MIPS_REG_HI1;;
let _MIPS_REG_LO2 = _MIPS_REG_HI2;;
let _MIPS_REG_LO3 = _MIPS_REG_HI3;;
let _MIPS_INS_INVALID = 0;;
let _MIPS_INS_ABSQ_S = 1;;
let _MIPS_INS_ADD = 2;;
let _MIPS_INS_ADDIUPC = 3;;
let _MIPS_INS_ADDIUR1SP = 4;;
let _MIPS_INS_ADDIUR2 = 5;;
let _MIPS_INS_ADDIUS5 = 6;;
let _MIPS_INS_ADDIUSP = 7;;
let _MIPS_INS_ADDQH = 8;;
let _MIPS_INS_ADDQH_R = 9;;
let _MIPS_INS_ADDQ = 10;;
let _MIPS_INS_ADDQ_S = 11;;
let _MIPS_INS_ADDSC = 12;;
let _MIPS_INS_ADDS_A = 13;;
let _MIPS_INS_ADDS_S = 14;;
let _MIPS_INS_ADDS_U = 15;;
let _MIPS_INS_ADDU16 = 16;;
let _MIPS_INS_ADDUH = 17;;
let _MIPS_INS_ADDUH_R = 18;;
let _MIPS_INS_ADDU = 19;;
let _MIPS_INS_ADDU_S = 20;;
let _MIPS_INS_ADDVI = 21;;
let _MIPS_INS_ADDV = 22;;
let _MIPS_INS_ADDWC = 23;;
let _MIPS_INS_ADD_A = 24;;
let _MIPS_INS_ADDI = 25;;
let _MIPS_INS_ADDIU = 26;;
let _MIPS_INS_ALIGN = 27;;
let _MIPS_INS_ALUIPC = 28;;
let _MIPS_INS_AND = 29;;
let _MIPS_INS_AND16 = 30;;
let _MIPS_INS_ANDI16 = 31;;
let _MIPS_INS_ANDI = 32;;
let _MIPS_INS_APPEND = 33;;
let _MIPS_INS_ASUB_S = 34;;
let _MIPS_INS_ASUB_U = 35;;
let _MIPS_INS_AUI = 36;;
let _MIPS_INS_AUIPC = 37;;
let _MIPS_INS_AVER_S = 38;;
let _MIPS_INS_AVER_U = 39;;
let _MIPS_INS_AVE_S = 40;;
let _MIPS_INS_AVE_U = 41;;
let _MIPS_INS_B16 = 42;;
let _MIPS_INS_BADDU = 43;;
let _MIPS_INS_BAL = 44;;
let _MIPS_INS_BALC = 45;;
let _MIPS_INS_BALIGN = 46;;
let _MIPS_INS_BBIT0 = 47;;
let _MIPS_INS_BBIT032 = 48;;
let _MIPS_INS_BBIT1 = 49;;
let _MIPS_INS_BBIT132 = 50;;
let _MIPS_INS_BC = 51;;
let _MIPS_INS_BC0F = 52;;
let _MIPS_INS_BC0FL = 53;;
let _MIPS_INS_BC0T = 54;;
let _MIPS_INS_BC0TL = 55;;
let _MIPS_INS_BC1EQZ = 56;;
let _MIPS_INS_BC1F = 57;;
let _MIPS_INS_BC1FL = 58;;
let _MIPS_INS_BC1NEZ = 59;;
let _MIPS_INS_BC1T = 60;;
let _MIPS_INS_BC1TL = 61;;
let _MIPS_INS_BC2EQZ = 62;;
let _MIPS_INS_BC2F = 63;;
let _MIPS_INS_BC2FL = 64;;
let _MIPS_INS_BC2NEZ = 65;;
let _MIPS_INS_BC2T = 66;;
let _MIPS_INS_BC2TL = 67;;
let _MIPS_INS_BC3F = 68;;
let _MIPS_INS_BC3FL = 69;;
let _MIPS_INS_BC3T = 70;;
let _MIPS_INS_BC3TL = 71;;
let _MIPS_INS_BCLRI = 72;;
let _MIPS_INS_BCLR = 73;;
let _MIPS_INS_BEQ = 74;;
let _MIPS_INS_BEQC = 75;;
let _MIPS_INS_BEQL = 76;;
let _MIPS_INS_BEQZ16 = 77;;
let _MIPS_INS_BEQZALC = 78;;
let _MIPS_INS_BEQZC = 79;;
let _MIPS_INS_BGEC = 80;;
let _MIPS_INS_BGEUC = 81;;
let _MIPS_INS_BGEZ = 82;;
let _MIPS_INS_BGEZAL = 83;;
let _MIPS_INS_BGEZALC = 84;;
let _MIPS_INS_BGEZALL = 85;;
let _MIPS_INS_BGEZALS = 86;;
let _MIPS_INS_BGEZC = 87;;
let _MIPS_INS_BGEZL = 88;;
let _MIPS_INS_BGTZ = 89;;
let _MIPS_INS_BGTZALC = 90;;
let _MIPS_INS_BGTZC = 91;;
let _MIPS_INS_BGTZL = 92;;
let _MIPS_INS_BINSLI = 93;;
let _MIPS_INS_BINSL = 94;;
let _MIPS_INS_BINSRI = 95;;
let _MIPS_INS_BINSR = 96;;
let _MIPS_INS_BITREV = 97;;
let _MIPS_INS_BITSWAP = 98;;
let _MIPS_INS_BLEZ = 99;;
let _MIPS_INS_BLEZALC = 100;;
let _MIPS_INS_BLEZC = 101;;
let _MIPS_INS_BLEZL = 102;;
let _MIPS_INS_BLTC = 103;;
let _MIPS_INS_BLTUC = 104;;
let _MIPS_INS_BLTZ = 105;;
let _MIPS_INS_BLTZAL = 106;;
let _MIPS_INS_BLTZALC = 107;;
let _MIPS_INS_BLTZALL = 108;;
let _MIPS_INS_BLTZALS = 109;;
let _MIPS_INS_BLTZC = 110;;
let _MIPS_INS_BLTZL = 111;;
let _MIPS_INS_BMNZI = 112;;
let _MIPS_INS_BMNZ = 113;;
let _MIPS_INS_BMZI = 114;;
let _MIPS_INS_BMZ = 115;;
let _MIPS_INS_BNE = 116;;
let _MIPS_INS_BNEC = 117;;
let _MIPS_INS_BNEGI = 118;;
let _MIPS_INS_BNEG = 119;;
let _MIPS_INS_BNEL = 120;;
let _MIPS_INS_BNEZ16 = 121;;
let _MIPS_INS_BNEZALC = 122;;
let _MIPS_INS_BNEZC = 123;;
let _MIPS_INS_BNVC = 124;;
let _MIPS_INS_BNZ = 125;;
let _MIPS_INS_BOVC = 126;;
let _MIPS_INS_BPOSGE32 = 127;;
let _MIPS_INS_BREAK = 128;;
let _MIPS_INS_BREAK16 = 129;;
let _MIPS_INS_BSELI = 130;;
let _MIPS_INS_BSEL = 131;;
let _MIPS_INS_BSETI = 132;;
let _MIPS_INS_BSET = 133;;
let _MIPS_INS_BZ = 134;;
let _MIPS_INS_BEQZ = 135;;
let _MIPS_INS_B = 136;;
let _MIPS_INS_BNEZ = 137;;
let _MIPS_INS_BTEQZ = 138;;
let _MIPS_INS_BTNEZ = 139;;
let _MIPS_INS_CACHE = 140;;
let _MIPS_INS_CEIL = 141;;
let _MIPS_INS_CEQI = 142;;
let _MIPS_INS_CEQ = 143;;
let _MIPS_INS_CFC1 = 144;;
let _MIPS_INS_CFCMSA = 145;;
let _MIPS_INS_CINS = 146;;
let _MIPS_INS_CINS32 = 147;;
let _MIPS_INS_CLASS = 148;;
let _MIPS_INS_CLEI_S = 149;;
let _MIPS_INS_CLEI_U = 150;;
let _MIPS_INS_CLE_S = 151;;
let _MIPS_INS_CLE_U = 152;;
let _MIPS_INS_CLO = 153;;
let _MIPS_INS_CLTI_S = 154;;
let _MIPS_INS_CLTI_U = 155;;
let _MIPS_INS_CLT_S = 156;;
let _MIPS_INS_CLT_U = 157;;
let _MIPS_INS_CLZ = 158;;
let _MIPS_INS_CMPGDU = 159;;
let _MIPS_INS_CMPGU = 160;;
let _MIPS_INS_CMPU = 161;;
let _MIPS_INS_CMP = 162;;
let _MIPS_INS_COPY_S = 163;;
let _MIPS_INS_COPY_U = 164;;
let _MIPS_INS_CTC1 = 165;;
let _MIPS_INS_CTCMSA = 166;;
let _MIPS_INS_CVT = 167;;
let _MIPS_INS_C = 168;;
let _MIPS_INS_CMPI = 169;;
let _MIPS_INS_DADD = 170;;
let _MIPS_INS_DADDI = 171;;
let _MIPS_INS_DADDIU = 172;;
let _MIPS_INS_DADDU = 173;;
let _MIPS_INS_DAHI = 174;;
let _MIPS_INS_DALIGN = 175;;
let _MIPS_INS_DATI = 176;;
let _MIPS_INS_DAUI = 177;;
let _MIPS_INS_DBITSWAP = 178;;
let _MIPS_INS_DCLO = 179;;
let _MIPS_INS_DCLZ = 180;;
let _MIPS_INS_DDIV = 181;;
let _MIPS_INS_DDIVU = 182;;
let _MIPS_INS_DERET = 183;;
let _MIPS_INS_DEXT = 184;;
let _MIPS_INS_DEXTM = 185;;
let _MIPS_INS_DEXTU = 186;;
let _MIPS_INS_DI = 187;;
let _MIPS_INS_DINS = 188;;
let _MIPS_INS_DINSM = 189;;
let _MIPS_INS_DINSU = 190;;
let _MIPS_INS_DIV = 191;;
let _MIPS_INS_DIVU = 192;;
let _MIPS_INS_DIV_S = 193;;
let _MIPS_INS_DIV_U = 194;;
let _MIPS_INS_DLSA = 195;;
let _MIPS_INS_DMFC0 = 196;;
let _MIPS_INS_DMFC1 = 197;;
let _MIPS_INS_DMFC2 = 198;;
let _MIPS_INS_DMOD = 199;;
let _MIPS_INS_DMODU = 200;;
let _MIPS_INS_DMTC0 = 201;;
let _MIPS_INS_DMTC1 = 202;;
let _MIPS_INS_DMTC2 = 203;;
let _MIPS_INS_DMUH = 204;;
let _MIPS_INS_DMUHU = 205;;
let _MIPS_INS_DMUL = 206;;
let _MIPS_INS_DMULT = 207;;
let _MIPS_INS_DMULTU = 208;;
let _MIPS_INS_DMULU = 209;;
let _MIPS_INS_DOTP_S = 210;;
let _MIPS_INS_DOTP_U = 211;;
let _MIPS_INS_DPADD_S = 212;;
let _MIPS_INS_DPADD_U = 213;;
let _MIPS_INS_DPAQX_SA = 214;;
let _MIPS_INS_DPAQX_S = 215;;
let _MIPS_INS_DPAQ_SA = 216;;
let _MIPS_INS_DPAQ_S = 217;;
let _MIPS_INS_DPAU = 218;;
let _MIPS_INS_DPAX = 219;;
let _MIPS_INS_DPA = 220;;
let _MIPS_INS_DPOP = 221;;
let _MIPS_INS_DPSQX_SA = 222;;
let _MIPS_INS_DPSQX_S = 223;;
let _MIPS_INS_DPSQ_SA = 224;;
let _MIPS_INS_DPSQ_S = 225;;
let _MIPS_INS_DPSUB_S = 226;;
let _MIPS_INS_DPSUB_U = 227;;
let _MIPS_INS_DPSU = 228;;
let _MIPS_INS_DPSX = 229;;
let _MIPS_INS_DPS = 230;;
let _MIPS_INS_DROTR = 231;;
let _MIPS_INS_DROTR32 = 232;;
let _MIPS_INS_DROTRV = 233;;
let _MIPS_INS_DSBH = 234;;
let _MIPS_INS_DSHD = 235;;
let _MIPS_INS_DSLL = 236;;
let _MIPS_INS_DSLL32 = 237;;
let _MIPS_INS_DSLLV = 238;;
let _MIPS_INS_DSRA = 239;;
let _MIPS_INS_DSRA32 = 240;;
let _MIPS_INS_DSRAV = 241;;
let _MIPS_INS_DSRL = 242;;
let _MIPS_INS_DSRL32 = 243;;
let _MIPS_INS_DSRLV = 244;;
let _MIPS_INS_DSUB = 245;;
let _MIPS_INS_DSUBU = 246;;
let _MIPS_INS_EHB = 247;;
let _MIPS_INS_EI = 248;;
let _MIPS_INS_ERET = 249;;
let _MIPS_INS_EXT = 250;;
let _MIPS_INS_EXTP = 251;;
let _MIPS_INS_EXTPDP = 252;;
let _MIPS_INS_EXTPDPV = 253;;
let _MIPS_INS_EXTPV = 254;;
let _MIPS_INS_EXTRV_RS = 255;;
let _MIPS_INS_EXTRV_R = 256;;
let _MIPS_INS_EXTRV_S = 257;;
let _MIPS_INS_EXTRV = 258;;
let _MIPS_INS_EXTR_RS = 259;;
let _MIPS_INS_EXTR_R = 260;;
let _MIPS_INS_EXTR_S = 261;;
let _MIPS_INS_EXTR = 262;;
let _MIPS_INS_EXTS = 263;;
let _MIPS_INS_EXTS32 = 264;;
let _MIPS_INS_ABS = 265;;
let _MIPS_INS_FADD = 266;;
let _MIPS_INS_FCAF = 267;;
let _MIPS_INS_FCEQ = 268;;
let _MIPS_INS_FCLASS = 269;;
let _MIPS_INS_FCLE = 270;;
let _MIPS_INS_FCLT = 271;;
let _MIPS_INS_FCNE = 272;;
let _MIPS_INS_FCOR = 273;;
let _MIPS_INS_FCUEQ = 274;;
let _MIPS_INS_FCULE = 275;;
let _MIPS_INS_FCULT = 276;;
let _MIPS_INS_FCUNE = 277;;
let _MIPS_INS_FCUN = 278;;
let _MIPS_INS_FDIV = 279;;
let _MIPS_INS_FEXDO = 280;;
let _MIPS_INS_FEXP2 = 281;;
let _MIPS_INS_FEXUPL = 282;;
let _MIPS_INS_FEXUPR = 283;;
let _MIPS_INS_FFINT_S = 284;;
let _MIPS_INS_FFINT_U = 285;;
let _MIPS_INS_FFQL = 286;;
let _MIPS_INS_FFQR = 287;;
let _MIPS_INS_FILL = 288;;
let _MIPS_INS_FLOG2 = 289;;
let _MIPS_INS_FLOOR = 290;;
let _MIPS_INS_FMADD = 291;;
let _MIPS_INS_FMAX_A = 292;;
let _MIPS_INS_FMAX = 293;;
let _MIPS_INS_FMIN_A = 294;;
let _MIPS_INS_FMIN = 295;;
let _MIPS_INS_MOV = 296;;
let _MIPS_INS_FMSUB = 297;;
let _MIPS_INS_FMUL = 298;;
let _MIPS_INS_MUL = 299;;
let _MIPS_INS_NEG = 300;;
let _MIPS_INS_FRCP = 301;;
let _MIPS_INS_FRINT = 302;;
let _MIPS_INS_FRSQRT = 303;;
let _MIPS_INS_FSAF = 304;;
let _MIPS_INS_FSEQ = 305;;
let _MIPS_INS_FSLE = 306;;
let _MIPS_INS_FSLT = 307;;
let _MIPS_INS_FSNE = 308;;
let _MIPS_INS_FSOR = 309;;
let _MIPS_INS_FSQRT = 310;;
let _MIPS_INS_SQRT = 311;;
let _MIPS_INS_FSUB = 312;;
let _MIPS_INS_SUB = 313;;
let _MIPS_INS_FSUEQ = 314;;
let _MIPS_INS_FSULE = 315;;
let _MIPS_INS_FSULT = 316;;
let _MIPS_INS_FSUNE = 317;;
let _MIPS_INS_FSUN = 318;;
let _MIPS_INS_FTINT_S = 319;;
let _MIPS_INS_FTINT_U = 320;;
let _MIPS_INS_FTQ = 321;;
let _MIPS_INS_FTRUNC_S = 322;;
let _MIPS_INS_FTRUNC_U = 323;;
let _MIPS_INS_HADD_S = 324;;
let _MIPS_INS_HADD_U = 325;;
let _MIPS_INS_HSUB_S = 326;;
let _MIPS_INS_HSUB_U = 327;;
let _MIPS_INS_ILVEV = 328;;
let _MIPS_INS_ILVL = 329;;
let _MIPS_INS_ILVOD = 330;;
let _MIPS_INS_ILVR = 331;;
let _MIPS_INS_INS = 332;;
let _MIPS_INS_INSERT = 333;;
let _MIPS_INS_INSV = 334;;
let _MIPS_INS_INSVE = 335;;
let _MIPS_INS_J = 336;;
let _MIPS_INS_JAL = 337;;
let _MIPS_INS_JALR = 338;;
let _MIPS_INS_JALRS16 = 339;;
let _MIPS_INS_JALRS = 340;;
let _MIPS_INS_JALS = 341;;
let _MIPS_INS_JALX = 342;;
let _MIPS_INS_JIALC = 343;;
let _MIPS_INS_JIC = 344;;
let _MIPS_INS_JR = 345;;
let _MIPS_INS_JR16 = 346;;
let _MIPS_INS_JRADDIUSP = 347;;
let _MIPS_INS_JRC = 348;;
let _MIPS_INS_JALRC = 349;;
let _MIPS_INS_LB = 350;;
let _MIPS_INS_LBU16 = 351;;
let _MIPS_INS_LBUX = 352;;
let _MIPS_INS_LBU = 353;;
let _MIPS_INS_LD = 354;;
let _MIPS_INS_LDC1 = 355;;
let _MIPS_INS_LDC2 = 356;;
let _MIPS_INS_LDC3 = 357;;
let _MIPS_INS_LDI = 358;;
let _MIPS_INS_LDL = 359;;
let _MIPS_INS_LDPC = 360;;
let _MIPS_INS_LDR = 361;;
let _MIPS_INS_LDXC1 = 362;;
let _MIPS_INS_LH = 363;;
let _MIPS_INS_LHU16 = 364;;
let _MIPS_INS_LHX = 365;;
let _MIPS_INS_LHU = 366;;
let _MIPS_INS_LI16 = 367;;
let _MIPS_INS_LL = 368;;
let _MIPS_INS_LLD = 369;;
let _MIPS_INS_LSA = 370;;
let _MIPS_INS_LUXC1 = 371;;
let _MIPS_INS_LUI = 372;;
let _MIPS_INS_LW = 373;;
let _MIPS_INS_LW16 = 374;;
let _MIPS_INS_LWC1 = 375;;
let _MIPS_INS_LWC2 = 376;;
let _MIPS_INS_LWC3 = 377;;
let _MIPS_INS_LWL = 378;;
let _MIPS_INS_LWM16 = 379;;
let _MIPS_INS_LWM32 = 380;;
let _MIPS_INS_LWPC = 381;;
let _MIPS_INS_LWP = 382;;
let _MIPS_INS_LWR = 383;;
let _MIPS_INS_LWUPC = 384;;
let _MIPS_INS_LWU = 385;;
let _MIPS_INS_LWX = 386;;
let _MIPS_INS_LWXC1 = 387;;
let _MIPS_INS_LWXS = 388;;
let _MIPS_INS_LI = 389;;
let _MIPS_INS_MADD = 390;;
let _MIPS_INS_MADDF = 391;;
let _MIPS_INS_MADDR_Q = 392;;
let _MIPS_INS_MADDU = 393;;
let _MIPS_INS_MADDV = 394;;
let _MIPS_INS_MADD_Q = 395;;
let _MIPS_INS_MAQ_SA = 396;;
let _MIPS_INS_MAQ_S = 397;;
let _MIPS_INS_MAXA = 398;;
let _MIPS_INS_MAXI_S = 399;;
let _MIPS_INS_MAXI_U = 400;;
let _MIPS_INS_MAX_A = 401;;
let _MIPS_INS_MAX = 402;;
let _MIPS_INS_MAX_S = 403;;
let _MIPS_INS_MAX_U = 404;;
let _MIPS_INS_MFC0 = 405;;
let _MIPS_INS_MFC1 = 406;;
let _MIPS_INS_MFC2 = 407;;
let _MIPS_INS_MFHC1 = 408;;
let _MIPS_INS_MFHI = 409;;
let _MIPS_INS_MFLO = 410;;
let _MIPS_INS_MINA = 411;;
let _MIPS_INS_MINI_S = 412;;
let _MIPS_INS_MINI_U = 413;;
let _MIPS_INS_MIN_A = 414;;
let _MIPS_INS_MIN = 415;;
let _MIPS_INS_MIN_S = 416;;
let _MIPS_INS_MIN_U = 417;;
let _MIPS_INS_MOD = 418;;
let _MIPS_INS_MODSUB = 419;;
let _MIPS_INS_MODU = 420;;
let _MIPS_INS_MOD_S = 421;;
let _MIPS_INS_MOD_U = 422;;
let _MIPS_INS_MOVE = 423;;
let _MIPS_INS_MOVEP = 424;;
let _MIPS_INS_MOVF = 425;;
let _MIPS_INS_MOVN = 426;;
let _MIPS_INS_MOVT = 427;;
let _MIPS_INS_MOVZ = 428;;
let _MIPS_INS_MSUB = 429;;
let _MIPS_INS_MSUBF = 430;;
let _MIPS_INS_MSUBR_Q = 431;;
let _MIPS_INS_MSUBU = 432;;
let _MIPS_INS_MSUBV = 433;;
let _MIPS_INS_MSUB_Q = 434;;
let _MIPS_INS_MTC0 = 435;;
let _MIPS_INS_MTC1 = 436;;
let _MIPS_INS_MTC2 = 437;;
let _MIPS_INS_MTHC1 = 438;;
let _MIPS_INS_MTHI = 439;;
let _MIPS_INS_MTHLIP = 440;;
let _MIPS_INS_MTLO = 441;;
let _MIPS_INS_MTM0 = 442;;
let _MIPS_INS_MTM1 = 443;;
let _MIPS_INS_MTM2 = 444;;
let _MIPS_INS_MTP0 = 445;;
let _MIPS_INS_MTP1 = 446;;
let _MIPS_INS_MTP2 = 447;;
let _MIPS_INS_MUH = 448;;
let _MIPS_INS_MUHU = 449;;
let _MIPS_INS_MULEQ_S = 450;;
let _MIPS_INS_MULEU_S = 451;;
let _MIPS_INS_MULQ_RS = 452;;
let _MIPS_INS_MULQ_S = 453;;
let _MIPS_INS_MULR_Q = 454;;
let _MIPS_INS_MULSAQ_S = 455;;
let _MIPS_INS_MULSA = 456;;
let _MIPS_INS_MULT = 457;;
let _MIPS_INS_MULTU = 458;;
let _MIPS_INS_MULU = 459;;
let _MIPS_INS_MULV = 460;;
let _MIPS_INS_MUL_Q = 461;;
let _MIPS_INS_MUL_S = 462;;
let _MIPS_INS_NLOC = 463;;
let _MIPS_INS_NLZC = 464;;
let _MIPS_INS_NMADD = 465;;
let _MIPS_INS_NMSUB = 466;;
let _MIPS_INS_NOR = 467;;
let _MIPS_INS_NORI = 468;;
let _MIPS_INS_NOT16 = 469;;
let _MIPS_INS_NOT = 470;;
let _MIPS_INS_OR = 471;;
let _MIPS_INS_OR16 = 472;;
let _MIPS_INS_ORI = 473;;
let _MIPS_INS_PACKRL = 474;;
let _MIPS_INS_PAUSE = 475;;
let _MIPS_INS_PCKEV = 476;;
let _MIPS_INS_PCKOD = 477;;
let _MIPS_INS_PCNT = 478;;
let _MIPS_INS_PICK = 479;;
let _MIPS_INS_POP = 480;;
let _MIPS_INS_PRECEQU = 481;;
let _MIPS_INS_PRECEQ = 482;;
let _MIPS_INS_PRECEU = 483;;
let _MIPS_INS_PRECRQU_S = 484;;
let _MIPS_INS_PRECRQ = 485;;
let _MIPS_INS_PRECRQ_RS = 486;;
let _MIPS_INS_PRECR = 487;;
let _MIPS_INS_PRECR_SRA = 488;;
let _MIPS_INS_PRECR_SRA_R = 489;;
let _MIPS_INS_PREF = 490;;
let _MIPS_INS_PREPEND = 491;;
let _MIPS_INS_RADDU = 492;;
let _MIPS_INS_RDDSP = 493;;
let _MIPS_INS_RDHWR = 494;;
let _MIPS_INS_REPLV = 495;;
let _MIPS_INS_REPL = 496;;
let _MIPS_INS_RINT = 497;;
let _MIPS_INS_ROTR = 498;;
let _MIPS_INS_ROTRV = 499;;
let _MIPS_INS_ROUND = 500;;
let _MIPS_INS_SAT_S = 501;;
let _MIPS_INS_SAT_U = 502;;
let _MIPS_INS_SB = 503;;
let _MIPS_INS_SB16 = 504;;
let _MIPS_INS_SC = 505;;
let _MIPS_INS_SCD = 506;;
let _MIPS_INS_SD = 507;;
let _MIPS_INS_SDBBP = 508;;
let _MIPS_INS_SDBBP16 = 509;;
let _MIPS_INS_SDC1 = 510;;
let _MIPS_INS_SDC2 = 511;;
let _MIPS_INS_SDC3 = 512;;
let _MIPS_INS_SDL = 513;;
let _MIPS_INS_SDR = 514;;
let _MIPS_INS_SDXC1 = 515;;
let _MIPS_INS_SEB = 516;;
let _MIPS_INS_SEH = 517;;
let _MIPS_INS_SELEQZ = 518;;
let _MIPS_INS_SELNEZ = 519;;
let _MIPS_INS_SEL = 520;;
let _MIPS_INS_SEQ = 521;;
let _MIPS_INS_SEQI = 522;;
let _MIPS_INS_SH = 523;;
let _MIPS_INS_SH16 = 524;;
let _MIPS_INS_SHF = 525;;
let _MIPS_INS_SHILO = 526;;
let _MIPS_INS_SHILOV = 527;;
let _MIPS_INS_SHLLV = 528;;
let _MIPS_INS_SHLLV_S = 529;;
let _MIPS_INS_SHLL = 530;;
let _MIPS_INS_SHLL_S = 531;;
let _MIPS_INS_SHRAV = 532;;
let _MIPS_INS_SHRAV_R = 533;;
let _MIPS_INS_SHRA = 534;;
let _MIPS_INS_SHRA_R = 535;;
let _MIPS_INS_SHRLV = 536;;
let _MIPS_INS_SHRL = 537;;
let _MIPS_INS_SLDI = 538;;
let _MIPS_INS_SLD = 539;;
let _MIPS_INS_SLL = 540;;
let _MIPS_INS_SLL16 = 541;;
let _MIPS_INS_SLLI = 542;;
let _MIPS_INS_SLLV = 543;;
let _MIPS_INS_SLT = 544;;
let _MIPS_INS_SLTI = 545;;
let _MIPS_INS_SLTIU = 546;;
let _MIPS_INS_SLTU = 547;;
let _MIPS_INS_SNE = 548;;
let _MIPS_INS_SNEI = 549;;
let _MIPS_INS_SPLATI = 550;;
let _MIPS_INS_SPLAT = 551;;
let _MIPS_INS_SRA = 552;;
let _MIPS_INS_SRAI = 553;;
let _MIPS_INS_SRARI = 554;;
let _MIPS_INS_SRAR = 555;;
let _MIPS_INS_SRAV = 556;;
let _MIPS_INS_SRL = 557;;
let _MIPS_INS_SRL16 = 558;;
let _MIPS_INS_SRLI = 559;;
let _MIPS_INS_SRLRI = 560;;
let _MIPS_INS_SRLR = 561;;
let _MIPS_INS_SRLV = 562;;
let _MIPS_INS_SSNOP = 563;;
let _MIPS_INS_ST = 564;;
let _MIPS_INS_SUBQH = 565;;
let _MIPS_INS_SUBQH_R = 566;;
let _MIPS_INS_SUBQ = 567;;
let _MIPS_INS_SUBQ_S = 568;;
let _MIPS_INS_SUBSUS_U = 569;;
let _MIPS_INS_SUBSUU_S = 570;;
let _MIPS_INS_SUBS_S = 571;;
let _MIPS_INS_SUBS_U = 572;;
let _MIPS_INS_SUBU16 = 573;;
let _MIPS_INS_SUBUH = 574;;
let _MIPS_INS_SUBUH_R = 575;;
let _MIPS_INS_SUBU = 576;;
let _MIPS_INS_SUBU_S = 577;;
let _MIPS_INS_SUBVI = 578;;
let _MIPS_INS_SUBV = 579;;
let _MIPS_INS_SUXC1 = 580;;
let _MIPS_INS_SW = 581;;
let _MIPS_INS_SW16 = 582;;
let _MIPS_INS_SWC1 = 583;;
let _MIPS_INS_SWC2 = 584;;
let _MIPS_INS_SWC3 = 585;;
let _MIPS_INS_SWL = 586;;
let _MIPS_INS_SWM16 = 587;;
let _MIPS_INS_SWM32 = 588;;
let _MIPS_INS_SWP = 589;;
let _MIPS_INS_SWR = 590;;
let _MIPS_INS_SWXC1 = 591;;
let _MIPS_INS_SYNC = 592;;
let _MIPS_INS_SYNCI = 593;;
let _MIPS_INS_SYSCALL = 594;;
let _MIPS_INS_TEQ = 595;;
let _MIPS_INS_TEQI = 596;;
let _MIPS_INS_TGE = 597;;
let _MIPS_INS_TGEI = 598;;
let _MIPS_INS_TGEIU = 599;;
let _MIPS_INS_TGEU = 600;;
let _MIPS_INS_TLBP = 601;;
let _MIPS_INS_TLBR = 602;;
let _MIPS_INS_TLBWI = 603;;
let _MIPS_INS_TLBWR = 604;;
let _MIPS_INS_TLT = 605;;
let _MIPS_INS_TLTI = 606;;
let _MIPS_INS_TLTIU = 607;;
let _MIPS_INS_TLTU = 608;;
let _MIPS_INS_TNE = 609;;
let _MIPS_INS_TNEI = 610;;
let _MIPS_INS_TRUNC = 611;;
let _MIPS_INS_V3MULU = 612;;
let _MIPS_INS_VMM0 = 613;;
let _MIPS_INS_VMULU = 614;;
let _MIPS_INS_VSHF = 615;;
let _MIPS_INS_WAIT = 616;;
let _MIPS_INS_WRDSP = 617;;
let _MIPS_INS_WSBH = 618;;
let _MIPS_INS_XOR = 619;;
let _MIPS_INS_XOR16 = 620;;
let _MIPS_INS_XORI = 621;;
(* some alias instructions *)
let _MIPS_INS_NOP = 622;;
let _MIPS_INS_NEGU = 623;;
(* special instructions *)
let _MIPS_INS_JALR_HB = 624;;
let _MIPS_INS_JR_HB = 625;;
let _MIPS_INS_ENDING = 626;;
let _MIPS_GRP_INVALID = 0;;
let _MIPS_GRP_JUMP = 1;;
let _MIPS_GRP_CALL = 2;;
let _MIPS_GRP_RET = 3;;
let _MIPS_GRP_INT = 4;;
let _MIPS_GRP_IRET = 5;;
let _MIPS_GRP_PRIVILEGE = 6;;
let _MIPS_GRP_BRANCH_RELATIVE = 7;;
let _MIPS_GRP_BITCOUNT = 128;;
let _MIPS_GRP_DSP = 129;;
let _MIPS_GRP_DSPR2 = 130;;
let _MIPS_GRP_FPIDX = 131;;
let _MIPS_GRP_MSA = 132;;
let _MIPS_GRP_MIPS32R2 = 133;;
let _MIPS_GRP_MIPS64 = 134;;
let _MIPS_GRP_MIPS64R2 = 135;;
let _MIPS_GRP_SEINREG = 136;;
let _MIPS_GRP_STDENC = 137;;
let _MIPS_GRP_SWAP = 138;;
let _MIPS_GRP_MICROMIPS = 139;;
let _MIPS_GRP_MIPS16MODE = 140;;
let _MIPS_GRP_FP64BIT = 141;;
let _MIPS_GRP_NONANSFPMATH = 142;;
let _MIPS_GRP_NOTFP64BIT = 143;;
let _MIPS_GRP_NOTINMICROMIPS = 144;;
let _MIPS_GRP_NOTNACL = 145;;
let _MIPS_GRP_NOTMIPS32R6 = 146;;
let _MIPS_GRP_NOTMIPS64R6 = 147;;
let _MIPS_GRP_CNMIPS = 148;;
let _MIPS_GRP_MIPS32 = 149;;
let _MIPS_GRP_MIPS32R6 = 150;;
let _MIPS_GRP_MIPS64R6 = 151;;
let _MIPS_GRP_MIPS2 = 152;;
let _MIPS_GRP_MIPS3 = 153;;
let _MIPS_GRP_MIPS3_32 = 154;;
let _MIPS_GRP_MIPS3_32R2 = 155;;
let _MIPS_GRP_MIPS4_32 = 156;;
let _MIPS_GRP_MIPS4_32R2 = 157;;
let _MIPS_GRP_MIPS5_32R2 = 158;;
let _MIPS_GRP_GP32BIT = 159;;
let _MIPS_GRP_GP64BIT = 160;;
let _MIPS_GRP_ENDING = 161;;

1104
thirdparty/capstone/bindings/ocaml/ocaml.c vendored Normal file
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34
thirdparty/capstone/bindings/ocaml/ppc.ml vendored Normal file
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(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Ppc_const
type ppc_op_mem = {
base: int;
disp: int;
}
type ppc_op_crx = {
scale: int;
reg: int;
cond: int;
}
type ppc_op_value =
| PPC_OP_INVALID of int
| PPC_OP_REG of int
| PPC_OP_IMM of int
| PPC_OP_MEM of ppc_op_mem
| PPC_OP_CRX of ppc_op_crx
type ppc_op = {
value: ppc_op_value;
}
type cs_ppc = {
bc: int;
bh: int;
update_cr0: bool;
operands: ppc_op array;
}

2015
thirdparty/capstone/bindings/ocaml/ppc_const.ml vendored Normal file
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27
thirdparty/capstone/bindings/ocaml/sparc.ml vendored Normal file
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(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Sparc_const
type sparc_op_mem = {
base: int;
index: int;
disp: int;
}
type sparc_op_value =
| SPARC_OP_INVALID of int
| SPARC_OP_REG of int
| SPARC_OP_IMM of int
| SPARC_OP_MEM of sparc_op_mem
type sparc_op = {
value: sparc_op_value;
}
type cs_sparc = {
cc: int;
hint: int;
operands: sparc_op array;
}

429
thirdparty/capstone/bindings/ocaml/sparc_const.ml vendored Normal file
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(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.ml] *)
let _SPARC_CC_INVALID = 0;;
let _SPARC_CC_ICC_A = 8+256;;
let _SPARC_CC_ICC_N = 0+256;;
let _SPARC_CC_ICC_NE = 9+256;;
let _SPARC_CC_ICC_E = 1+256;;
let _SPARC_CC_ICC_G = 10+256;;
let _SPARC_CC_ICC_LE = 2+256;;
let _SPARC_CC_ICC_GE = 11+256;;
let _SPARC_CC_ICC_L = 3+256;;
let _SPARC_CC_ICC_GU = 12+256;;
let _SPARC_CC_ICC_LEU = 4+256;;
let _SPARC_CC_ICC_CC = 13+256;;
let _SPARC_CC_ICC_CS = 5+256;;
let _SPARC_CC_ICC_POS = 14+256;;
let _SPARC_CC_ICC_NEG = 6+256;;
let _SPARC_CC_ICC_VC = 15+256;;
let _SPARC_CC_ICC_VS = 7+256;;
let _SPARC_CC_FCC_A = 8+16+256;;
let _SPARC_CC_FCC_N = 0+16+256;;
let _SPARC_CC_FCC_U = 7+16+256;;
let _SPARC_CC_FCC_G = 6+16+256;;
let _SPARC_CC_FCC_UG = 5+16+256;;
let _SPARC_CC_FCC_L = 4+16+256;;
let _SPARC_CC_FCC_UL = 3+16+256;;
let _SPARC_CC_FCC_LG = 2+16+256;;
let _SPARC_CC_FCC_NE = 1+16+256;;
let _SPARC_CC_FCC_E = 9+16+256;;
let _SPARC_CC_FCC_UE = 10+16+256;;
let _SPARC_CC_FCC_GE = 11+16+256;;
let _SPARC_CC_FCC_UGE = 12+16+256;;
let _SPARC_CC_FCC_LE = 13+16+256;;
let _SPARC_CC_FCC_ULE = 14+16+256;;
let _SPARC_CC_FCC_O = 15+16+256;;
let _SPARC_HINT_INVALID = 0;;
let _SPARC_HINT_A = 1 lsl 0;;
let _SPARC_HINT_PT = 1 lsl 1;;
let _SPARC_HINT_PN = 1 lsl 2;;
let _SPARC_OP_INVALID = 0;;
let _SPARC_OP_REG = 1;;
let _SPARC_OP_IMM = 2;;
let _SPARC_OP_MEM = 3;;
let _SPARC_REG_INVALID = 0;;
let _SPARC_REG_F0 = 1;;
let _SPARC_REG_F1 = 2;;
let _SPARC_REG_F2 = 3;;
let _SPARC_REG_F3 = 4;;
let _SPARC_REG_F4 = 5;;
let _SPARC_REG_F5 = 6;;
let _SPARC_REG_F6 = 7;;
let _SPARC_REG_F7 = 8;;
let _SPARC_REG_F8 = 9;;
let _SPARC_REG_F9 = 10;;
let _SPARC_REG_F10 = 11;;
let _SPARC_REG_F11 = 12;;
let _SPARC_REG_F12 = 13;;
let _SPARC_REG_F13 = 14;;
let _SPARC_REG_F14 = 15;;
let _SPARC_REG_F15 = 16;;
let _SPARC_REG_F16 = 17;;
let _SPARC_REG_F17 = 18;;
let _SPARC_REG_F18 = 19;;
let _SPARC_REG_F19 = 20;;
let _SPARC_REG_F20 = 21;;
let _SPARC_REG_F21 = 22;;
let _SPARC_REG_F22 = 23;;
let _SPARC_REG_F23 = 24;;
let _SPARC_REG_F24 = 25;;
let _SPARC_REG_F25 = 26;;
let _SPARC_REG_F26 = 27;;
let _SPARC_REG_F27 = 28;;
let _SPARC_REG_F28 = 29;;
let _SPARC_REG_F29 = 30;;
let _SPARC_REG_F30 = 31;;
let _SPARC_REG_F31 = 32;;
let _SPARC_REG_F32 = 33;;
let _SPARC_REG_F34 = 34;;
let _SPARC_REG_F36 = 35;;
let _SPARC_REG_F38 = 36;;
let _SPARC_REG_F40 = 37;;
let _SPARC_REG_F42 = 38;;
let _SPARC_REG_F44 = 39;;
let _SPARC_REG_F46 = 40;;
let _SPARC_REG_F48 = 41;;
let _SPARC_REG_F50 = 42;;
let _SPARC_REG_F52 = 43;;
let _SPARC_REG_F54 = 44;;
let _SPARC_REG_F56 = 45;;
let _SPARC_REG_F58 = 46;;
let _SPARC_REG_F60 = 47;;
let _SPARC_REG_F62 = 48;;
let _SPARC_REG_FCC0 = 49;;
let _SPARC_REG_FCC1 = 50;;
let _SPARC_REG_FCC2 = 51;;
let _SPARC_REG_FCC3 = 52;;
let _SPARC_REG_FP = 53;;
let _SPARC_REG_G0 = 54;;
let _SPARC_REG_G1 = 55;;
let _SPARC_REG_G2 = 56;;
let _SPARC_REG_G3 = 57;;
let _SPARC_REG_G4 = 58;;
let _SPARC_REG_G5 = 59;;
let _SPARC_REG_G6 = 60;;
let _SPARC_REG_G7 = 61;;
let _SPARC_REG_I0 = 62;;
let _SPARC_REG_I1 = 63;;
let _SPARC_REG_I2 = 64;;
let _SPARC_REG_I3 = 65;;
let _SPARC_REG_I4 = 66;;
let _SPARC_REG_I5 = 67;;
let _SPARC_REG_I7 = 68;;
let _SPARC_REG_ICC = 69;;
let _SPARC_REG_L0 = 70;;
let _SPARC_REG_L1 = 71;;
let _SPARC_REG_L2 = 72;;
let _SPARC_REG_L3 = 73;;
let _SPARC_REG_L4 = 74;;
let _SPARC_REG_L5 = 75;;
let _SPARC_REG_L6 = 76;;
let _SPARC_REG_L7 = 77;;
let _SPARC_REG_O0 = 78;;
let _SPARC_REG_O1 = 79;;
let _SPARC_REG_O2 = 80;;
let _SPARC_REG_O3 = 81;;
let _SPARC_REG_O4 = 82;;
let _SPARC_REG_O5 = 83;;
let _SPARC_REG_O7 = 84;;
let _SPARC_REG_SP = 85;;
let _SPARC_REG_Y = 86;;
let _SPARC_REG_XCC = 87;;
let _SPARC_REG_ENDING = 88;;
let _SPARC_REG_O6 = _SPARC_REG_SP;;
let _SPARC_REG_I6 = _SPARC_REG_FP;;
let _SPARC_INS_INVALID = 0;;
let _SPARC_INS_ADDCC = 1;;
let _SPARC_INS_ADDX = 2;;
let _SPARC_INS_ADDXCC = 3;;
let _SPARC_INS_ADDXC = 4;;
let _SPARC_INS_ADDXCCC = 5;;
let _SPARC_INS_ADD = 6;;
let _SPARC_INS_ALIGNADDR = 7;;
let _SPARC_INS_ALIGNADDRL = 8;;
let _SPARC_INS_ANDCC = 9;;
let _SPARC_INS_ANDNCC = 10;;
let _SPARC_INS_ANDN = 11;;
let _SPARC_INS_AND = 12;;
let _SPARC_INS_ARRAY16 = 13;;
let _SPARC_INS_ARRAY32 = 14;;
let _SPARC_INS_ARRAY8 = 15;;
let _SPARC_INS_B = 16;;
let _SPARC_INS_JMP = 17;;
let _SPARC_INS_BMASK = 18;;
let _SPARC_INS_FB = 19;;
let _SPARC_INS_BRGEZ = 20;;
let _SPARC_INS_BRGZ = 21;;
let _SPARC_INS_BRLEZ = 22;;
let _SPARC_INS_BRLZ = 23;;
let _SPARC_INS_BRNZ = 24;;
let _SPARC_INS_BRZ = 25;;
let _SPARC_INS_BSHUFFLE = 26;;
let _SPARC_INS_CALL = 27;;
let _SPARC_INS_CASX = 28;;
let _SPARC_INS_CAS = 29;;
let _SPARC_INS_CMASK16 = 30;;
let _SPARC_INS_CMASK32 = 31;;
let _SPARC_INS_CMASK8 = 32;;
let _SPARC_INS_CMP = 33;;
let _SPARC_INS_EDGE16 = 34;;
let _SPARC_INS_EDGE16L = 35;;
let _SPARC_INS_EDGE16LN = 36;;
let _SPARC_INS_EDGE16N = 37;;
let _SPARC_INS_EDGE32 = 38;;
let _SPARC_INS_EDGE32L = 39;;
let _SPARC_INS_EDGE32LN = 40;;
let _SPARC_INS_EDGE32N = 41;;
let _SPARC_INS_EDGE8 = 42;;
let _SPARC_INS_EDGE8L = 43;;
let _SPARC_INS_EDGE8LN = 44;;
let _SPARC_INS_EDGE8N = 45;;
let _SPARC_INS_FABSD = 46;;
let _SPARC_INS_FABSQ = 47;;
let _SPARC_INS_FABSS = 48;;
let _SPARC_INS_FADDD = 49;;
let _SPARC_INS_FADDQ = 50;;
let _SPARC_INS_FADDS = 51;;
let _SPARC_INS_FALIGNDATA = 52;;
let _SPARC_INS_FAND = 53;;
let _SPARC_INS_FANDNOT1 = 54;;
let _SPARC_INS_FANDNOT1S = 55;;
let _SPARC_INS_FANDNOT2 = 56;;
let _SPARC_INS_FANDNOT2S = 57;;
let _SPARC_INS_FANDS = 58;;
let _SPARC_INS_FCHKSM16 = 59;;
let _SPARC_INS_FCMPD = 60;;
let _SPARC_INS_FCMPEQ16 = 61;;
let _SPARC_INS_FCMPEQ32 = 62;;
let _SPARC_INS_FCMPGT16 = 63;;
let _SPARC_INS_FCMPGT32 = 64;;
let _SPARC_INS_FCMPLE16 = 65;;
let _SPARC_INS_FCMPLE32 = 66;;
let _SPARC_INS_FCMPNE16 = 67;;
let _SPARC_INS_FCMPNE32 = 68;;
let _SPARC_INS_FCMPQ = 69;;
let _SPARC_INS_FCMPS = 70;;
let _SPARC_INS_FDIVD = 71;;
let _SPARC_INS_FDIVQ = 72;;
let _SPARC_INS_FDIVS = 73;;
let _SPARC_INS_FDMULQ = 74;;
let _SPARC_INS_FDTOI = 75;;
let _SPARC_INS_FDTOQ = 76;;
let _SPARC_INS_FDTOS = 77;;
let _SPARC_INS_FDTOX = 78;;
let _SPARC_INS_FEXPAND = 79;;
let _SPARC_INS_FHADDD = 80;;
let _SPARC_INS_FHADDS = 81;;
let _SPARC_INS_FHSUBD = 82;;
let _SPARC_INS_FHSUBS = 83;;
let _SPARC_INS_FITOD = 84;;
let _SPARC_INS_FITOQ = 85;;
let _SPARC_INS_FITOS = 86;;
let _SPARC_INS_FLCMPD = 87;;
let _SPARC_INS_FLCMPS = 88;;
let _SPARC_INS_FLUSHW = 89;;
let _SPARC_INS_FMEAN16 = 90;;
let _SPARC_INS_FMOVD = 91;;
let _SPARC_INS_FMOVQ = 92;;
let _SPARC_INS_FMOVRDGEZ = 93;;
let _SPARC_INS_FMOVRQGEZ = 94;;
let _SPARC_INS_FMOVRSGEZ = 95;;
let _SPARC_INS_FMOVRDGZ = 96;;
let _SPARC_INS_FMOVRQGZ = 97;;
let _SPARC_INS_FMOVRSGZ = 98;;
let _SPARC_INS_FMOVRDLEZ = 99;;
let _SPARC_INS_FMOVRQLEZ = 100;;
let _SPARC_INS_FMOVRSLEZ = 101;;
let _SPARC_INS_FMOVRDLZ = 102;;
let _SPARC_INS_FMOVRQLZ = 103;;
let _SPARC_INS_FMOVRSLZ = 104;;
let _SPARC_INS_FMOVRDNZ = 105;;
let _SPARC_INS_FMOVRQNZ = 106;;
let _SPARC_INS_FMOVRSNZ = 107;;
let _SPARC_INS_FMOVRDZ = 108;;
let _SPARC_INS_FMOVRQZ = 109;;
let _SPARC_INS_FMOVRSZ = 110;;
let _SPARC_INS_FMOVS = 111;;
let _SPARC_INS_FMUL8SUX16 = 112;;
let _SPARC_INS_FMUL8ULX16 = 113;;
let _SPARC_INS_FMUL8X16 = 114;;
let _SPARC_INS_FMUL8X16AL = 115;;
let _SPARC_INS_FMUL8X16AU = 116;;
let _SPARC_INS_FMULD = 117;;
let _SPARC_INS_FMULD8SUX16 = 118;;
let _SPARC_INS_FMULD8ULX16 = 119;;
let _SPARC_INS_FMULQ = 120;;
let _SPARC_INS_FMULS = 121;;
let _SPARC_INS_FNADDD = 122;;
let _SPARC_INS_FNADDS = 123;;
let _SPARC_INS_FNAND = 124;;
let _SPARC_INS_FNANDS = 125;;
let _SPARC_INS_FNEGD = 126;;
let _SPARC_INS_FNEGQ = 127;;
let _SPARC_INS_FNEGS = 128;;
let _SPARC_INS_FNHADDD = 129;;
let _SPARC_INS_FNHADDS = 130;;
let _SPARC_INS_FNOR = 131;;
let _SPARC_INS_FNORS = 132;;
let _SPARC_INS_FNOT1 = 133;;
let _SPARC_INS_FNOT1S = 134;;
let _SPARC_INS_FNOT2 = 135;;
let _SPARC_INS_FNOT2S = 136;;
let _SPARC_INS_FONE = 137;;
let _SPARC_INS_FONES = 138;;
let _SPARC_INS_FOR = 139;;
let _SPARC_INS_FORNOT1 = 140;;
let _SPARC_INS_FORNOT1S = 141;;
let _SPARC_INS_FORNOT2 = 142;;
let _SPARC_INS_FORNOT2S = 143;;
let _SPARC_INS_FORS = 144;;
let _SPARC_INS_FPACK16 = 145;;
let _SPARC_INS_FPACK32 = 146;;
let _SPARC_INS_FPACKFIX = 147;;
let _SPARC_INS_FPADD16 = 148;;
let _SPARC_INS_FPADD16S = 149;;
let _SPARC_INS_FPADD32 = 150;;
let _SPARC_INS_FPADD32S = 151;;
let _SPARC_INS_FPADD64 = 152;;
let _SPARC_INS_FPMERGE = 153;;
let _SPARC_INS_FPSUB16 = 154;;
let _SPARC_INS_FPSUB16S = 155;;
let _SPARC_INS_FPSUB32 = 156;;
let _SPARC_INS_FPSUB32S = 157;;
let _SPARC_INS_FQTOD = 158;;
let _SPARC_INS_FQTOI = 159;;
let _SPARC_INS_FQTOS = 160;;
let _SPARC_INS_FQTOX = 161;;
let _SPARC_INS_FSLAS16 = 162;;
let _SPARC_INS_FSLAS32 = 163;;
let _SPARC_INS_FSLL16 = 164;;
let _SPARC_INS_FSLL32 = 165;;
let _SPARC_INS_FSMULD = 166;;
let _SPARC_INS_FSQRTD = 167;;
let _SPARC_INS_FSQRTQ = 168;;
let _SPARC_INS_FSQRTS = 169;;
let _SPARC_INS_FSRA16 = 170;;
let _SPARC_INS_FSRA32 = 171;;
let _SPARC_INS_FSRC1 = 172;;
let _SPARC_INS_FSRC1S = 173;;
let _SPARC_INS_FSRC2 = 174;;
let _SPARC_INS_FSRC2S = 175;;
let _SPARC_INS_FSRL16 = 176;;
let _SPARC_INS_FSRL32 = 177;;
let _SPARC_INS_FSTOD = 178;;
let _SPARC_INS_FSTOI = 179;;
let _SPARC_INS_FSTOQ = 180;;
let _SPARC_INS_FSTOX = 181;;
let _SPARC_INS_FSUBD = 182;;
let _SPARC_INS_FSUBQ = 183;;
let _SPARC_INS_FSUBS = 184;;
let _SPARC_INS_FXNOR = 185;;
let _SPARC_INS_FXNORS = 186;;
let _SPARC_INS_FXOR = 187;;
let _SPARC_INS_FXORS = 188;;
let _SPARC_INS_FXTOD = 189;;
let _SPARC_INS_FXTOQ = 190;;
let _SPARC_INS_FXTOS = 191;;
let _SPARC_INS_FZERO = 192;;
let _SPARC_INS_FZEROS = 193;;
let _SPARC_INS_JMPL = 194;;
let _SPARC_INS_LDD = 195;;
let _SPARC_INS_LD = 196;;
let _SPARC_INS_LDQ = 197;;
let _SPARC_INS_LDSB = 198;;
let _SPARC_INS_LDSH = 199;;
let _SPARC_INS_LDSW = 200;;
let _SPARC_INS_LDUB = 201;;
let _SPARC_INS_LDUH = 202;;
let _SPARC_INS_LDX = 203;;
let _SPARC_INS_LZCNT = 204;;
let _SPARC_INS_MEMBAR = 205;;
let _SPARC_INS_MOVDTOX = 206;;
let _SPARC_INS_MOV = 207;;
let _SPARC_INS_MOVRGEZ = 208;;
let _SPARC_INS_MOVRGZ = 209;;
let _SPARC_INS_MOVRLEZ = 210;;
let _SPARC_INS_MOVRLZ = 211;;
let _SPARC_INS_MOVRNZ = 212;;
let _SPARC_INS_MOVRZ = 213;;
let _SPARC_INS_MOVSTOSW = 214;;
let _SPARC_INS_MOVSTOUW = 215;;
let _SPARC_INS_MULX = 216;;
let _SPARC_INS_NOP = 217;;
let _SPARC_INS_ORCC = 218;;
let _SPARC_INS_ORNCC = 219;;
let _SPARC_INS_ORN = 220;;
let _SPARC_INS_OR = 221;;
let _SPARC_INS_PDIST = 222;;
let _SPARC_INS_PDISTN = 223;;
let _SPARC_INS_POPC = 224;;
let _SPARC_INS_RD = 225;;
let _SPARC_INS_RESTORE = 226;;
let _SPARC_INS_RETT = 227;;
let _SPARC_INS_SAVE = 228;;
let _SPARC_INS_SDIVCC = 229;;
let _SPARC_INS_SDIVX = 230;;
let _SPARC_INS_SDIV = 231;;
let _SPARC_INS_SETHI = 232;;
let _SPARC_INS_SHUTDOWN = 233;;
let _SPARC_INS_SIAM = 234;;
let _SPARC_INS_SLLX = 235;;
let _SPARC_INS_SLL = 236;;
let _SPARC_INS_SMULCC = 237;;
let _SPARC_INS_SMUL = 238;;
let _SPARC_INS_SRAX = 239;;
let _SPARC_INS_SRA = 240;;
let _SPARC_INS_SRLX = 241;;
let _SPARC_INS_SRL = 242;;
let _SPARC_INS_STBAR = 243;;
let _SPARC_INS_STB = 244;;
let _SPARC_INS_STD = 245;;
let _SPARC_INS_ST = 246;;
let _SPARC_INS_STH = 247;;
let _SPARC_INS_STQ = 248;;
let _SPARC_INS_STX = 249;;
let _SPARC_INS_SUBCC = 250;;
let _SPARC_INS_SUBX = 251;;
let _SPARC_INS_SUBXCC = 252;;
let _SPARC_INS_SUB = 253;;
let _SPARC_INS_SWAP = 254;;
let _SPARC_INS_TADDCCTV = 255;;
let _SPARC_INS_TADDCC = 256;;
let _SPARC_INS_T = 257;;
let _SPARC_INS_TSUBCCTV = 258;;
let _SPARC_INS_TSUBCC = 259;;
let _SPARC_INS_UDIVCC = 260;;
let _SPARC_INS_UDIVX = 261;;
let _SPARC_INS_UDIV = 262;;
let _SPARC_INS_UMULCC = 263;;
let _SPARC_INS_UMULXHI = 264;;
let _SPARC_INS_UMUL = 265;;
let _SPARC_INS_UNIMP = 266;;
let _SPARC_INS_FCMPED = 267;;
let _SPARC_INS_FCMPEQ = 268;;
let _SPARC_INS_FCMPES = 269;;
let _SPARC_INS_WR = 270;;
let _SPARC_INS_XMULX = 271;;
let _SPARC_INS_XMULXHI = 272;;
let _SPARC_INS_XNORCC = 273;;
let _SPARC_INS_XNOR = 274;;
let _SPARC_INS_XORCC = 275;;
let _SPARC_INS_XOR = 276;;
let _SPARC_INS_RET = 277;;
let _SPARC_INS_RETL = 278;;
let _SPARC_INS_ENDING = 279;;
let _SPARC_GRP_INVALID = 0;;
let _SPARC_GRP_JUMP = 1;;
let _SPARC_GRP_HARDQUAD = 128;;
let _SPARC_GRP_V9 = 129;;
let _SPARC_GRP_VIS = 130;;
let _SPARC_GRP_VIS2 = 131;;
let _SPARC_GRP_VIS3 = 132;;
let _SPARC_GRP_32BIT = 133;;
let _SPARC_GRP_64BIT = 134;;
let _SPARC_GRP_ENDING = 135;;

27
thirdparty/capstone/bindings/ocaml/systemz.ml vendored Normal file
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(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Sysz_const
type sysz_op_mem = {
base: int;
index: int;
length: int64;
disp: int64;
}
type sysz_op_value =
| SYSZ_OP_INVALID of int
| SYSZ_OP_REG of int
| SYSZ_OP_ACREG of int
| SYSZ_OP_IMM of int
| SYSZ_OP_MEM of sysz_op_mem
type sysz_op = {
value: sysz_op_value;
}
type cs_sysz = {
cc: int;
operands: sysz_op array;
}

2523
thirdparty/capstone/bindings/ocaml/sysz_const.ml vendored Normal file
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105
thirdparty/capstone/bindings/ocaml/test_arm.ml vendored Normal file
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@@ -0,0 +1,105 @@
(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open Capstone
open Arm
open Arm_const
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
let _ARM_CODE2 = "\xd1\xe8\x00\xf0\xf0\x24\x04\x07\x1f\x3c\xf2\xc0\x00\x00\x4f\xf0\x00\x01\x46\x6c";;
let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0";;
let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68\x1f\xb1";;
let all_tests = [
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM");
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "Thumb");
(CS_ARCH_ARM, [CS_MODE_THUMB], _ARM_CODE2, "Thumb-mixed");
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "Thumb-2");
];;
let print_op handle i op =
( match op.value with
| ARM_OP_INVALID _ -> (); (* this would never happens *)
| ARM_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| ARM_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm;
| ARM_OP_PIMM imm -> printf "\t\top[%d]: P-IMM = %u\n" i imm;
| ARM_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| ARM_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp;
| ARM_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
if mem.scale != 1 then
printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale;
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
if mem.lshift != 0 then
printf "\t\t\toperands[%u].mem.lshift: 0x%x\n" i mem.lshift;
);
| ARM_OP_SETEND sd -> printf "\t\top[%d]: SETEND = %u\n" i sd;
);
if op.shift.shift_type != _ARM_SFT_INVALID && op.shift.shift_value > 0 then
printf "\t\t\tShift: type = %u, value = %u\n"
op.shift.shift_type op.shift.shift_value;
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_ARM arm -> (
if arm.cc != _ARM_CC_AL && arm.cc != _ARM_CC_INVALID then
printf "\tCode condition: %u\n" arm.cc;
if arm.update_flags then
printf "\tUpdate-flags: True\n";
if arm.writeback then
printf "\tWriteback: True\n";
(* print all operands info (type & value) *)
if (Array.length arm.operands) > 0 then (
printf "\top_count: %d\n" (Array.length arm.operands);
Array.iteri (print_op handle) arm.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;

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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open Capstone
open Arm64
open Arm64_const
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b";;
let all_tests = [
(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64");
];;
let print_op handle i op =
( match op.value with
| ARM64_OP_INVALID _ -> (); (* this would never happens *)
| ARM64_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| ARM64_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm;
| ARM64_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| ARM64_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp;
| ARM64_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
| ARM64_OP_REG_MRS reg -> printf "\t\top[%d]: REG_MRS = %u\n" i reg;
| ARM64_OP_REG_MSR reg -> printf "\t\top[%d]: REG_MSR = %u\n" i reg;
| ARM64_OP_PSTATE v -> printf "\t\top[%d]: PSTATE = %u\n" i v;
| ARM64_OP_SYS v -> printf "\t\top[%d]: SYS = %u\n" i v;
| ARM64_OP_PREFETCH v -> printf "\t\top[%d]: PREFETCH = %u\n" i v;
| ARM64_OP_BARRIER v -> printf "\t\top[%d]: BARRIER = %u\n" i v;
);
if op.shift.shift_type != _ARM64_SFT_INVALID && op.shift.shift_value > 0 then
printf "\t\t\tShift: type = %u, value = %u\n"
op.shift.shift_type op.shift.shift_value;
if op.ext != _ARM64_EXT_INVALID then
printf "\t\t\tExt: %u\n" op.ext;
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_ARM64 arm64 -> (
if arm64.cc != _ARM64_CC_AL && arm64.cc != _ARM64_CC_INVALID then
printf "\tCode condition: %u\n" arm64.cc;
if arm64.update_flags then
printf "\tUpdate-flags: True\n";
if arm64.writeback then
printf "\tWriteback: True\n";
(* print all operands info (type & value) *)
if (Array.length arm64.operands) > 0 then (
printf "\top_count: %d\n" (Array.length arm64.operands);
Array.iteri (print_op handle) arm64.operands;
);
printf "\n";
)
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;

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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open List
open Capstone
let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
let _ARM_CODE2 = "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3";;
let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68";;
let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88";;
let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9";;
let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
let all_tests = [
(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0L);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0L);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0L);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0L);
(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0L);
(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0L);
(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0L);
(CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0L);
(CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64, print register with number only", 0L);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0L);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0L);
(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0L);
(CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0L);
];;
let print_insn insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;;
let print_arch x =
let (arch, mode, code, comment, syntax) = x in
let handle = cs_open arch mode in (
if syntax != 0L then (
let err = cs_option handle CS_OPT_SYNTAX syntax in
match err with
| _ -> ();
);
let insns = cs_disasm handle code 0x1000L 0L in (
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter print_insn insns;
);
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
);;
List.iter print_arch all_tests;;

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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open List
open Capstone
let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
let _ARM_CODE2 = "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3";;
let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68";;
let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88";;
let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9";;
let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
let all_tests = [
(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", 0);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0);
(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0);
(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0);
(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0);
(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0);
(CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0);
(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0);
(CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0);
];;
let print_detail handle insn =
(* print immediate operands *)
if (Array.length insn.regs_read) > 0 then begin
printf "\tImplicit registers read: ";
Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_read;
printf "\n";
end;
if (Array.length insn.regs_write) > 0 then begin
printf "\tImplicit registers written: ";
Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_write;
printf "\n";
end;
if (Array.length insn.groups) > 0 then begin
printf "\tThis instruction belongs to groups: ";
Array.iter (printf "%u ") insn.groups;
printf "\n";
end;
printf "\n";;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment, syntax) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;

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(* Capstone Disassembly Engine
* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 *)
open Printf
open Capstone
open M680x
open M680x_const
let print_char_hex ch =
printf " 0x%02x" (Char.code ch)
let print_int_hex_short value =
printf "%02x" value
let print_string_hex comment str =
printf "%s" comment;
String.iter print_char_hex str;
printf "\n"
let print_array_hex_short arr =
Array.iter print_int_hex_short arr
let s_access = [
"UNCHANGED"; "READ"; "WRITE"; "READ | WRITE" ];;
let _M6800_CODE = "\x01\x09\x36\x64\x7f\x74\x10\x00\x90\x10\xA4\x10\xb6\x10\x00\x39";;
let _M6801_CODE = "\x04\x05\x3c\x3d\x38\x93\x10\xec\x10\xed\x10\x39";;
let _M6805_CODE = "\x04\x7f\x00\x17\x22\x28\x00\x2e\x00\x40\x42\x5a\x70\x8e\x97\x9c\xa0\x15\xad\x00\xc3\x10\x00\xda\x12\x34\xe5\x7f\xfe";;
let _M6808_CODE = "\x31\x22\x00\x35\x22\x45\x10\x00\x4b\x00\x51\x10\x52\x5e\x22\x62\x65\x12\x34\x72\x84\x85\x86\x87\x8a\x8b\x8c\x94\x95\xa7\x10\xaf\x10\x9e\x60\x7f\x9e\x6b\x7f\x00\x9e\xd6\x10\x00\x9e\xe6\x7f";;
let _HD6301_CODE = "\x6b\x10\x00\x71\x10\x00\x72\x10\x10\x39";;
let _M6809_CODE = "\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39\xA6\x07\xA6\x27\xA6\x47\xA6\x67\xA6\x0F\xA6\x10\xA6\x80\xA6\x81\xA6\x82\xA6\x83\xA6\x84\xA6\x85\xA6\x86\xA6\x88\x7F\xA6\x88\x80\xA6\x89\x7F\xFF\xA6\x89\x80\x00\xA6\x8B\xA6\x8C\x10\xA6\x8D\x10\x00\xA6\x91\xA6\x93\xA6\x94\xA6\x95\xA6\x96\xA6\x98\x7F\xA6\x98\x80\xA6\x99\x7F\xFF\xA6\x99\x80\x00\xA6\x9B\xA6\x9C\x10\xA6\x9D\x10\x00\xA6\x9F\x10\x00";;
let _HD6309_CODE = "\x01\x10\x10\x62\x10\x10\x7b\x10\x10\x00\xcd\x49\x96\x02\xd2\x10\x30\x23\x10\x38\x10\x3b\x10\x53\x10\x5d\x11\x30\x43\x10\x11\x37\x25\x10\x11\x38\x12\x11\x39\x23\x11\x3b\x34\x11\x8e\x10\x00\x11\xaf\x10\x11\xab\x10\x11\xf6\x80\x00";;
let _M6811_CODE = "\x02\x03\x12\x7f\x10\x00\x13\x99\x08\x00\x14\x7f\x02\x15\x7f\x01\x1e\x7f\x20\x00\x8f\xcf\x18\x08\x18\x30\x18\x3c\x18\x67\x18\x8c\x10\x00\x18\x8f\x18\xce\x10\x00\x18\xff\x10\x00\x1a\xa3\x7f\x1a\xac\x1a\xee\x7f\x1a\xef\x7f\xcd\xac\x7f";;
let _CPU12_CODE = "\x00\x04\x01\x00\x0c\x00\x80\x0e\x00\x80\x00\x11\x1e\x10\x00\x80\x00\x3b\x4a\x10\x00\x04\x4b\x01\x04\x4f\x7f\x80\x00\x8f\x10\x00\xb7\x52\xb7\xb1\xa6\x67\xa6\xfe\xa6\xf7\x18\x02\xe2\x30\x39\xe2\x10\x00\x18\x0c\x30\x39\x10\x00\x18\x11\x18\x12\x10\x00\x18\x19\x00\x18\x1e\x00\x18\x3e\x18\x3f\x00";;
let _HCS08_CODE = "\x32\x10\x00\x9e\xae\x9e\xce\x7f\x9e\xbe\x10\x00\x9e\xfe\x7f\x3e\x10\x00\x9e\xf3\x7f\x96\x10\x00\x9e\xff\x7f\x82";;
let bit_set value mask =
value land mask != 0
let all_tests = [
(CS_ARCH_M680X, [CS_MODE_M680X_6301], _HD6301_CODE, "M680X_HD6301");
(CS_ARCH_M680X, [CS_MODE_M680X_6309], _HD6309_CODE, "M680X_HD6309");
(CS_ARCH_M680X, [CS_MODE_M680X_6800], _M6800_CODE, "M680X_M6800");
(CS_ARCH_M680X, [CS_MODE_M680X_6801], _M6801_CODE, "M680X_M6801");
(CS_ARCH_M680X, [CS_MODE_M680X_6805], _M6805_CODE, "M680X_M68HC05");
(CS_ARCH_M680X, [CS_MODE_M680X_6808], _M6808_CODE, "M680X_M68HC08");
(CS_ARCH_M680X, [CS_MODE_M680X_6809], _M6809_CODE, "M680X_M6809");
(CS_ARCH_M680X, [CS_MODE_M680X_6811], _M6811_CODE, "M680X_M68HC11");
(CS_ARCH_M680X, [CS_MODE_M680X_CPU12], _CPU12_CODE, "M680X_CPU12");
(CS_ARCH_M680X, [CS_MODE_M680X_HCS08], _HCS08_CODE, "M680X_HCS08");
];;
let print_inc_dec inc_dec is_post = (
printf "\t\t\t";
if is_post then printf "post" else printf "pre";
if inc_dec > 0 then
printf " increment: %d\n" inc_dec
else
printf " decrement: %d\n" (abs inc_dec);
);
();;
let print_op handle flags i op =
( match op.value with
| M680X_OP_INVALID _ -> (); (* this would never happens *)
| M680X_OP_REGISTER reg -> (
printf "\t\toperands[%d].type: REGISTER = %s" i (cs_reg_name handle reg);
if (((i == 0) && (bit_set flags _M680X_FIRST_OP_IN_MNEM)) ||
((i == 1) && (bit_set flags _M680X_SECOND_OP_IN_MNEM))) then
printf " (in mnemonic)";
printf "\n";
);
| M680X_OP_IMMEDIATE imm ->
printf "\t\toperands[%d].type: IMMEDIATE = #%d\n" i imm;
| M680X_OP_DIRECT direct_addr ->
printf "\t\toperands[%d].type: DIRECT = 0x%02x\n" i direct_addr;
| M680X_OP_EXTENDED ext -> (
printf "\t\toperands[%d].type: EXTENDED " i;
if ext.indirect then
printf "INDIRECT";
printf " = 0x%04x\n" ext.addr_ext;
);
| M680X_OP_RELATIVE rel ->
printf "\t\toperands[%d].type: RELATIVE = 0x%04x\n" i rel.addr_rel;
| M680X_OP_INDEXED idx -> (
printf "\t\toperands[%d].type: INDEXED" i;
if (bit_set idx.flags _M680X_IDX_INDIRECT) then
printf " INDIRECT";
printf "\n";
if idx.base_reg != _M680X_REG_INVALID then
printf "\t\t\tbase register: %s\n" (cs_reg_name handle idx.base_reg);
if idx.offset_reg != _M680X_REG_INVALID then
printf "\t\t\toffset register: %s\n" (cs_reg_name handle idx.offset_reg);
if idx.offset_bits != 0 && idx.offset_reg == 0 && idx.inc_dec == 0 then begin
printf "\t\t\toffset: %d\n" idx.offset;
if idx.base_reg == _M680X_REG_PC then
printf "\t\t\toffset address: 0x%x\n" idx.offset_addr;
printf "\t\t\toffset bits: %u\n" idx.offset_bits;
end;
if idx.inc_dec != 0 then
print_inc_dec idx.inc_dec (bit_set idx.flags _M680X_IDX_POST_INC_DEC);
);
| M680X_OP_CONSTANT const_val ->
printf "\t\toperands[%d].type: CONSTANT = %d\n" i const_val;
);
if op.size != 0 then
printf "\t\t\tsize: %d\n" op.size;
if op.access != _CS_AC_INVALID then
printf "\t\t\taccess: %s\n" (List.nth s_access op.access);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_M680X m680x -> (
(* print all operands info (type & value) *)
if (Array.length m680x.operands) > 0 then (
printf "\top_count: %d\n" (Array.length m680x.operands);
Array.iteri (print_op handle m680x.flags) m680x.operands;
);
);
| _ -> ();
;;
let print_reg handle reg =
printf " %s" (cs_reg_name handle reg)
let print_insn handle insn =
printf "0x%04x:\t" insn.address;
print_array_hex_short insn.bytes;
printf "\t%s\t%s\n" insn.mnemonic insn.op_str;
print_detail handle insn;
if (Array.length insn.regs_read) > 0 then begin
printf "\tRegisters read:";
Array.iter (print_reg handle) insn.regs_read;
printf "\n";
end;
if (Array.length insn.regs_write) > 0 then begin
printf "\tRegisters modified:";
Array.iter (print_reg handle) insn.regs_write;
printf "\n";
end;
if (Array.length insn.groups) > 0 then
printf "\tgroups_count: %d\n" (Array.length insn.groups);
printf "\n"
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "********************\n";
printf "Platform: %s\n" comment;
print_string_hex "Code: " code;
printf "Disasm:\n";
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;

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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open Capstone
open Mips
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
let all_tests = [
(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)");
(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)");
];;
let print_op handle i op =
( match op.value with
| MIPS_OP_INVALID _ -> (); (* this would never happens *)
| MIPS_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| MIPS_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| MIPS_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_MIPS mips -> (
(* print all operands info (type & value) *)
if (Array.length mips.operands) > 0 then (
printf "\top_count: %d\n" (Array.length mips.operands);
Array.iteri (print_op handle) mips.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;

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(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Printf
open Capstone
open Ppc
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
let all_tests = [
(CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64");
];;
let print_op handle i op =
( match op.value with
| PPC_OP_INVALID _ -> (); (* this would never happens *)
| PPC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| PPC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| PPC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
| PPC_OP_CRX crx -> ( printf "\t\top[%d]: CRX\n" i;
if crx.scale != 0 then
printf "\t\t\toperands[%u].crx.scale = %u\n" i crx.scale;
if crx.reg != 0 then
printf "\t\t\toperands[%u].crx.reg = %s\n" i (cs_reg_name handle crx.reg);
if crx.cond != 0 then
printf "\t\t\toperands[%u].crx.cond = 0x%x\n" i crx.cond;
);
);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_PPC ppc -> (
(* print all operands info (type & value) *)
if (Array.length ppc.operands) > 0 then (
printf "\top_count: %d\n" (Array.length ppc.operands);
Array.iteri (print_op handle) ppc.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;

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(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Printf
open Capstone
open Sparc
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
let all_tests = [
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc");
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9");
];;
let print_op handle i op =
( match op.value with
| SPARC_OP_INVALID _ -> (); (* this would never happens *)
| SPARC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| SPARC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| SPARC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_SPARC sparc -> (
(* print all operands info (type & value) *)
if (Array.length sparc.operands) > 0 then (
printf "\top_count: %d\n" (Array.length sparc.operands);
Array.iteri (print_op handle) sparc.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;

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(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Printf
open Capstone
open Systemz
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
let all_tests = [
(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ");
];;
let print_op handle i op =
( match op.value with
| SYSZ_OP_INVALID _ -> (); (* this would never happens *)
| SYSZ_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| SYSZ_OP_ACREG reg -> printf "\t\top[%d]: ACREG = %u\n" i reg;
| SYSZ_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| SYSZ_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
if mem.length != 0L then
printf "\t\t\toperands[%u].mem.length: 0x%Lx\n" i mem.length;
if mem.disp != 0L then
printf "\t\t\toperands[%u].mem.disp: 0x%Lx\n" i mem.disp;
);
);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_SYSZ sysz -> (
(* print all operands info (type & value) *)
if (Array.length sysz.operands) > 0 then (
printf "\top_count: %d\n" (Array.length sysz.operands);
Array.iteri (print_op handle) sysz.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;

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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open Capstone
open X86
open X86_const
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
let all_tests = [
(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L);
];;
let print_op handle i op =
( match op.value with
| X86_OP_INVALID _ -> (); (* this would never happens *)
| X86_OP_REG reg -> printf "\t\top[%d]: REG = %s [sz=%d]\n" i (cs_reg_name handle reg) op.size;
| X86_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x [sz=%d]\n" i imm op.size;
| X86_OP_MEM mem -> ( printf "\t\top[%d]: MEM [sz=%d]\n" i op.size;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
if mem.scale != 1 then
printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale;
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
);
();;
let print_detail handle mode insn =
match insn.arch with
| CS_INFO_X86 x86 -> (
print_string_hex "\tPrefix: " x86.prefix;
(* print instruction's opcode *)
print_string_hex "\tOpcode: " x86.opcode;
(* print operand's size, address size, displacement size & immediate size *)
printf "\taddr_size: %u\n" x86.addr_size;
(* print modRM byte *)
printf "\tmodrm: 0x%x\n" x86.modrm;
(* print displacement value *)
if x86.disp != 0 then
printf "\tdisp: 0x%x\n" x86.disp;
(* SIB is invalid in 16-bit mode *)
if not (List.mem CS_MODE_16 mode) then (
(* print SIB byte *)
printf "\tsib: 0x%x\n" x86.sib;
(* print sib index/scale/base (if applicable) *)
if x86.sib_index != _X86_REG_INVALID then
printf "\tsib_index: %s, sib_scale: %u, sib_base: %s\n"
(cs_reg_name handle x86.sib_index)
x86.sib_scale
(cs_reg_name handle x86.sib_base);
);
(* print all operands info (type & value) *)
if (Array.length x86.operands) > 0 then (
printf "\top_count: %d\n" (Array.length x86.operands);
Array.iteri (print_op handle) x86.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle mode insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle mode insn
let print_arch x =
let (arch, mode, code, comment, syntax) = x in
let handle = cs_open arch mode in (
if syntax != 0L then (
let err = cs_option handle CS_OPT_SYNTAX syntax in
match err with
| _ -> ();
);
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in (
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle mode) insns;
);
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
);;
List.iter print_arch all_tests;;

78
thirdparty/capstone/bindings/ocaml/test_xcore.ml vendored Normal file
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(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Printf
open Capstone
open Xcore
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
let all_tests = [
(CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore");
];;
let print_op handle i op =
( match op.value with
| XCORE_OP_INVALID _ -> (); (* this would never happens *)
| XCORE_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| XCORE_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| XCORE_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
if mem.direct != 0 then
printf "\t\t\toperands[%u].mem.direct: 0x%x\n" i mem.direct;
);
);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_XCORE xcore -> (
(* print all operands info (type & value) *)
if (Array.length xcore.operands) > 0 then (
printf "\top_count: %d\n" (Array.length xcore.operands);
Array.iteri (print_op handle) xcore.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;

277
thirdparty/capstone/bindings/ocaml/tms320c64x_const.ml vendored Normal file
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(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [tms320c64x_const.ml] *)
let _TMS320C64X_OP_INVALID = 0;;
let _TMS320C64X_OP_REG = 1;;
let _TMS320C64X_OP_IMM = 2;;
let _TMS320C64X_OP_MEM = 3;;
let _TMS320C64X_OP_REGPAIR = 64;;
let _TMS320C64X_MEM_DISP_INVALID = 0;;
let _TMS320C64X_MEM_DISP_CONSTANT = 1;;
let _TMS320C64X_MEM_DISP_REGISTER = 2;;
let _TMS320C64X_MEM_DIR_INVALID = 0;;
let _TMS320C64X_MEM_DIR_FW = 1;;
let _TMS320C64X_MEM_DIR_BW = 2;;
let _TMS320C64X_MEM_MOD_INVALID = 0;;
let _TMS320C64X_MEM_MOD_NO = 1;;
let _TMS320C64X_MEM_MOD_PRE = 2;;
let _TMS320C64X_MEM_MOD_POST = 3;;
let _TMS320C64X_REG_INVALID = 0;;
let _TMS320C64X_REG_AMR = 1;;
let _TMS320C64X_REG_CSR = 2;;
let _TMS320C64X_REG_DIER = 3;;
let _TMS320C64X_REG_DNUM = 4;;
let _TMS320C64X_REG_ECR = 5;;
let _TMS320C64X_REG_GFPGFR = 6;;
let _TMS320C64X_REG_GPLYA = 7;;
let _TMS320C64X_REG_GPLYB = 8;;
let _TMS320C64X_REG_ICR = 9;;
let _TMS320C64X_REG_IER = 10;;
let _TMS320C64X_REG_IERR = 11;;
let _TMS320C64X_REG_ILC = 12;;
let _TMS320C64X_REG_IRP = 13;;
let _TMS320C64X_REG_ISR = 14;;
let _TMS320C64X_REG_ISTP = 15;;
let _TMS320C64X_REG_ITSR = 16;;
let _TMS320C64X_REG_NRP = 17;;
let _TMS320C64X_REG_NTSR = 18;;
let _TMS320C64X_REG_REP = 19;;
let _TMS320C64X_REG_RILC = 20;;
let _TMS320C64X_REG_SSR = 21;;
let _TMS320C64X_REG_TSCH = 22;;
let _TMS320C64X_REG_TSCL = 23;;
let _TMS320C64X_REG_TSR = 24;;
let _TMS320C64X_REG_A0 = 25;;
let _TMS320C64X_REG_A1 = 26;;
let _TMS320C64X_REG_A2 = 27;;
let _TMS320C64X_REG_A3 = 28;;
let _TMS320C64X_REG_A4 = 29;;
let _TMS320C64X_REG_A5 = 30;;
let _TMS320C64X_REG_A6 = 31;;
let _TMS320C64X_REG_A7 = 32;;
let _TMS320C64X_REG_A8 = 33;;
let _TMS320C64X_REG_A9 = 34;;
let _TMS320C64X_REG_A10 = 35;;
let _TMS320C64X_REG_A11 = 36;;
let _TMS320C64X_REG_A12 = 37;;
let _TMS320C64X_REG_A13 = 38;;
let _TMS320C64X_REG_A14 = 39;;
let _TMS320C64X_REG_A15 = 40;;
let _TMS320C64X_REG_A16 = 41;;
let _TMS320C64X_REG_A17 = 42;;
let _TMS320C64X_REG_A18 = 43;;
let _TMS320C64X_REG_A19 = 44;;
let _TMS320C64X_REG_A20 = 45;;
let _TMS320C64X_REG_A21 = 46;;
let _TMS320C64X_REG_A22 = 47;;
let _TMS320C64X_REG_A23 = 48;;
let _TMS320C64X_REG_A24 = 49;;
let _TMS320C64X_REG_A25 = 50;;
let _TMS320C64X_REG_A26 = 51;;
let _TMS320C64X_REG_A27 = 52;;
let _TMS320C64X_REG_A28 = 53;;
let _TMS320C64X_REG_A29 = 54;;
let _TMS320C64X_REG_A30 = 55;;
let _TMS320C64X_REG_A31 = 56;;
let _TMS320C64X_REG_B0 = 57;;
let _TMS320C64X_REG_B1 = 58;;
let _TMS320C64X_REG_B2 = 59;;
let _TMS320C64X_REG_B3 = 60;;
let _TMS320C64X_REG_B4 = 61;;
let _TMS320C64X_REG_B5 = 62;;
let _TMS320C64X_REG_B6 = 63;;
let _TMS320C64X_REG_B7 = 64;;
let _TMS320C64X_REG_B8 = 65;;
let _TMS320C64X_REG_B9 = 66;;
let _TMS320C64X_REG_B10 = 67;;
let _TMS320C64X_REG_B11 = 68;;
let _TMS320C64X_REG_B12 = 69;;
let _TMS320C64X_REG_B13 = 70;;
let _TMS320C64X_REG_B14 = 71;;
let _TMS320C64X_REG_B15 = 72;;
let _TMS320C64X_REG_B16 = 73;;
let _TMS320C64X_REG_B17 = 74;;
let _TMS320C64X_REG_B18 = 75;;
let _TMS320C64X_REG_B19 = 76;;
let _TMS320C64X_REG_B20 = 77;;
let _TMS320C64X_REG_B21 = 78;;
let _TMS320C64X_REG_B22 = 79;;
let _TMS320C64X_REG_B23 = 80;;
let _TMS320C64X_REG_B24 = 81;;
let _TMS320C64X_REG_B25 = 82;;
let _TMS320C64X_REG_B26 = 83;;
let _TMS320C64X_REG_B27 = 84;;
let _TMS320C64X_REG_B28 = 85;;
let _TMS320C64X_REG_B29 = 86;;
let _TMS320C64X_REG_B30 = 87;;
let _TMS320C64X_REG_B31 = 88;;
let _TMS320C64X_REG_PCE1 = 89;;
let _TMS320C64X_REG_ENDING = 90;;
let _TMS320C64X_REG_EFR = _TMS320C64X_REG_ECR;;
let _TMS320C64X_REG_IFR = _TMS320C64X_REG_ISR;;
let _TMS320C64X_INS_INVALID = 0;;
let _TMS320C64X_INS_ABS = 1;;
let _TMS320C64X_INS_ABS2 = 2;;
let _TMS320C64X_INS_ADD = 3;;
let _TMS320C64X_INS_ADD2 = 4;;
let _TMS320C64X_INS_ADD4 = 5;;
let _TMS320C64X_INS_ADDAB = 6;;
let _TMS320C64X_INS_ADDAD = 7;;
let _TMS320C64X_INS_ADDAH = 8;;
let _TMS320C64X_INS_ADDAW = 9;;
let _TMS320C64X_INS_ADDK = 10;;
let _TMS320C64X_INS_ADDKPC = 11;;
let _TMS320C64X_INS_ADDU = 12;;
let _TMS320C64X_INS_AND = 13;;
let _TMS320C64X_INS_ANDN = 14;;
let _TMS320C64X_INS_AVG2 = 15;;
let _TMS320C64X_INS_AVGU4 = 16;;
let _TMS320C64X_INS_B = 17;;
let _TMS320C64X_INS_BDEC = 18;;
let _TMS320C64X_INS_BITC4 = 19;;
let _TMS320C64X_INS_BNOP = 20;;
let _TMS320C64X_INS_BPOS = 21;;
let _TMS320C64X_INS_CLR = 22;;
let _TMS320C64X_INS_CMPEQ = 23;;
let _TMS320C64X_INS_CMPEQ2 = 24;;
let _TMS320C64X_INS_CMPEQ4 = 25;;
let _TMS320C64X_INS_CMPGT = 26;;
let _TMS320C64X_INS_CMPGT2 = 27;;
let _TMS320C64X_INS_CMPGTU4 = 28;;
let _TMS320C64X_INS_CMPLT = 29;;
let _TMS320C64X_INS_CMPLTU = 30;;
let _TMS320C64X_INS_DEAL = 31;;
let _TMS320C64X_INS_DOTP2 = 32;;
let _TMS320C64X_INS_DOTPN2 = 33;;
let _TMS320C64X_INS_DOTPNRSU2 = 34;;
let _TMS320C64X_INS_DOTPRSU2 = 35;;
let _TMS320C64X_INS_DOTPSU4 = 36;;
let _TMS320C64X_INS_DOTPU4 = 37;;
let _TMS320C64X_INS_EXT = 38;;
let _TMS320C64X_INS_EXTU = 39;;
let _TMS320C64X_INS_GMPGTU = 40;;
let _TMS320C64X_INS_GMPY4 = 41;;
let _TMS320C64X_INS_LDB = 42;;
let _TMS320C64X_INS_LDBU = 43;;
let _TMS320C64X_INS_LDDW = 44;;
let _TMS320C64X_INS_LDH = 45;;
let _TMS320C64X_INS_LDHU = 46;;
let _TMS320C64X_INS_LDNDW = 47;;
let _TMS320C64X_INS_LDNW = 48;;
let _TMS320C64X_INS_LDW = 49;;
let _TMS320C64X_INS_LMBD = 50;;
let _TMS320C64X_INS_MAX2 = 51;;
let _TMS320C64X_INS_MAXU4 = 52;;
let _TMS320C64X_INS_MIN2 = 53;;
let _TMS320C64X_INS_MINU4 = 54;;
let _TMS320C64X_INS_MPY = 55;;
let _TMS320C64X_INS_MPY2 = 56;;
let _TMS320C64X_INS_MPYH = 57;;
let _TMS320C64X_INS_MPYHI = 58;;
let _TMS320C64X_INS_MPYHIR = 59;;
let _TMS320C64X_INS_MPYHL = 60;;
let _TMS320C64X_INS_MPYHLU = 61;;
let _TMS320C64X_INS_MPYHSLU = 62;;
let _TMS320C64X_INS_MPYHSU = 63;;
let _TMS320C64X_INS_MPYHU = 64;;
let _TMS320C64X_INS_MPYHULS = 65;;
let _TMS320C64X_INS_MPYHUS = 66;;
let _TMS320C64X_INS_MPYLH = 67;;
let _TMS320C64X_INS_MPYLHU = 68;;
let _TMS320C64X_INS_MPYLI = 69;;
let _TMS320C64X_INS_MPYLIR = 70;;
let _TMS320C64X_INS_MPYLSHU = 71;;
let _TMS320C64X_INS_MPYLUHS = 72;;
let _TMS320C64X_INS_MPYSU = 73;;
let _TMS320C64X_INS_MPYSU4 = 74;;
let _TMS320C64X_INS_MPYU = 75;;
let _TMS320C64X_INS_MPYU4 = 76;;
let _TMS320C64X_INS_MPYUS = 77;;
let _TMS320C64X_INS_MVC = 78;;
let _TMS320C64X_INS_MVD = 79;;
let _TMS320C64X_INS_MVK = 80;;
let _TMS320C64X_INS_MVKL = 81;;
let _TMS320C64X_INS_MVKLH = 82;;
let _TMS320C64X_INS_NOP = 83;;
let _TMS320C64X_INS_NORM = 84;;
let _TMS320C64X_INS_OR = 85;;
let _TMS320C64X_INS_PACK2 = 86;;
let _TMS320C64X_INS_PACKH2 = 87;;
let _TMS320C64X_INS_PACKH4 = 88;;
let _TMS320C64X_INS_PACKHL2 = 89;;
let _TMS320C64X_INS_PACKL4 = 90;;
let _TMS320C64X_INS_PACKLH2 = 91;;
let _TMS320C64X_INS_ROTL = 92;;
let _TMS320C64X_INS_SADD = 93;;
let _TMS320C64X_INS_SADD2 = 94;;
let _TMS320C64X_INS_SADDU4 = 95;;
let _TMS320C64X_INS_SADDUS2 = 96;;
let _TMS320C64X_INS_SAT = 97;;
let _TMS320C64X_INS_SET = 98;;
let _TMS320C64X_INS_SHFL = 99;;
let _TMS320C64X_INS_SHL = 100;;
let _TMS320C64X_INS_SHLMB = 101;;
let _TMS320C64X_INS_SHR = 102;;
let _TMS320C64X_INS_SHR2 = 103;;
let _TMS320C64X_INS_SHRMB = 104;;
let _TMS320C64X_INS_SHRU = 105;;
let _TMS320C64X_INS_SHRU2 = 106;;
let _TMS320C64X_INS_SMPY = 107;;
let _TMS320C64X_INS_SMPY2 = 108;;
let _TMS320C64X_INS_SMPYH = 109;;
let _TMS320C64X_INS_SMPYHL = 110;;
let _TMS320C64X_INS_SMPYLH = 111;;
let _TMS320C64X_INS_SPACK2 = 112;;
let _TMS320C64X_INS_SPACKU4 = 113;;
let _TMS320C64X_INS_SSHL = 114;;
let _TMS320C64X_INS_SSHVL = 115;;
let _TMS320C64X_INS_SSHVR = 116;;
let _TMS320C64X_INS_SSUB = 117;;
let _TMS320C64X_INS_STB = 118;;
let _TMS320C64X_INS_STDW = 119;;
let _TMS320C64X_INS_STH = 120;;
let _TMS320C64X_INS_STNDW = 121;;
let _TMS320C64X_INS_STNW = 122;;
let _TMS320C64X_INS_STW = 123;;
let _TMS320C64X_INS_SUB = 124;;
let _TMS320C64X_INS_SUB2 = 125;;
let _TMS320C64X_INS_SUB4 = 126;;
let _TMS320C64X_INS_SUBAB = 127;;
let _TMS320C64X_INS_SUBABS4 = 128;;
let _TMS320C64X_INS_SUBAH = 129;;
let _TMS320C64X_INS_SUBAW = 130;;
let _TMS320C64X_INS_SUBC = 131;;
let _TMS320C64X_INS_SUBU = 132;;
let _TMS320C64X_INS_SWAP4 = 133;;
let _TMS320C64X_INS_UNPKHU4 = 134;;
let _TMS320C64X_INS_UNPKLU4 = 135;;
let _TMS320C64X_INS_XOR = 136;;
let _TMS320C64X_INS_XPND2 = 137;;
let _TMS320C64X_INS_XPND4 = 138;;
let _TMS320C64X_INS_IDLE = 139;;
let _TMS320C64X_INS_MV = 140;;
let _TMS320C64X_INS_NEG = 141;;
let _TMS320C64X_INS_NOT = 142;;
let _TMS320C64X_INS_SWAP2 = 143;;
let _TMS320C64X_INS_ZERO = 144;;
let _TMS320C64X_INS_ENDING = 145;;
let _TMS320C64X_GRP_INVALID = 0;;
let _TMS320C64X_GRP_JUMP = 1;;
let _TMS320C64X_GRP_FUNIT_D = 128;;
let _TMS320C64X_GRP_FUNIT_L = 129;;
let _TMS320C64X_GRP_FUNIT_M = 130;;
let _TMS320C64X_GRP_FUNIT_S = 131;;
let _TMS320C64X_GRP_FUNIT_NO = 132;;
let _TMS320C64X_GRP_ENDING = 133;;
let _TMS320C64X_FUNIT_INVALID = 0;;
let _TMS320C64X_FUNIT_D = 1;;
let _TMS320C64X_FUNIT_L = 2;;
let _TMS320C64X_FUNIT_M = 3;;
let _TMS320C64X_FUNIT_S = 4;;
let _TMS320C64X_FUNIT_NO = 5;;

191
thirdparty/capstone/bindings/ocaml/wasm_const.ml vendored Normal file
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@@ -0,0 +1,191 @@
(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [wasm_const.ml] *)
let _WASM_OP_INVALID = 0;;
let _WASM_OP_NONE = 1;;
let _WASM_OP_INT7 = 2;;
let _WASM_OP_VARUINT32 = 3;;
let _WASM_OP_VARUINT64 = 4;;
let _WASM_OP_UINT32 = 5;;
let _WASM_OP_UINT64 = 6;;
let _WASM_OP_IMM = 7;;
let _WASM_OP_BRTABLE = 8;;
let _WASM_INS_UNREACHABLE = 0x0;;
let _WASM_INS_NOP = 0x1;;
let _WASM_INS_BLOCK = 0x2;;
let _WASM_INS_LOOP = 0x3;;
let _WASM_INS_IF = 0x4;;
let _WASM_INS_ELSE = 0x5;;
let _WASM_INS_END = 0xb;;
let _WASM_INS_BR = 0xc;;
let _WASM_INS_BR_IF = 0xd;;
let _WASM_INS_BR_TABLE = 0xe;;
let _WASM_INS_RETURN = 0xf;;
let _WASM_INS_CALL = 0x10;;
let _WASM_INS_CALL_INDIRECT = 0x11;;
let _WASM_INS_DROP = 0x1a;;
let _WASM_INS_SELECT = 0x1b;;
let _WASM_INS_GET_LOCAL = 0x20;;
let _WASM_INS_SET_LOCAL = 0x21;;
let _WASM_INS_TEE_LOCAL = 0x22;;
let _WASM_INS_GET_GLOBAL = 0x23;;
let _WASM_INS_SET_GLOBAL = 0x24;;
let _WASM_INS_I32_LOAD = 0x28;;
let _WASM_INS_I64_LOAD = 0x29;;
let _WASM_INS_F32_LOAD = 0x2a;;
let _WASM_INS_F64_LOAD = 0x2b;;
let _WASM_INS_I32_LOAD8_S = 0x2c;;
let _WASM_INS_I32_LOAD8_U = 0x2d;;
let _WASM_INS_I32_LOAD16_S = 0x2e;;
let _WASM_INS_I32_LOAD16_U = 0x2f;;
let _WASM_INS_I64_LOAD8_S = 0x30;;
let _WASM_INS_I64_LOAD8_U = 0x31;;
let _WASM_INS_I64_LOAD16_S = 0x32;;
let _WASM_INS_I64_LOAD16_U = 0x33;;
let _WASM_INS_I64_LOAD32_S = 0x34;;
let _WASM_INS_I64_LOAD32_U = 0x35;;
let _WASM_INS_I32_STORE = 0x36;;
let _WASM_INS_I64_STORE = 0x37;;
let _WASM_INS_F32_STORE = 0x38;;
let _WASM_INS_F64_STORE = 0x39;;
let _WASM_INS_I32_STORE8 = 0x3a;;
let _WASM_INS_I32_STORE16 = 0x3b;;
let _WASM_INS_I64_STORE8 = 0x3c;;
let _WASM_INS_I64_STORE16 = 0x3d;;
let _WASM_INS_I64_STORE32 = 0x3e;;
let _WASM_INS_CURRENT_MEMORY = 0x3f;;
let _WASM_INS_GROW_MEMORY = 0x40;;
let _WASM_INS_I32_CONST = 0x41;;
let _WASM_INS_I64_CONST = 0x42;;
let _WASM_INS_F32_CONST = 0x43;;
let _WASM_INS_F64_CONST = 0x44;;
let _WASM_INS_I32_EQZ = 0x45;;
let _WASM_INS_I32_EQ = 0x46;;
let _WASM_INS_I32_NE = 0x47;;
let _WASM_INS_I32_LT_S = 0x48;;
let _WASM_INS_I32_LT_U = 0x49;;
let _WASM_INS_I32_GT_S = 0x4a;;
let _WASM_INS_I32_GT_U = 0x4b;;
let _WASM_INS_I32_LE_S = 0x4c;;
let _WASM_INS_I32_LE_U = 0x4d;;
let _WASM_INS_I32_GE_S = 0x4e;;
let _WASM_INS_I32_GE_U = 0x4f;;
let _WASM_INS_I64_EQZ = 0x50;;
let _WASM_INS_I64_EQ = 0x51;;
let _WASM_INS_I64_NE = 0x52;;
let _WASM_INS_I64_LT_S = 0x53;;
let _WASM_INS_I64_LT_U = 0x54;;
let _WASM_INS_I64_GT_U = 0x56;;
let _WASM_INS_I64_LE_S = 0x57;;
let _WASM_INS_I64_LE_U = 0x58;;
let _WASM_INS_I64_GE_S = 0x59;;
let _WASM_INS_I64_GE_U = 0x5a;;
let _WASM_INS_F32_EQ = 0x5b;;
let _WASM_INS_F32_NE = 0x5c;;
let _WASM_INS_F32_LT = 0x5d;;
let _WASM_INS_F32_GT = 0x5e;;
let _WASM_INS_F32_LE = 0x5f;;
let _WASM_INS_F32_GE = 0x60;;
let _WASM_INS_F64_EQ = 0x61;;
let _WASM_INS_F64_NE = 0x62;;
let _WASM_INS_F64_LT = 0x63;;
let _WASM_INS_F64_GT = 0x64;;
let _WASM_INS_F64_LE = 0x65;;
let _WASM_INS_F64_GE = 0x66;;
let _WASM_INS_I32_CLZ = 0x67;;
let _WASM_INS_I32_CTZ = 0x68;;
let _WASM_INS_I32_POPCNT = 0x69;;
let _WASM_INS_I32_ADD = 0x6a;;
let _WASM_INS_I32_SUB = 0x6b;;
let _WASM_INS_I32_MUL = 0x6c;;
let _WASM_INS_I32_DIV_S = 0x6d;;
let _WASM_INS_I32_DIV_U = 0x6e;;
let _WASM_INS_I32_REM_S = 0x6f;;
let _WASM_INS_I32_REM_U = 0x70;;
let _WASM_INS_I32_AND = 0x71;;
let _WASM_INS_I32_OR = 0x72;;
let _WASM_INS_I32_XOR = 0x73;;
let _WASM_INS_I32_SHL = 0x74;;
let _WASM_INS_I32_SHR_S = 0x75;;
let _WASM_INS_I32_SHR_U = 0x76;;
let _WASM_INS_I32_ROTL = 0x77;;
let _WASM_INS_I32_ROTR = 0x78;;
let _WASM_INS_I64_CLZ = 0x79;;
let _WASM_INS_I64_CTZ = 0x7a;;
let _WASM_INS_I64_POPCNT = 0x7b;;
let _WASM_INS_I64_ADD = 0x7c;;
let _WASM_INS_I64_SUB = 0x7d;;
let _WASM_INS_I64_MUL = 0x7e;;
let _WASM_INS_I64_DIV_S = 0x7f;;
let _WASM_INS_I64_DIV_U = 0x80;;
let _WASM_INS_I64_REM_S = 0x81;;
let _WASM_INS_I64_REM_U = 0x82;;
let _WASM_INS_I64_AND = 0x83;;
let _WASM_INS_I64_OR = 0x84;;
let _WASM_INS_I64_XOR = 0x85;;
let _WASM_INS_I64_SHL = 0x86;;
let _WASM_INS_I64_SHR_S = 0x87;;
let _WASM_INS_I64_SHR_U = 0x88;;
let _WASM_INS_I64_ROTL = 0x89;;
let _WASM_INS_I64_ROTR = 0x8a;;
let _WASM_INS_F32_ABS = 0x8b;;
let _WASM_INS_F32_NEG = 0x8c;;
let _WASM_INS_F32_CEIL = 0x8d;;
let _WASM_INS_F32_FLOOR = 0x8e;;
let _WASM_INS_F32_TRUNC = 0x8f;;
let _WASM_INS_F32_NEAREST = 0x90;;
let _WASM_INS_F32_SQRT = 0x91;;
let _WASM_INS_F32_ADD = 0x92;;
let _WASM_INS_F32_SUB = 0x93;;
let _WASM_INS_F32_MUL = 0x94;;
let _WASM_INS_F32_DIV = 0x95;;
let _WASM_INS_F32_MIN = 0x96;;
let _WASM_INS_F32_MAX = 0x97;;
let _WASM_INS_F32_COPYSIGN = 0x98;;
let _WASM_INS_F64_ABS = 0x99;;
let _WASM_INS_F64_NEG = 0x9a;;
let _WASM_INS_F64_CEIL = 0x9b;;
let _WASM_INS_F64_FLOOR = 0x9c;;
let _WASM_INS_F64_TRUNC = 0x9d;;
let _WASM_INS_F64_NEAREST = 0x9e;;
let _WASM_INS_F64_SQRT = 0x9f;;
let _WASM_INS_F64_ADD = 0xa0;;
let _WASM_INS_F64_SUB = 0xa1;;
let _WASM_INS_F64_MUL = 0xa2;;
let _WASM_INS_F64_DIV = 0xa3;;
let _WASM_INS_F64_MIN = 0xa4;;
let _WASM_INS_F64_MAX = 0xa5;;
let _WASM_INS_F64_COPYSIGN = 0xa6;;
let _WASM_INS_I32_WARP_I64 = 0xa7;;
let _WASM_INS_I32_TRUNC_U_F32 = 0xa9;;
let _WASM_INS_I32_TRUNC_S_F64 = 0xaa;;
let _WASM_INS_I32_TRUNC_U_F64 = 0xab;;
let _WASM_INS_I64_EXTEND_S_I32 = 0xac;;
let _WASM_INS_I64_EXTEND_U_I32 = 0xad;;
let _WASM_INS_I64_TRUNC_S_F32 = 0xae;;
let _WASM_INS_I64_TRUNC_U_F32 = 0xaf;;
let _WASM_INS_I64_TRUNC_S_F64 = 0xb0;;
let _WASM_INS_I64_TRUNC_U_F64 = 0xb1;;
let _WASM_INS_F32_CONVERT_S_I32 = 0xb2;;
let _WASM_INS_F32_CONVERT_U_I32 = 0xb3;;
let _WASM_INS_F32_CONVERT_S_I64 = 0xb4;;
let _WASM_INS_F32_CONVERT_U_I64 = 0xb5;;
let _WASM_INS_F32_DEMOTE_F64 = 0xb6;;
let _WASM_INS_F64_CONVERT_S_I32 = 0xb7;;
let _WASM_INS_F64_CONVERT_U_I32 = 0xb8;;
let _WASM_INS_F64_CONVERT_S_I64 = 0xb9;;
let _WASM_INS_F64_CONVERT_U_I64 = 0xba;;
let _WASM_INS_F64_PROMOTE_F32 = 0xbb;;
let _WASM_INS_I32_REINTERPRET_F32 = 0xbc;;
let _WASM_INS_I64_REINTERPRET_F64 = 0xbd;;
let _WASM_INS_F32_REINTERPRET_I32 = 0xbe;;
let _WASM_INS_F64_REINTERPRET_I64 = 0xbf;;
let _WASM_INS_INVALID = 512;;
let _WASM_INS_ENDING = 513;;
let _WASM_GRP_INVALID = 0;;
let _WASM_GRP_NUMBERIC = 8;;
let _WASM_GRP_PARAMETRIC = 9;;
let _WASM_GRP_VARIABLE = 10;;
let _WASM_GRP_MEMORY = 11;;
let _WASM_GRP_CONTROL = 12;;
let _WASM_GRP_ENDING = 13;;

47
thirdparty/capstone/bindings/ocaml/x86.ml vendored Normal file
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@@ -0,0 +1,47 @@
(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open X86_const
(* architecture specific info of instruction *)
type x86_op_mem = {
segment: int;
base: int;
index: int;
scale: int;
disp: int;
}
type x86_op_value =
| X86_OP_INVALID of int
| X86_OP_REG of int
| X86_OP_IMM of int
| X86_OP_MEM of x86_op_mem
type x86_op = {
value: x86_op_value;
size: int;
access: int;
avx_bcast: int;
avx_zero_opmask: int;
}
type cs_x86 = {
prefix: int array;
opcode: int array;
rex: int;
addr_size: int;
modrm: int;
sib: int;
disp: int;
sib_index: int;
sib_scale: int;
sib_base: int;
xop_cc: int;
sse_cc: int;
avx_cc: int;
avx_sae: int;
avx_rm: int;
eflags: int;
operands: x86_op array;
}

1989
thirdparty/capstone/bindings/ocaml/x86_const.ml vendored Normal file
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File diff suppressed because it is too large Load Diff

26
thirdparty/capstone/bindings/ocaml/xcore.ml vendored Normal file
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@@ -0,0 +1,26 @@
(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Xcore_const
type xcore_op_mem = {
base: int;
index: int;
disp: int;
direct: int;
}
type xcore_op_value =
| XCORE_OP_INVALID of int
| XCORE_OP_REG of int
| XCORE_OP_IMM of int
| XCORE_OP_MEM of xcore_op_mem
type xcore_op = {
value: xcore_op_value;
}
type cs_xcore = {
operands: xcore_op array;
}

161
thirdparty/capstone/bindings/ocaml/xcore_const.ml vendored Normal file
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@@ -0,0 +1,161 @@
(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [xcore_const.ml] *)
let _XCORE_OP_INVALID = 0;;
let _XCORE_OP_REG = 1;;
let _XCORE_OP_IMM = 2;;
let _XCORE_OP_MEM = 3;;
let _XCORE_REG_INVALID = 0;;
let _XCORE_REG_CP = 1;;
let _XCORE_REG_DP = 2;;
let _XCORE_REG_LR = 3;;
let _XCORE_REG_SP = 4;;
let _XCORE_REG_R0 = 5;;
let _XCORE_REG_R1 = 6;;
let _XCORE_REG_R2 = 7;;
let _XCORE_REG_R3 = 8;;
let _XCORE_REG_R4 = 9;;
let _XCORE_REG_R5 = 10;;
let _XCORE_REG_R6 = 11;;
let _XCORE_REG_R7 = 12;;
let _XCORE_REG_R8 = 13;;
let _XCORE_REG_R9 = 14;;
let _XCORE_REG_R10 = 15;;
let _XCORE_REG_R11 = 16;;
let _XCORE_REG_PC = 17;;
let _XCORE_REG_SCP = 18;;
let _XCORE_REG_SSR = 19;;
let _XCORE_REG_ET = 20;;
let _XCORE_REG_ED = 21;;
let _XCORE_REG_SED = 22;;
let _XCORE_REG_KEP = 23;;
let _XCORE_REG_KSP = 24;;
let _XCORE_REG_ID = 25;;
let _XCORE_REG_ENDING = 26;;
let _XCORE_INS_INVALID = 0;;
let _XCORE_INS_ADD = 1;;
let _XCORE_INS_ANDNOT = 2;;
let _XCORE_INS_AND = 3;;
let _XCORE_INS_ASHR = 4;;
let _XCORE_INS_BAU = 5;;
let _XCORE_INS_BITREV = 6;;
let _XCORE_INS_BLA = 7;;
let _XCORE_INS_BLAT = 8;;
let _XCORE_INS_BL = 9;;
let _XCORE_INS_BF = 10;;
let _XCORE_INS_BT = 11;;
let _XCORE_INS_BU = 12;;
let _XCORE_INS_BRU = 13;;
let _XCORE_INS_BYTEREV = 14;;
let _XCORE_INS_CHKCT = 15;;
let _XCORE_INS_CLRE = 16;;
let _XCORE_INS_CLRPT = 17;;
let _XCORE_INS_CLRSR = 18;;
let _XCORE_INS_CLZ = 19;;
let _XCORE_INS_CRC8 = 20;;
let _XCORE_INS_CRC32 = 21;;
let _XCORE_INS_DCALL = 22;;
let _XCORE_INS_DENTSP = 23;;
let _XCORE_INS_DGETREG = 24;;
let _XCORE_INS_DIVS = 25;;
let _XCORE_INS_DIVU = 26;;
let _XCORE_INS_DRESTSP = 27;;
let _XCORE_INS_DRET = 28;;
let _XCORE_INS_ECALLF = 29;;
let _XCORE_INS_ECALLT = 30;;
let _XCORE_INS_EDU = 31;;
let _XCORE_INS_EEF = 32;;
let _XCORE_INS_EET = 33;;
let _XCORE_INS_EEU = 34;;
let _XCORE_INS_ENDIN = 35;;
let _XCORE_INS_ENTSP = 36;;
let _XCORE_INS_EQ = 37;;
let _XCORE_INS_EXTDP = 38;;
let _XCORE_INS_EXTSP = 39;;
let _XCORE_INS_FREER = 40;;
let _XCORE_INS_FREET = 41;;
let _XCORE_INS_GETD = 42;;
let _XCORE_INS_GET = 43;;
let _XCORE_INS_GETN = 44;;
let _XCORE_INS_GETR = 45;;
let _XCORE_INS_GETSR = 46;;
let _XCORE_INS_GETST = 47;;
let _XCORE_INS_GETTS = 48;;
let _XCORE_INS_INCT = 49;;
let _XCORE_INS_INIT = 50;;
let _XCORE_INS_INPW = 51;;
let _XCORE_INS_INSHR = 52;;
let _XCORE_INS_INT = 53;;
let _XCORE_INS_IN = 54;;
let _XCORE_INS_KCALL = 55;;
let _XCORE_INS_KENTSP = 56;;
let _XCORE_INS_KRESTSP = 57;;
let _XCORE_INS_KRET = 58;;
let _XCORE_INS_LADD = 59;;
let _XCORE_INS_LD16S = 60;;
let _XCORE_INS_LD8U = 61;;
let _XCORE_INS_LDA16 = 62;;
let _XCORE_INS_LDAP = 63;;
let _XCORE_INS_LDAW = 64;;
let _XCORE_INS_LDC = 65;;
let _XCORE_INS_LDW = 66;;
let _XCORE_INS_LDIVU = 67;;
let _XCORE_INS_LMUL = 68;;
let _XCORE_INS_LSS = 69;;
let _XCORE_INS_LSUB = 70;;
let _XCORE_INS_LSU = 71;;
let _XCORE_INS_MACCS = 72;;
let _XCORE_INS_MACCU = 73;;
let _XCORE_INS_MJOIN = 74;;
let _XCORE_INS_MKMSK = 75;;
let _XCORE_INS_MSYNC = 76;;
let _XCORE_INS_MUL = 77;;
let _XCORE_INS_NEG = 78;;
let _XCORE_INS_NOT = 79;;
let _XCORE_INS_OR = 80;;
let _XCORE_INS_OUTCT = 81;;
let _XCORE_INS_OUTPW = 82;;
let _XCORE_INS_OUTSHR = 83;;
let _XCORE_INS_OUTT = 84;;
let _XCORE_INS_OUT = 85;;
let _XCORE_INS_PEEK = 86;;
let _XCORE_INS_REMS = 87;;
let _XCORE_INS_REMU = 88;;
let _XCORE_INS_RETSP = 89;;
let _XCORE_INS_SETCLK = 90;;
let _XCORE_INS_SET = 91;;
let _XCORE_INS_SETC = 92;;
let _XCORE_INS_SETD = 93;;
let _XCORE_INS_SETEV = 94;;
let _XCORE_INS_SETN = 95;;
let _XCORE_INS_SETPSC = 96;;
let _XCORE_INS_SETPT = 97;;
let _XCORE_INS_SETRDY = 98;;
let _XCORE_INS_SETSR = 99;;
let _XCORE_INS_SETTW = 100;;
let _XCORE_INS_SETV = 101;;
let _XCORE_INS_SEXT = 102;;
let _XCORE_INS_SHL = 103;;
let _XCORE_INS_SHR = 104;;
let _XCORE_INS_SSYNC = 105;;
let _XCORE_INS_ST16 = 106;;
let _XCORE_INS_ST8 = 107;;
let _XCORE_INS_STW = 108;;
let _XCORE_INS_SUB = 109;;
let _XCORE_INS_SYNCR = 110;;
let _XCORE_INS_TESTCT = 111;;
let _XCORE_INS_TESTLCL = 112;;
let _XCORE_INS_TESTWCT = 113;;
let _XCORE_INS_TSETMR = 114;;
let _XCORE_INS_START = 115;;
let _XCORE_INS_WAITEF = 116;;
let _XCORE_INS_WAITET = 117;;
let _XCORE_INS_WAITEU = 118;;
let _XCORE_INS_XOR = 119;;
let _XCORE_INS_ZEXT = 120;;
let _XCORE_INS_ENDING = 121;;
let _XCORE_GRP_INVALID = 0;;
let _XCORE_GRP_JUMP = 1;;
let _XCORE_GRP_ENDING = 2;;