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Initial Commit
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Sajid
286
thirdparty/capstone/suite/synctools/registerinfo.py
vendored
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286
thirdparty/capstone/suite/synctools/registerinfo.py
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#!/usr/bin/python
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# convert LLVM GenRegisterInfo.inc for Capstone disassembler.
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# by Nguyen Anh Quynh, 2019
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import sys
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if len(sys.argv) == 1:
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print("Syntax: %s <GenRegisterInfo.inc> <architecture>" %sys.argv[0])
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sys.exit(1)
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f = open(sys.argv[1])
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lines = f.readlines()
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f.close()
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arch = sys.argv[2]
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print("""
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/* Capstone Disassembly Engine, http://www.capstone-engine.org */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\\
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|* *|
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|* Target Register Enum Values *|
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|* *|
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|* Automatically generated file, do not edit! *|
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|* *|
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\*===----------------------------------------------------------------------===*/
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#ifdef GET_REGINFO_ENUM
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#undef GET_REGINFO_ENUM
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""")
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enum_count = 0
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# 1st enum is register enum
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for line in lines:
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line = line.rstrip()
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'enum {':
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enum_count += 1
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print(line)
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continue
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if enum_count == 1:
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if line.strip() == '};':
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print(line)
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# done with first enum
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break
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else:
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# enum items
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print(" %s_%s" %(arch, line.strip()))
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# 2nd enum is register class
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enum_count = 0
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print("\n// Register classes")
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for line in lines:
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line = line.rstrip()
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'enum {':
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enum_count += 1
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if enum_count == 2:
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print(line)
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continue
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if enum_count == 2:
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if line.strip() == '};':
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# done with 2nd enum
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print(line.strip())
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break
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else:
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# enum items
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print(" %s_%s" %(arch, line.strip()))
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if arch.upper() == 'ARM':
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# 3rd enum is Subregister indices
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enum_count = 0
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print("\n// Subregister indices")
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for line in lines:
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line = line.rstrip()
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'enum {':
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enum_count += 1
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if enum_count == 3:
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print(line)
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continue
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if enum_count == 3:
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if line.strip() == '};':
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# done with 2nd enum
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print(line.strip())
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break
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else:
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# enum items
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print(" %s_%s" %(arch, line.strip()))
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if arch.upper() == 'AARCH64':
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# 3rd enum is Register alternate name indices
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enum_count = 0
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print("\n// Register alternate name indices")
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for line in lines:
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line = line.rstrip()
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'enum {':
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enum_count += 1
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if enum_count == 3:
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print(line)
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continue
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if enum_count == 3:
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if line.strip() == '};':
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# done with 2nd enum
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print(line.strip())
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break
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else:
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# enum items
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print(" %s_%s" %(arch, line.strip()))
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# 4th enum is Subregister indices
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enum_count = 0
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print("\n// Subregister indices")
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for line in lines:
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line = line.rstrip()
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'enum {' or 'enum :' in line.strip():
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enum_count += 1
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if enum_count == 4:
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print('enum {')
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continue
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if enum_count == 4:
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if line.strip() == '};':
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# done with 2nd enum
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print(line.strip())
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break
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else:
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# enum items
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print(" %s_%s" %(arch, line.strip()))
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# end of enum
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print("")
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print("#endif // GET_REGINFO_ENUM")
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print("""
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#ifdef GET_REGINFO_MC_DESC
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#undef GET_REGINFO_MC_DESC
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""")
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# extract RegDiffLists
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finding_struct = True
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for line in lines:
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line = line.rstrip()
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if len(line.strip()) == 0:
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continue
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if arch + 'RegDiffLists' in line:
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finding_struct = False
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print("static const MCPhysReg " + arch + "RegDiffLists[] = {")
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continue
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if finding_struct:
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continue
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else:
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print(line)
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if line == '};':
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# done with this struct
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print("")
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break
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# extract SubRegIdxLists
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finding_struct = True
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for line in lines:
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line = line.rstrip()
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if len(line.strip()) == 0:
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continue
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if arch + 'SubRegIdxLists' in line:
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finding_struct = False
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print("static const uint16_t " + arch + "SubRegIdxLists[] = {")
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continue
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if finding_struct:
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continue
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else:
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print(line)
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if line == '};':
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# done with this struct
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print("")
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break
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# extract RegDesc
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finding_struct = True
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for line in lines:
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line = line.rstrip()
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if len(line.strip()) == 0:
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continue
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if arch + 'RegDesc' in line:
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finding_struct = False
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print("static const MCRegisterDesc " + arch + "RegDesc[] = {")
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continue
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if finding_struct:
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continue
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else:
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print(line)
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if line == '};':
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# done with this struct
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print("")
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break
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# extract register classes
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finding_struct = True
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for line in lines:
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line = line.rstrip()
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if len(line.strip()) == 0:
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continue
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if 'Register classes' in line and 'namespace' in line:
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finding_struct = False
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continue
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if finding_struct:
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continue
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else:
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if 'const' in line:
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line2 = line.replace('const', 'static const')
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print(line2)
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elif '::' in line:
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line2 = line.replace('::', '_')
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print(line2)
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elif 'end anonymous namespace' in line:
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# done with this struct
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break
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else:
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print(line)
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print("\n")
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# extract MCRegisterClasses
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finding_struct = True
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for line in lines:
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line = line.rstrip()
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if len(line.strip()) == 0:
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continue
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if 'MCRegisterClass ' + arch + 'MCRegisterClasses[] = {' in line:
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finding_struct = False
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print("static const MCRegisterClass " + arch + "MCRegisterClasses[] = {")
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continue
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if finding_struct:
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continue
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else:
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if line == '};':
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# done with this struct
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print('};\n')
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break
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elif '::' in line:
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line = line.replace('::', '_')
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# { GR8, GR8Bits, 130, 20, sizeof(GR8Bits), X86_GR8RegClassID, 1, 1, 1, 1 },
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tmp = line.split(',')
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print(" %s, %s, %s }," %(tmp[0].strip(), tmp[1].strip(), tmp[4].strip()))
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print("#endif // GET_REGINFO_MC_DESC")
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