Initial Commit

thirdparty/capstone/tests/MC/AArch64/CSSC/abs_32.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x20, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "abs w0, w0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x21, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "abs w21, w10"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x21, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "abs w23, w13"
+
+  -
+    input:
+      bytes: [ 0xff, 0x23, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "abs wzr, wzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/abs_64.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x20, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "abs x0, x0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x21, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "abs x21, x10"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x21, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "abs x23, x13"
+
+  -
+    input:
+      bytes: [ 0xff, 0x23, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "abs xzr, xzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/cnt_32.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x1c, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "cnt w0, w0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x1d, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "cnt w21, w10"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x1d, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "cnt w23, w13"
+
+  -
+    input:
+      bytes: [ 0xff, 0x1f, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "cnt wzr, wzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/cnt_64.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x1c, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "cnt x0, x0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x1d, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "cnt x21, x10"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x1d, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "cnt x23, x13"
+
+  -
+    input:
+      bytes: [ 0xff, 0x1f, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "cnt xzr, xzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/ctz_32.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x18, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "ctz w0, w0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x19, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "ctz w21, w10"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x19, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "ctz w23, w13"
+
+  -
+    input:
+      bytes: [ 0xff, 0x1b, 0xc0, 0x5a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "ctz wzr, wzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/ctz_64.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x18, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "ctz x0, x0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x19, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "ctz x21, x10"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x19, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "ctz x23, x13"
+
+  -
+    input:
+      bytes: [ 0xff, 0x1b, 0xc0, 0xda ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "ctz xzr, xzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/smax_32_imm.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc0, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax w0, w0, #0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xc1, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax w21, w10, #85"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xc0, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax w23, w13, #59"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xc3, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax wzr, wzr, #-1"

thirdparty/capstone/tests/MC/AArch64/CSSC/smax_32_reg.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x60, 0xc0, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax w0, w0, w0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x61, 0xd5, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax w21, w10, w21"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x61, 0xc8, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax w23, w13, w8"
+
+  -
+    input:
+      bytes: [ 0xff, 0x63, 0xdf, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax wzr, wzr, wzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/smax_64_imm.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc0, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax x0, x0, #0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xc1, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax x21, x10, #85"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xc0, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax x23, x13, #59"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xc3, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax xzr, xzr, #-1"

thirdparty/capstone/tests/MC/AArch64/CSSC/smax_64_reg.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x60, 0xc0, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax x0, x0, x0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x61, 0xd5, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax x21, x10, x21"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x61, 0xc8, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax x23, x13, x8"
+
+  -
+    input:
+      bytes: [ 0xff, 0x63, 0xdf, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smax xzr, xzr, xzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/smin_32_imm.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc8, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin w0, w0, #0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xc9, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin w21, w10, #85"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xc8, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin w23, w13, #59"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xcb, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin wzr, wzr, #-1"

thirdparty/capstone/tests/MC/AArch64/CSSC/smin_32_reg.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x68, 0xc0, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin w0, w0, w0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x69, 0xd5, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin w21, w10, w21"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x69, 0xc8, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin w23, w13, w8"
+
+  -
+    input:
+      bytes: [ 0xff, 0x6b, 0xdf, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin wzr, wzr, wzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/smin_64_imm.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc8, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin x0, x0, #0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xc9, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin x21, x10, #85"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xc8, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin x23, x13, #59"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xcb, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin xzr, xzr, #-1"

thirdparty/capstone/tests/MC/AArch64/CSSC/smin_64_reg.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x68, 0xc0, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin x0, x0, x0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x69, 0xd5, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin x21, x10, x21"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x69, 0xc8, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin x23, x13, x8"
+
+  -
+    input:
+      bytes: [ 0xff, 0x6b, 0xdf, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "smin xzr, xzr, xzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/umax_32_imm.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc4, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax w0, w0, #0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xc5, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax w21, w10, #85"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xc4, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax w23, w13, #59"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xc7, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax wzr, wzr, #255"

thirdparty/capstone/tests/MC/AArch64/CSSC/umax_32_reg.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x64, 0xc0, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax w0, w0, w0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x65, 0xd5, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax w21, w10, w21"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x65, 0xc8, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax w23, w13, w8"
+
+  -
+    input:
+      bytes: [ 0xff, 0x67, 0xdf, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax wzr, wzr, wzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/umax_64_imm.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc4, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax x0, x0, #0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xc5, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax x21, x10, #85"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xc4, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax x23, x13, #59"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xc7, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax xzr, xzr, #255"

thirdparty/capstone/tests/MC/AArch64/CSSC/umax_64_reg.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x64, 0xc0, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax x0, x0, x0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x65, 0xd5, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax x21, x10, x21"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x65, 0xc8, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax x23, x13, x8"
+
+  -
+    input:
+      bytes: [ 0xff, 0x67, 0xdf, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umax xzr, xzr, xzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/umin_32_imm.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xcc, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin w0, w0, #0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xcd, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin w21, w10, #85"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xcc, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin w23, w13, #59"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xcf, 0x11 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin wzr, wzr, #255"

thirdparty/capstone/tests/MC/AArch64/CSSC/umin_32_reg.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x6c, 0xc0, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin w0, w0, w0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x6d, 0xd5, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin w21, w10, w21"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x6d, 0xc8, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin w23, w13, w8"
+
+  -
+    input:
+      bytes: [ 0xff, 0x6f, 0xdf, 0x1a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin wzr, wzr, wzr"

thirdparty/capstone/tests/MC/AArch64/CSSC/umin_64_imm.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xcc, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin x0, x0, #0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xcd, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin x21, x10, #85"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xcc, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin x23, x13, #59"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xcf, 0x91 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin xzr, xzr, #255"

thirdparty/capstone/tests/MC/AArch64/CSSC/umin_64_reg.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x6c, 0xc0, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin x0, x0, x0"
+
+  -
+    input:
+      bytes: [ 0x55, 0x6d, 0xd5, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin x21, x10, x21"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x6d, 0xc8, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin x23, x13, x8"
+
+  -
+    input:
+      bytes: [ 0xff, 0x6f, 0xdf, 0x9a ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v9.4a" ]
+    expected:
+      insns:
+        -
+          asm_text: "umin xzr, xzr, xzr"

thirdparty/capstone/tests/MC/AArch64/FP8/dot.s.yaml

@@ -0,0 +1,90 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x1f, 0xfc, 0x40, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8dot2", "+fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot v31.4h, v0.8b, v0.8b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0xfc, 0x5f, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8dot2", "+fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot v31.8h, v0.16b, v31.16b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xfc, 0x1f, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8dot2", "+fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot v0.2s, v0.8b, v31.8b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0xfc, 0x1f, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8dot2", "+fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot v31.4s, v0.16b, v31.16b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x03, 0x4f, 0x0f ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8dot2", "+fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot v31.4h, v31.8b, v15.2b[0]"
+
+  -
+    input:
+      bytes: [ 0xda, 0x02, 0x49, 0x4f ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8dot2", "+fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot v26.8h, v22.16b, v9.2b[0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x08, 0x7f, 0x4f ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8dot2", "+fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot v0.8h, v0.16b, v15.2b[7]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x1f, 0x0f ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8dot2", "+fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot v0.2s, v0.8b, v31.4b[0]"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x0b, 0x20, 0x4f ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8dot2", "+fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot v0.4s, v31.16b, v0.4b[3]"

thirdparty/capstone/tests/MC/AArch64/FP8/faminmax.s.yaml

@@ -0,0 +1,300 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0xff, 0x1f, 0xdf, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v31.4h, v31.4h, v31.4h"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x1c, 0xdf, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v31.4h, v0.4h, v31.4h"
+
+  -
+    input:
+      bytes: [ 0x00, 0x1c, 0xc0, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v0.4h, v0.4h, v0.4h"
+
+  -
+    input:
+      bytes: [ 0xff, 0x1f, 0xdf, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v31.8h, v31.8h, v31.8h"
+
+  -
+    input:
+      bytes: [ 0xff, 0x1f, 0xc0, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v31.8h, v31.8h, v0.8h"
+
+  -
+    input:
+      bytes: [ 0x00, 0x1c, 0xc0, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v0.8h, v0.8h, v0.8h"
+
+  -
+    input:
+      bytes: [ 0xff, 0xdf, 0xbf, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v31.2s, v31.2s, v31.2s"
+
+  -
+    input:
+      bytes: [ 0x1f, 0xdc, 0xa0, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v31.2s, v0.2s, v0.2s"
+
+  -
+    input:
+      bytes: [ 0x00, 0xdc, 0xa0, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v0.2s, v0.2s, v0.2s"
+
+  -
+    input:
+      bytes: [ 0xff, 0xdf, 0xbf, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v31.4s, v31.4s, v31.4s"
+
+  -
+    input:
+      bytes: [ 0xe0, 0xdf, 0xbf, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v0.4s, v31.4s, v31.4s"
+
+  -
+    input:
+      bytes: [ 0x00, 0xdc, 0xa0, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v0.4s, v0.4s, v0.4s"
+
+  -
+    input:
+      bytes: [ 0xff, 0xdf, 0xff, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v31.2d, v31.2d, v31.2d"
+
+  -
+    input:
+      bytes: [ 0x00, 0xdc, 0xff, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v0.2d, v0.2d, v31.2d"
+
+  -
+    input:
+      bytes: [ 0x00, 0xdc, 0xe0, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax v0.2d, v0.2d, v0.2d"
+
+  -
+    input:
+      bytes: [ 0xff, 0x1f, 0xdf, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v31.4h, v31.4h, v31.4h"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x1c, 0xdf, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v31.4h, v0.4h, v31.4h"
+
+  -
+    input:
+      bytes: [ 0x00, 0x1c, 0xc0, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v0.4h, v0.4h, v0.4h"
+
+  -
+    input:
+      bytes: [ 0xff, 0x1f, 0xdf, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v31.8h, v31.8h, v31.8h"
+
+  -
+    input:
+      bytes: [ 0xff, 0x1f, 0xc0, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v31.8h, v31.8h, v0.8h"
+
+  -
+    input:
+      bytes: [ 0x00, 0x1c, 0xc0, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v0.8h, v0.8h, v0.8h"
+
+  -
+    input:
+      bytes: [ 0xff, 0xdf, 0xbf, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v31.2s, v31.2s, v31.2s"
+
+  -
+    input:
+      bytes: [ 0x1f, 0xdc, 0xa0, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v31.2s, v0.2s, v0.2s"
+
+  -
+    input:
+      bytes: [ 0x00, 0xdc, 0xa0, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v0.2s, v0.2s, v0.2s"
+
+  -
+    input:
+      bytes: [ 0xff, 0xdf, 0xbf, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v31.4s, v31.4s, v31.4s"
+
+  -
+    input:
+      bytes: [ 0xe0, 0xdf, 0xbf, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v0.4s, v31.4s, v31.4s"
+
+  -
+    input:
+      bytes: [ 0x00, 0xdc, 0xa0, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v0.4s, v0.4s, v0.4s"
+
+  -
+    input:
+      bytes: [ 0xff, 0xdf, 0xff, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v31.2d, v31.2d, v31.2d"
+
+  -
+    input:
+      bytes: [ 0x00, 0xdc, 0xff, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v0.2d, v0.2d, v31.2d"
+
+  -
+    input:
+      bytes: [ 0x00, 0xdc, 0xe0, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin v0.2d, v0.2d, v0.2d"

thirdparty/capstone/tests/MC/AArch64/FP8/luti2.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x41, 0x10, 0x80, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti2 v1.16b, { v2.16b }, v0[0]"
+
+  -
+    input:
+      bytes: [ 0x9e, 0x72, 0x9f, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti2 v30.16b, { v20.16b }, v31[3]"
+
+  -
+    input:
+      bytes: [ 0x41, 0x00, 0xc0, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti2 v1.8h, { v2.8h }, v0[0]"
+
+  -
+    input:
+      bytes: [ 0x9e, 0x72, 0xdf, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti2 v30.8h, { v20.8h }, v31[7]"

thirdparty/capstone/tests/MC/AArch64/FP8/luti4.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x41, 0x20, 0x40, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 v1.16b, { v2.16b }, v0[0]"
+
+  -
+    input:
+      bytes: [ 0x9e, 0x62, 0x5f, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 v30.16b, { v20.16b }, v31[1]"
+
+  -
+    input:
+      bytes: [ 0x41, 0x10, 0x40, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 v1.8h, { v2.8h, v3.8h }, v0[0]"
+
+  -
+    input:
+      bytes: [ 0x9e, 0x72, 0x5f, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 v30.8h, { v20.8h, v21.8h }, v31[3]"

thirdparty/capstone/tests/MC/AArch64/FP8/miscellaneous-fp8.s.yaml

@@ -0,0 +1,510 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x78, 0xa1, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtl v0.8h, v0.8b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x7b, 0xa1, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtl v0.8h, v31.8b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x7b, 0xa1, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtl v31.8h, v31.8b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x78, 0xa1, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtl2 v0.8h, v0.16b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x7b, 0xa1, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtl2 v0.8h, v31.16b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x7b, 0xa1, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtl2 v31.8h, v31.16b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x78, 0xe1, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtl v0.8h, v0.8b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x7b, 0xe1, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtl v0.8h, v31.8b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x7b, 0xe1, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtl v31.8h, v31.8b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x78, 0xe1, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtl2 v0.8h, v0.16b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x7b, 0xe1, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtl2 v0.8h, v31.16b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x7b, 0xe1, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtl2 v31.8h, v31.16b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x78, 0x21, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtl v0.8h, v0.8b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x7b, 0x21, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtl v0.8h, v31.8b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x7b, 0x21, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtl v31.8h, v31.8b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x78, 0x21, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtl2 v0.8h, v0.16b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x7b, 0x21, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtl2 v0.8h, v31.16b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x7b, 0x21, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtl2 v31.8h, v31.16b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x78, 0x61, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtl v0.8h, v0.8b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x7b, 0x61, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtl v0.8h, v31.8b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x7b, 0x61, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtl v31.8h, v31.8b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x78, 0x61, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtl2 v0.8h, v0.16b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x7b, 0x61, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtl2 v0.8h, v31.16b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x7b, 0x61, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtl2 v31.8h, v31.16b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xf7, 0x5f, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn v31.8b, v31.4h, v31.4h"
+
+  -
+    input:
+      bytes: [ 0x1f, 0xf4, 0x40, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn v31.8b, v0.4h, v0.4h"
+
+  -
+    input:
+      bytes: [ 0x00, 0xf4, 0x40, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn v0.8b, v0.4h, v0.4h"
+
+  -
+    input:
+      bytes: [ 0x00, 0xf4, 0x40, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn v0.16b, v0.8h, v0.8h"
+
+  -
+    input:
+      bytes: [ 0x1f, 0xf4, 0x40, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn v31.16b, v0.8h, v0.8h"
+
+  -
+    input:
+      bytes: [ 0xff, 0xf7, 0x5f, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn v31.16b, v31.8h, v31.8h"
+
+  -
+    input:
+      bytes: [ 0x00, 0xf4, 0x00, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn v0.8b, v0.4s, v0.4s"
+
+  -
+    input:
+      bytes: [ 0xe0, 0xf7, 0x1f, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn v0.8b, v31.4s, v31.4s"
+
+  -
+    input:
+      bytes: [ 0xff, 0xf7, 0x1f, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn v31.8b, v31.4s, v31.4s"
+
+  -
+    input:
+      bytes: [ 0x00, 0xf4, 0x00, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn2 v0.16b, v0.4s, v0.4s"
+
+  -
+    input:
+      bytes: [ 0x00, 0xf4, 0x1f, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn2 v0.16b, v0.4s, v31.4s"
+
+  -
+    input:
+      bytes: [ 0xff, 0xf7, 0x1f, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn2 v31.16b, v31.4s, v31.4s"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0xc0, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v0.4h, v0.4h, v0.4h"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x3f, 0xdf, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v0.4h, v31.4h, v31.4h"
+
+  -
+    input:
+      bytes: [ 0xff, 0x3f, 0xdf, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v31.4h, v31.4h, v31.4h"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0xc0, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v0.8h, v0.8h, v0.8h"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x3c, 0xc0, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v31.8h, v0.8h, v0.8h"
+
+  -
+    input:
+      bytes: [ 0xff, 0x3f, 0xdf, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v31.8h, v31.8h, v31.8h"
+
+  -
+    input:
+      bytes: [ 0x00, 0xfc, 0xa0, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v0.2s, v0.2s, v0.2s"
+
+  -
+    input:
+      bytes: [ 0x00, 0xfc, 0xbf, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v0.2s, v0.2s, v31.2s"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xbf, 0x2e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v31.2s, v31.2s, v31.2s"
+
+  -
+    input:
+      bytes: [ 0x00, 0xfc, 0xa0, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v0.4s, v0.4s, v0.4s"
+
+  -
+    input:
+      bytes: [ 0xe0, 0xff, 0xa0, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v0.4s, v31.4s, v0.4s"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xbf, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v31.4s, v31.4s, v31.4s"
+
+  -
+    input:
+      bytes: [ 0x00, 0xfc, 0xe0, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v0.2d, v0.2d, v0.2d"
+
+  -
+    input:
+      bytes: [ 0xe0, 0xff, 0xe0, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v0.2d, v31.2d, v0.2d"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xff, 0x6e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale v31.2d, v31.2d, v31.2d"

thirdparty/capstone/tests/MC/AArch64/FP8/mla.s.yaml

@@ -0,0 +1,130 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0xfc, 0xc0, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalb v0.8h, v0.16b, v0.16b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0xdf, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalt v31.8h, v31.16b, v31.16b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xc4, 0x1f, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbb v0.4s, v0.16b, v31.16b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xc7, 0x40, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbt v31.4s, v31.16b, v0.16b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xc7, 0x00, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltb v31.4s, v31.16b, v0.16b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xc4, 0x5f, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltt v0.4s, v0.16b, v31.16b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xc7, 0x5f, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltt v31.4s, v31.16b, v31.16b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x00, 0xc0, 0x0f ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalb v31.8h, v0.16b, v0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x08, 0xf8, 0x4f ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalt v31.8h, v0.16b, v0.b[15]"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x80, 0x07, 0x2f ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbb v31.4s, v0.16b, v7.b[0]"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x80, 0x47, 0x6f ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltt v31.4s, v0.16b, v7.b[0]"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x8b, 0x3f, 0x6f ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltb v0.4s, v31.16b, v7.b[15]"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x8b, 0x78, 0x2f ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbt v0.4s, v31.16b, v0.b[15]"

thirdparty/capstone/tests/MC/AArch64/FP8/system-regs.s.yaml

@@ -0,0 +1,30 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x43, 0x44, 0x3b, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fpmr" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, FPMR"
+
+  -
+    input:
+      bytes: [ 0xe3, 0x04, 0x38, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fpmr" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, ID_AA64FPFR0_EL1"
+
+  -
+    input:
+      bytes: [ 0x43, 0x44, 0x1b, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "fpmr" ]
+    expected:
+      insns:
+        -
+          asm_text: "msr FPMR, x3"

thirdparty/capstone/tests/MC/AArch64/FP8_SME2/cvt.s.yaml

@@ -0,0 +1,240 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x26, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvt { z0.h, z1.h }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xfe, 0xe3, 0x26, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvt { z30.h, z31.h }, z31.b"
+
+  -
+    input:
+      bytes: [ 0x01, 0xe0, 0x26, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtl { z0.h, z1.h }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xe3, 0x26, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtl { z30.h, z31.h }, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x66, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvt { z0.h, z1.h }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xfe, 0xe3, 0x66, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvt { z30.h, z31.h }, z31.b"
+
+  -
+    input:
+      bytes: [ 0x01, 0xe0, 0x66, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtl { z0.h, z1.h }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xe3, 0x66, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtl { z30.h, z31.h }, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0xe6, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvt { z0.h, z1.h }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xfe, 0xe3, 0xe6, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvt { z30.h, z31.h }, z31.b"
+
+  -
+    input:
+      bytes: [ 0x01, 0xe0, 0xe6, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtl { z0.h, z1.h }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xe3, 0xe6, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtl { z30.h, z31.h }, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0xa6, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvt { z0.h, z1.h }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xfe, 0xe3, 0xa6, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvt { z30.h, z31.h }, z31.b"
+
+  -
+    input:
+      bytes: [ 0x01, 0xe0, 0xa6, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtl { z0.h, z1.h }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xe3, 0xa6, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtl { z30.h, z31.h }, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x24, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvt z0.b, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0xdf, 0xe3, 0x24, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvt z31.b, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x34, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvt z0.b, { z0.s - z3.s }"
+
+  -
+    input:
+      bytes: [ 0x9f, 0xe3, 0x34, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvt z31.b, { z28.s - z31.s }"
+
+  -
+    input:
+      bytes: [ 0x20, 0xe0, 0x34, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn z0.b, { z0.s - z3.s }"
+
+  -
+    input:
+      bytes: [ 0xbf, 0xe3, 0x34, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn z31.b, { z28.s - z31.s }"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x64, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfcvt z0.b, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0xdf, 0xe3, 0x64, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfcvt z31.b, { z30.h, z31.h }"

thirdparty/capstone/tests/MC/AArch64/FP8_SME2/dot.s.yaml

@@ -0,0 +1,560 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x08, 0x10, 0x20, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0x08, 0x10, 0x20, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xaf, 0x71, 0x28, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx2], { z13.b, z14.b }, z8.b"
+
+  -
+    input:
+      bytes: [ 0xef, 0x73, 0x2f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx2], { z31.b, z0.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0x18, 0x10, 0x20, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0x18, 0x10, 0x20, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x73, 0x2f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx2], { z31.b, z0.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x73, 0x2f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx2], { z31.b, z0.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0x20, 0x10, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
+
+  -
+    input:
+      bytes: [ 0x20, 0x10, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
+
+  -
+    input:
+      bytes: [ 0xe7, 0x73, 0xbe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
+
+  -
+    input:
+      bytes: [ 0xe7, 0x73, 0xbe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
+
+  -
+    input:
+      bytes: [ 0x30, 0x10, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
+
+  -
+    input:
+      bytes: [ 0x30, 0x10, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
+
+  -
+    input:
+      bytes: [ 0xf7, 0x73, 0xbe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
+
+  -
+    input:
+      bytes: [ 0xf7, 0x73, 0xbe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
+
+  -
+    input:
+      bytes: [ 0x20, 0x00, 0xd0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x20, 0x00, 0xd0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x6f, 0xdf, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx2], { z30.b, z31.b }, z15.b[7]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x6f, 0xdf, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx2], { z30.b, z31.b }, z15.b[7]"
+
+  -
+    input:
+      bytes: [ 0x38, 0x00, 0x50, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x38, 0x00, 0x50, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xff, 0x6f, 0x5f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx2], { z30.b, z31.b }, z15.b[3]"
+
+  -
+    input:
+      bytes: [ 0xff, 0x6f, 0x5f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx2], { z30.b, z31.b }, z15.b[3]"
+
+  -
+    input:
+      bytes: [ 0x08, 0x10, 0x30, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx4], { z0.b - z3.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0x08, 0x10, 0x30, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx4], { z0.b - z3.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xef, 0x73, 0x3f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0xef, 0x73, 0x3f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0x18, 0x10, 0x30, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0x18, 0x10, 0x30, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x73, 0x3f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x73, 0x3f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0x20, 0x10, 0xa1, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
+
+  -
+    input:
+      bytes: [ 0x20, 0x10, 0xa1, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x73, 0xbd, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x73, 0xbd, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
+
+  -
+    input:
+      bytes: [ 0x40, 0x90, 0x10, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x30, 0x10, 0xa1, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
+
+  -
+    input:
+      bytes: [ 0x30, 0x10, 0xa1, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x73, 0xbd, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x73, 0xbd, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
+
+  -
+    input:
+      bytes: [ 0x40, 0x90, 0x10, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xcf, 0xff, 0x1f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx4], { z28.b - z31.b }, z15.b[7]"
+
+  -
+    input:
+      bytes: [ 0xcf, 0xff, 0x1f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.h[w11, 7, vgx4], { z28.b - z31.b }, z15.b[7]"
+
+  -
+    input:
+      bytes: [ 0x08, 0x80, 0x50, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x08, 0x80, 0x50, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x8f, 0xef, 0x5f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx4], { z28.b - z31.b }, z15.b[3]"
+
+  -
+    input:
+      bytes: [ 0x8f, 0xef, 0x5f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot za.s[w11, 7, vgx4], { z28.b - z31.b }, z15.b[3]"
+
+  -
+    input:
+      bytes: [ 0x20, 0x10, 0xd0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fvdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x20, 0x10, 0xd0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fvdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xdf, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fvdot za.h[w11, 7, vgx2], { z30.b, z31.b }, z15.b[7]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xdf, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fvdot za.h[w11, 7, vgx2], { z30.b, z31.b }, z15.b[7]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x08, 0xd0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fvdotb za.s[w8, 0, vgx4], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xcf, 0x6f, 0xdf, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fvdotb za.s[w11, 7, vgx4], { z30.b, z31.b }, z15.b[3]"
+
+  -
+    input:
+      bytes: [ 0x10, 0x08, 0xd0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fvdott za.s[w8, 0, vgx4], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x6f, 0xdf, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fvdott za.s[w11, 7, vgx4], { z30.b, z31.b }, z15.b[3]"

thirdparty/capstone/tests/MC/AArch64/FP8_SME2/faminmax.s.yaml

@@ -0,0 +1,240 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x40, 0xb1, 0x60, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z0.h, z1.h }, { z0.h, z1.h }, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0x5e, 0xb1, 0x7e, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z30.h, z31.h }, { z30.h, z31.h }, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x40, 0xb1, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z0.s, z1.s }, { z0.s, z1.s }, { z0.s, z1.s }"
+
+  -
+    input:
+      bytes: [ 0x5e, 0xb1, 0xbe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z30.s, z31.s }, { z30.s, z31.s }, { z30.s, z31.s }"
+
+  -
+    input:
+      bytes: [ 0x40, 0xb1, 0xe0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z0.d, z1.d }, { z0.d, z1.d }, { z0.d, z1.d }"
+
+  -
+    input:
+      bytes: [ 0x5e, 0xb1, 0xfe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z30.d, z31.d }, { z30.d, z31.d }, { z30.d, z31.d }"
+
+  -
+    input:
+      bytes: [ 0x40, 0xb9, 0x60, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }"
+
+  -
+    input:
+      bytes: [ 0x5c, 0xb9, 0x7c, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z28.h - z31.h }, { z28.h - z31.h }, { z28.h - z31.h }"
+
+  -
+    input:
+      bytes: [ 0x40, 0xb9, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }"
+
+  -
+    input:
+      bytes: [ 0x5c, 0xb9, 0xbc, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z28.s - z31.s }, { z28.s - z31.s }, { z28.s - z31.s }"
+
+  -
+    input:
+      bytes: [ 0x40, 0xb9, 0x60, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }"
+
+  -
+    input:
+      bytes: [ 0x5c, 0xb9, 0x7c, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax { z28.h - z31.h }, { z28.h - z31.h }, { z28.h - z31.h }"
+
+  -
+    input:
+      bytes: [ 0x41, 0xb1, 0x60, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z0.h, z1.h }, { z0.h, z1.h }, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0x5f, 0xb1, 0x7e, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z30.h, z31.h }, { z30.h, z31.h }, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x41, 0xb1, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z0.s, z1.s }, { z0.s, z1.s }, { z0.s, z1.s }"
+
+  -
+    input:
+      bytes: [ 0x5f, 0xb1, 0xbe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z30.s, z31.s }, { z30.s, z31.s }, { z30.s, z31.s }"
+
+  -
+    input:
+      bytes: [ 0x41, 0xb1, 0xe0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z0.d, z1.d }, { z0.d, z1.d }, { z0.d, z1.d }"
+
+  -
+    input:
+      bytes: [ 0x5f, 0xb1, 0xfe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z30.d, z31.d }, { z30.d, z31.d }, { z30.d, z31.d }"
+
+  -
+    input:
+      bytes: [ 0x41, 0xb9, 0x60, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }"
+
+  -
+    input:
+      bytes: [ 0x5d, 0xb9, 0x7c, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z28.h - z31.h }, { z28.h - z31.h }, { z28.h - z31.h }"
+
+  -
+    input:
+      bytes: [ 0x41, 0xb9, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }"
+
+  -
+    input:
+      bytes: [ 0x5d, 0xb9, 0xbc, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z28.s - z31.s }, { z28.s - z31.s }, { z28.s - z31.s }"
+
+  -
+    input:
+      bytes: [ 0x41, 0xb9, 0xe0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }"
+
+  -
+    input:
+      bytes: [ 0x5d, 0xb9, 0xfc, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin { z28.d - z31.d }, { z28.d - z31.d }, { z28.d - z31.d }"

thirdparty/capstone/tests/MC/AArch64/FP8_SME2/fscale.s.yaml

@@ -0,0 +1,240 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x80, 0xa1, 0x60, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.h, z1.h }, { z0.h, z1.h }, z0.h"
+
+  -
+    input:
+      bytes: [ 0x9e, 0xa1, 0x6f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z30.h, z31.h }, { z30.h, z31.h }, z15.h"
+
+  -
+    input:
+      bytes: [ 0x80, 0xa1, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.s, z1.s }, { z0.s, z1.s }, z0.s"
+
+  -
+    input:
+      bytes: [ 0x9e, 0xa1, 0xaf, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z30.s, z31.s }, { z30.s, z31.s }, z15.s"
+
+  -
+    input:
+      bytes: [ 0x80, 0xa1, 0xe0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.d, z1.d }, { z0.d, z1.d }, z0.d"
+
+  -
+    input:
+      bytes: [ 0x9e, 0xa1, 0xef, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z30.d, z31.d }, { z30.d, z31.d }, z15.d"
+
+  -
+    input:
+      bytes: [ 0x80, 0xb1, 0x60, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.h, z1.h }, { z0.h, z1.h }, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0x9e, 0xb1, 0x7e, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z30.h, z31.h }, { z30.h, z31.h }, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x80, 0xb1, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.s, z1.s }, { z0.s, z1.s }, { z0.s, z1.s }"
+
+  -
+    input:
+      bytes: [ 0x9e, 0xb1, 0xbe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z30.s, z31.s }, { z30.s, z31.s }, { z30.s, z31.s }"
+
+  -
+    input:
+      bytes: [ 0x80, 0xb1, 0xe0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.d, z1.d }, { z0.d, z1.d }, { z0.d, z1.d }"
+
+  -
+    input:
+      bytes: [ 0x9e, 0xb1, 0xfe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z30.d, z31.d }, { z30.d, z31.d }, { z30.d, z31.d }"
+
+  -
+    input:
+      bytes: [ 0x80, 0xa9, 0x60, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.h - z3.h }, { z0.h - z3.h }, z0.h"
+
+  -
+    input:
+      bytes: [ 0x9c, 0xa9, 0x6f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z28.h - z31.h }, { z28.h - z31.h }, z15.h"
+
+  -
+    input:
+      bytes: [ 0x80, 0xa9, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.s - z3.s }, { z0.s - z3.s }, z0.s"
+
+  -
+    input:
+      bytes: [ 0x9c, 0xa9, 0xaf, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z28.s - z31.s }, { z28.s - z31.s }, z15.s"
+
+  -
+    input:
+      bytes: [ 0x80, 0xa9, 0xe0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.d - z3.d }, { z0.d - z3.d }, z0.d"
+
+  -
+    input:
+      bytes: [ 0x9c, 0xa9, 0xef, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z28.d - z31.d }, { z28.d - z31.d }, z15.d"
+
+  -
+    input:
+      bytes: [ 0x80, 0xb9, 0x60, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }"
+
+  -
+    input:
+      bytes: [ 0x9c, 0xb9, 0x7c, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z28.h - z31.h }, { z28.h - z31.h }, { z28.h - z31.h }"
+
+  -
+    input:
+      bytes: [ 0x80, 0xb9, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }"
+
+  -
+    input:
+      bytes: [ 0x9c, 0xb9, 0xbc, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z28.s - z31.s }, { z28.s - z31.s }, { z28.s - z31.s }"
+
+  -
+    input:
+      bytes: [ 0x80, 0xb9, 0xe0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }"
+
+  -
+    input:
+      bytes: [ 0x9c, 0xb9, 0xfc, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fscale { z28.d - z31.d }, { z28.d - z31.d }, { z28.d - z31.d }"

thirdparty/capstone/tests/MC/AArch64/FP8_SME2/lut.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x8b, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme2p1", "+sme-lutv2" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 { z0.b - z3.b }, zt0, { z0, z1 }"
+
+  -
+    input:
+      bytes: [ 0xdc, 0x03, 0x8b, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme2p1", "+sme-lutv2" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 { z28.b - z31.b }, zt0, { z30, z31 }"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x9b, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme2p1", "+sme-lutv2" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 { z0.b, z4.b, z8.b, z12.b }, zt0, { z0, z1 }"
+
+  -
+    input:
+      bytes: [ 0xd3, 0x03, 0x9b, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme2p1", "+sme-lutv2" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 { z19.b, z23.b, z27.b, z31.b }, zt0, { z30, z31 }"

thirdparty/capstone/tests/MC/AArch64/FP8_SME2/mla.s.yaml

@@ -0,0 +1,560 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x0c, 0x30, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1], z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe7, 0x6f, 0x3f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 14:15], z31.b, z15.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1], z0.b, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xef, 0xcf, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 14:15], z31.b, z15.b[15]"
+
+  -
+    input:
+      bytes: [ 0x04, 0x08, 0x20, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0x04, 0x08, 0x20, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe7, 0x6b, 0x2f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx2], { z31.b, z0.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0xe7, 0x6b, 0x2f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx2], { z31.b, z0.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0x20, 0x08, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
+
+  -
+    input:
+      bytes: [ 0x20, 0x08, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
+
+  -
+    input:
+      bytes: [ 0xe3, 0x6b, 0xbe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
+
+  -
+    input:
+      bytes: [ 0xe3, 0x6b, 0xbe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
+
+  -
+    input:
+      bytes: [ 0x30, 0x10, 0x90, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x30, 0x10, 0x90, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx2], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xff, 0x7f, 0x9f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx2], { z30.b, z31.b }, z15.b[15]"
+
+  -
+    input:
+      bytes: [ 0xff, 0x7f, 0x9f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx2], { z30.b, z31.b }, z15.b[15]"
+
+  -
+    input:
+      bytes: [ 0x04, 0x08, 0x30, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0x04, 0x08, 0x30, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe7, 0x6b, 0x3f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0xe7, 0x6b, 0x3f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0x20, 0x08, 0xa1, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
+
+  -
+    input:
+      bytes: [ 0x20, 0x08, 0xa1, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
+
+  -
+    input:
+      bytes: [ 0xa3, 0x6b, 0xbd, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
+
+  -
+    input:
+      bytes: [ 0xa3, 0x6b, 0xbd, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
+
+  -
+    input:
+      bytes: [ 0x20, 0x90, 0x90, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x20, 0x90, 0x90, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w8, 0:1, vgx4], { z0.b - z3.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xaf, 0xff, 0x9f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx4], { z28.b - z31.b }, z15.b[15]"
+
+  -
+    input:
+      bytes: [ 0xaf, 0xff, 0x9f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlal za.h[w11, 6:7, vgx4], { z28.b - z31.b }, z15.b[15]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x04, 0x30, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3], z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe3, 0x67, 0x3f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 12:15], z31.b, z15.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x40, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3], z0.b, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xe3, 0xff, 0x4f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 12:15], z31.b, z15.b[15]"
+
+  -
+    input:
+      bytes: [ 0x02, 0x00, 0x20, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3,  vgx2], { z0.b, z1.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0x02, 0x00, 0x20, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3,  vgx2], { z0.b, z1.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe3, 0x63, 0x2f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7,  vgx2], { z31.b, z0.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0xe3, 0x63, 0x2f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7,  vgx2], { z31.b, z0.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0x20, 0x00, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
+
+  -
+    input:
+      bytes: [ 0x20, 0x00, 0xa0, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }"
+
+  -
+    input:
+      bytes: [ 0xe1, 0x63, 0xbe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
+
+  -
+    input:
+      bytes: [ 0xe1, 0x63, 0xbe, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }"
+
+  -
+    input:
+      bytes: [ 0x20, 0x00, 0x90, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x20, 0x00, 0x90, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xe7, 0x6f, 0x9f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]"
+
+  -
+    input:
+      bytes: [ 0xe7, 0x6f, 0x9f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]"
+
+  -
+    input:
+      bytes: [ 0x02, 0x00, 0x30, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3,  vgx4], { z0.b - z3.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0x02, 0x00, 0x30, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3,  vgx4], { z0.b - z3.b }, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe3, 0x63, 0x3f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7,  vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0xe3, 0x63, 0x3f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7,  vgx4], { z31.b, z0.b, z1.b, z2.b }, z15.b"
+
+  -
+    input:
+      bytes: [ 0x20, 0x00, 0xa1, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
+
+  -
+    input:
+      bytes: [ 0x20, 0x00, 0xa1, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }"
+
+  -
+    input:
+      bytes: [ 0xa1, 0x63, 0xbd, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
+
+  -
+    input:
+      bytes: [ 0xa1, 0x63, 0xbd, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7, vgx4], { z28.b - z31.b }, { z28.b - z31.b }"
+
+  -
+    input:
+      bytes: [ 0x40, 0x80, 0x10, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x40, 0x80, 0x10, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xc7, 0xef, 0x1f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7, vgx4], { z28.b - z31.b }, z15.b[15]"
+
+  -
+    input:
+      bytes: [ 0xc7, 0xef, 0x1f, 0xc1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlall za.s[w11, 4:7, vgx4], { z28.b - z31.b }, z15.b[15]"

thirdparty/capstone/tests/MC/AArch64/FP8_SME2/mopa.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x08, 0x00, 0xa0, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za0.h, p0/m, p0/m, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe9, 0xff, 0xbf, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.h, p7/m, p7/m, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xa0, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za0.s, p0/m, p0/m, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe3, 0xff, 0xbf, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f8f16", "+sme-f8f32" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za3.s, p7/m, p7/m, z31.b, z31.b"

thirdparty/capstone/tests/MC/AArch64/FP8_SME2/movt.s.yaml

@@ -0,0 +1,20 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0xe0, 0x03, 0x4f, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-lutv2" ]
+    expected:
+      insns:
+        -
+          asm_text: "movt zt0, z0"
+
+  -
+    input:
+      bytes: [ 0xff, 0x33, 0x4f, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+sme-lutv2" ]
+    expected:
+      insns:
+        -
+          asm_text: "movt zt0[3, mul vl], z31"

thirdparty/capstone/tests/MC/AArch64/FP8_SVE2/faminmax.s.yaml

@@ -0,0 +1,480 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x4f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z0.h, p0/m, z0.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0x4f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z23.h, p3/m, z23.h, z13.h"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0x4f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z31.h, p7/m, z31.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x8f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z0.s, p0/m, z0.s, z1.s"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0x8f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z23.s, p3/m, z23.s, z13.s"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0x8f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z31.s, p7/m, z31.s, z30.s"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0xcf, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z0.d, p0/m, z0.d, z1.d"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0xcf, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z23.d, p3/m, z23.d, z13.d"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0xcf, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z31.d, p7/m, z31.d, z30.d"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x4e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z0.h, p0/m, z0.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0x4e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z23.h, p3/m, z23.h, z13.h"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0x4e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z31.h, p7/m, z31.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x8e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z0.s, p0/m, z0.s, z1.s"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0x8e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z23.s, p3/m, z23.s, z13.s"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0x8e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z31.s, p7/m, z31.s, z30.s"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0xce, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z0.d, p0/m, z0.d, z1.d"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0xce, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z23.d, p3/m, z23.d, z13.d"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0xce, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z31.d, p7/m, z31.d, z30.d"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x4f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z0.h, p0/m, z0.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0x4f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z23.h, p3/m, z23.h, z13.h"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0x4f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z31.h, p7/m, z31.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x8f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z0.s, p0/m, z0.s, z1.s"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0x8f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z23.s, p3/m, z23.s, z13.s"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0x8f, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z31.s, p7/m, z31.s, z30.s"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0xcf, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z0.d, p0/m, z0.d, z1.d"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0xcf, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z23.d, p3/m, z23.d, z13.d"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0xcf, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famin z31.d, p7/m, z31.d, z30.d"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x4e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z0.h, p0/m, z0.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0x4e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z23.h, p3/m, z23.h, z13.h"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0x4e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z31.h, p7/m, z31.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x8e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z0.s, p0/m, z0.s, z1.s"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0x8e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z23.s, p3/m, z23.s, z13.s"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0x8e, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z31.s, p7/m, z31.s, z30.s"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0xce, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z0.d, p0/m, z0.d, z1.d"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0xce, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z23.d, p3/m, z23.d, z13.d"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x9f, 0xce, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+faminmax" ]
+    expected:
+      insns:
+        -
+          asm_text: "famax z31.d, p7/m, z31.d, z30.d"

thirdparty/capstone/tests/MC/AArch64/FP8_SVE2/fcvt.s.yaml

@@ -0,0 +1,640 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x30, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x33, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x30, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x33, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x34, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x37, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x34, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x37, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x38, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x3b, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x38, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x3b, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x3f, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x3c, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x3f, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x30, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtlt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x33, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtlt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x30, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtlt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x33, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtlt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x34, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtlt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x37, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtlt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x34, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtlt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x37, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtlt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x38, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtlt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x3b, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtlt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x38, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtlt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x3b, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtlt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtlt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x3f, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtlt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x3c, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtlt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x3f, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtlt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x30, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x33, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x30, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x33, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x34, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x37, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x34, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x37, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x38, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x3b, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x38, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x3b, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x3f, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x3c, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x3f, 0x08, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x30, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtlt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x33, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtlt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x30, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtlt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x33, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f1cvtlt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x34, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtlt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x37, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtlt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x34, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtlt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x37, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "f2cvtlt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x38, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtlt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x3b, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtlt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x38, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtlt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x3b, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf1cvtlt z31.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtlt z0.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xe0, 0x3f, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtlt z0.h, z31.b"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x3c, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtlt z31.h, z0.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x3f, 0x09, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bf2cvtlt z31.h, z31.b"

thirdparty/capstone/tests/MC/AArch64/FP8_SVE2/fcvtn.s.yaml

@@ -0,0 +1,320 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x30, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn z0.b, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0xc0, 0x33, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn z0.b, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x30, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn z31.b, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x33, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn z31.b, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x00, 0x34, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnb z0.b, { z0.s, z1.s }"
+
+  -
+    input:
+      bytes: [ 0xc0, 0x37, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnb z0.b, { z30.s, z31.s }"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x34, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnb z31.b, { z0.s, z1.s }"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x37, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnb z31.b, { z30.s, z31.s }"
+
+  -
+    input:
+      bytes: [ 0x00, 0x38, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfcvtn z0.b, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0xc0, 0x3b, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfcvtn z0.b, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x38, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfcvtn z31.b, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x3b, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfcvtn z31.b, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnt z0.b, { z0.s, z1.s }"
+
+  -
+    input:
+      bytes: [ 0xc0, 0x3f, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnt z0.b, { z30.s, z31.s }"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x3c, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnt z31.b, { z0.s, z1.s }"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x3f, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnt z31.b, { z30.s, z31.s }"
+
+  -
+    input:
+      bytes: [ 0x00, 0x30, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn z0.b, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0xc0, 0x33, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn z0.b, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x30, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn z31.b, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x33, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtn z31.b, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x00, 0x34, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnb z0.b, { z0.s, z1.s }"
+
+  -
+    input:
+      bytes: [ 0xc0, 0x37, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnb z0.b, { z30.s, z31.s }"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x34, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnb z31.b, { z0.s, z1.s }"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x37, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnb z31.b, { z30.s, z31.s }"
+
+  -
+    input:
+      bytes: [ 0x00, 0x38, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfcvtn z0.b, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0xc0, 0x3b, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfcvtn z0.b, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x38, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfcvtn z31.b, { z0.h, z1.h }"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x3b, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfcvtn z31.b, { z30.h, z31.h }"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnt z0.b, { z0.s, z1.s }"
+
+  -
+    input:
+      bytes: [ 0xc0, 0x3f, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnt z0.b, { z30.s, z31.s }"
+
+  -
+    input:
+      bytes: [ 0x1f, 0x3c, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnt z31.b, { z0.s, z1.s }"
+
+  -
+    input:
+      bytes: [ 0xdf, 0x3f, 0x0a, 0x65 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2", "+fp8" ]
+    expected:
+      insns:
+        -
+          asm_text: "fcvtnt z31.b, { z30.s, z31.s }"

thirdparty/capstone/tests/MC/AArch64/FP8_SVE2/fdot.s.yaml

@@ -0,0 +1,160 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x44, 0x20, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z0.h, z0.b, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x4d, 0x28, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z23.h, z13.b, z0.b[3]"
+
+  -
+    input:
+      bytes: [ 0xff, 0x4f, 0x3f, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z31.h, z31.b, z7.b[7]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x84, 0x20, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z0.h, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x85, 0x28, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z23.h, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x87, 0x3f, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z31.h, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x44, 0x60, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z0.s, z0.b, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x45, 0x68, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z23.s, z13.b, z0.b[1]"
+
+  -
+    input:
+      bytes: [ 0xff, 0x47, 0x7f, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z31.s, z31.b, z7.b[3]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x84, 0x60, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z0.s, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x85, 0x68, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z23.s, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x87, 0x7f, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8dot2", "+ssve-fp8dot4" ]
+    expected:
+      insns:
+        -
+          asm_text: "fdot z31.s, z31.b, z31.b"

thirdparty/capstone/tests/MC/AArch64/FP8_SVE2/fmlal.s.yaml

@@ -0,0 +1,160 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x50, 0x20, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalb z0.h, z0.b, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x5d, 0x28, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalb z23.h, z13.b, z0.b[7]"
+
+  -
+    input:
+      bytes: [ 0xff, 0x5f, 0x3f, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalb z31.h, z31.b, z7.b[15]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x88, 0xa0, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalb z0.h, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x89, 0xa8, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalb z23.h, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x8b, 0xbf, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalb z31.h, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0x50, 0xa0, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalt z0.h, z0.b, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x5d, 0xa8, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalt z23.h, z13.b, z0.b[7]"
+
+  -
+    input:
+      bytes: [ 0xff, 0x5f, 0xbf, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalt z31.h, z31.b, z7.b[15]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x98, 0xa0, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalt z0.h, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x99, 0xa8, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalt z23.h, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x9b, 0xbf, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalt z31.h, z31.b, z31.b"

thirdparty/capstone/tests/MC/AArch64/FP8_SVE2/fmlall.s.yaml

@@ -0,0 +1,320 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0xc0, 0x20, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbb z0.s, z0.b, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xcd, 0x28, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbb z23.s, z13.b, z0.b[7]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xcf, 0x3f, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbb z31.s, z31.b, z7.b[15]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x88, 0x20, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbb z0.s, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x89, 0x28, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbb z23.s, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x8b, 0x3f, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbb z31.s, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xc0, 0x60, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbt z0.s, z0.b, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xcd, 0x68, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbt z23.s, z13.b, z0.b[7]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xcf, 0x7f, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbt z31.s, z31.b, z7.b[15]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x98, 0x20, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbt z0.s, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x99, 0x28, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbt z23.s, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0x9b, 0x3f, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlallbt z31.s, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xc0, 0xa0, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltb z0.s, z0.b, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xcd, 0xa8, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltb z23.s, z13.b, z0.b[7]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xcf, 0xbf, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltb z31.s, z31.b, z7.b[15]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xa8, 0x20, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltb z0.s, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xa9, 0x28, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltb z23.s, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xab, 0x3f, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltb z31.s, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xc0, 0xe0, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltt z0.s, z0.b, z0.b[0]"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xcd, 0xe8, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltt z23.s, z13.b, z0.b[7]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xcf, 0xff, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltt z31.s, z31.b, z7.b[15]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xb8, 0x20, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltt z0.s, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z31"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xb9, 0x28, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltt z23.s, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xbb, 0x3f, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "ssve-fp8fma" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmlalltt z31.s, z31.b, z31.b"

thirdparty/capstone/tests/MC/AArch64/FP8_SVE2/luti2.s.yaml

@@ -0,0 +1,60 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0xb0, 0x20, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti2 z0.b, { z0.b }, z0[0]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xb1, 0x75, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti2 z21.b, { z10.b }, z21[1]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xb3, 0xff, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti2 z31.b, { z31.b }, z31[3]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xa8, 0x20, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti2 z0.h, { z0.h }, z0[0]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xb9, 0x75, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti2 z21.h, { z10.h }, z21[3]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xbb, 0xff, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti2 z31.h, { z31.h }, z31[7]"

thirdparty/capstone/tests/MC/AArch64/FP8_SVE2/luti4.s.yaml

@@ -0,0 +1,80 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0xa4, 0x60, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 z0.b, { z0.b }, z0[0]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xa7, 0xff, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 z31.b, { z31.b }, z31[1]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xbc, 0x20, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 z0.h, { z0.h }, z0[0]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xbd, 0x75, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 z21.h, { z10.h }, z21[1]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xbf, 0xff, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 z31.h, { z31.h }, z31[3]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xb4, 0x20, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 z0.h, { z0.h, z1.h }, z0[0]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xb5, 0x75, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 z21.h, { z10.h, z11.h }, z21[1]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xb7, 0xff, 0x45 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve2", "+lut" ]
+    expected:
+      insns:
+        -
+          asm_text: "luti4 z31.h, { z31.h, z0.h }, z31[3]"

thirdparty/capstone/tests/MC/AArch64/SME/addha-u32.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za0.s, p0/m, p0/m, z0.s"
+
+  -
+    input:
+      bytes: [ 0x41, 0x55, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za1.s, p5/m, p2/m, z10.s"
+
+  -
+    input:
+      bytes: [ 0xa3, 0xed, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za3.s, p3/m, p7/m, z13.s"
+
+  -
+    input:
+      bytes: [ 0xe3, 0xff, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za3.s, p7/m, p7/m, z31.s"
+
+  -
+    input:
+      bytes: [ 0x21, 0x0e, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za1.s, p3/m, p0/m, z17.s"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za1.s, p1/m, p4/m, z1.s"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za0.s, p5/m, p2/m, z19.s"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za0.s, p6/m, p0/m, z12.s"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za1.s, p2/m, p6/m, z1.s"
+
+  -
+    input:
+      bytes: [ 0xc1, 0x0a, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za1.s, p2/m, p0/m, z22.s"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za2.s, p5/m, p7/m, z9.s"
+
+  -
+    input:
+      bytes: [ 0x83, 0xa9, 0x90, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za3.s, p2/m, p5/m, z12.s"

thirdparty/capstone/tests/MC/AArch64/SME/addha-u64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za0.d, p0/m, p0/m, z0.d"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za5.d, p5/m, p2/m, z10.d"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za7.d, p3/m, p7/m, z13.d"
+
+  -
+    input:
+      bytes: [ 0xe7, 0xff, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za7.d, p7/m, p7/m, z31.d"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za5.d, p3/m, p0/m, z17.d"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za1.d, p1/m, p4/m, z1.d"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za0.d, p5/m, p2/m, z19.d"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za0.d, p6/m, p0/m, z12.d"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za1.d, p2/m, p6/m, z1.d"
+
+  -
+    input:
+      bytes: [ 0xc5, 0x0a, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za5.d, p2/m, p0/m, z22.d"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za2.d, p5/m, p7/m, z9.d"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xd0, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addha za7.d, p2/m, p5/m, z12.d"

thirdparty/capstone/tests/MC/AArch64/SME/addspl.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x15, 0x58, 0x75, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addspl x21, x21, #0"
+
+  -
+    input:
+      bytes: [ 0xf7, 0x5f, 0x68, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addspl x23, x8, #-1"
+
+  -
+    input:
+      bytes: [ 0xff, 0x5b, 0x7f, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addspl sp, sp, #31"
+
+  -
+    input:
+      bytes: [ 0x00, 0x5c, 0x60, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addspl x0, x0, #-32"

thirdparty/capstone/tests/MC/AArch64/SME/addsvl.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x15, 0x58, 0x35, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addsvl x21, x21, #0"
+
+  -
+    input:
+      bytes: [ 0xf7, 0x5f, 0x28, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addsvl x23, x8, #-1"
+
+  -
+    input:
+      bytes: [ 0xff, 0x5b, 0x3f, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addsvl sp, sp, #31"
+
+  -
+    input:
+      bytes: [ 0x00, 0x5c, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addsvl x0, x0, #-32"

thirdparty/capstone/tests/MC/AArch64/SME/addva-u32.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za0.s, p0/m, p0/m, z0.s"
+
+  -
+    input:
+      bytes: [ 0x41, 0x55, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za1.s, p5/m, p2/m, z10.s"
+
+  -
+    input:
+      bytes: [ 0xa3, 0xed, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za3.s, p3/m, p7/m, z13.s"
+
+  -
+    input:
+      bytes: [ 0xe3, 0xff, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za3.s, p7/m, p7/m, z31.s"
+
+  -
+    input:
+      bytes: [ 0x21, 0x0e, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za1.s, p3/m, p0/m, z17.s"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za1.s, p1/m, p4/m, z1.s"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za0.s, p5/m, p2/m, z19.s"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za0.s, p6/m, p0/m, z12.s"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za1.s, p2/m, p6/m, z1.s"
+
+  -
+    input:
+      bytes: [ 0xc1, 0x0a, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za1.s, p2/m, p0/m, z22.s"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za2.s, p5/m, p7/m, z9.s"
+
+  -
+    input:
+      bytes: [ 0x83, 0xa9, 0x91, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za3.s, p2/m, p5/m, z12.s"

thirdparty/capstone/tests/MC/AArch64/SME/addva-u64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za0.d, p0/m, p0/m, z0.d"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za5.d, p5/m, p2/m, z10.d"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za7.d, p3/m, p7/m, z13.d"
+
+  -
+    input:
+      bytes: [ 0xe7, 0xff, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za7.d, p7/m, p7/m, z31.d"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za5.d, p3/m, p0/m, z17.d"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za1.d, p1/m, p4/m, z1.d"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za0.d, p5/m, p2/m, z19.d"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za0.d, p6/m, p0/m, z12.d"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za1.d, p2/m, p6/m, z1.d"
+
+  -
+    input:
+      bytes: [ 0xc5, 0x0a, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za5.d, p2/m, p0/m, z22.d"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za2.d, p5/m, p7/m, z9.d"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xd1, 0xc0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "addva za7.d, p2/m, p5/m, z12.d"

thirdparty/capstone/tests/MC/AArch64/SME/bfmopa.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x80, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za0.s, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x41, 0x55, 0x95, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za1.s, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xa3, 0xed, 0x88, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za3.s, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xe3, 0xff, 0x9f, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za3.s, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0x0e, 0x90, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za1.s, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x9e, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za1.s, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0x94, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za0.s, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x82, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za0.s, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x9a, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za1.s, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xc1, 0x0a, 0x9e, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za1.s, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x81, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za2.s, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x83, 0xa9, 0x8b, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmopa za3.s, p2/m, p5/m, z12.h, z11.h"

thirdparty/capstone/tests/MC/AArch64/SME/bfmops.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0x80, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za0.s, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x51, 0x55, 0x95, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za1.s, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xb3, 0xed, 0x88, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za3.s, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xf3, 0xff, 0x9f, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za3.s, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0x0e, 0x90, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za1.s, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0x9e, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za1.s, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0x94, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za0.s, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0x82, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za0.s, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0x9a, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za1.s, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xd1, 0x0a, 0x9e, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za1.s, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0x81, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za2.s, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x93, 0xa9, 0x8b, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfmops za3.s, p2/m, p5/m, z12.h, z11.h"

thirdparty/capstone/tests/MC/AArch64/SME/fa64-implies-sve2.s.yaml

@@ -0,0 +1,10 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x9f, 0x84 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64-none-linux-gnu", "sme-fa64" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldnt1sh { z0.s }, p0/z, [z1.s]"

thirdparty/capstone/tests/MC/AArch64/SME/feature.s.yaml

@@ -0,0 +1,60 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x20, 0x2c, 0x22, 0x05 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64-none-linux-gnu", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "tbx z0.b, z1.b, z2.b"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x62, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64-none-linux-gnu", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfdot z0.s, z1.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x20, 0x2c, 0x22, 0x05 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64-none-linux-gnu", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "tbx z0.b, z1.b, z2.b"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x62, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64-none-linux-gnu", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfdot z0.s, z1.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x20, 0x2c, 0x22, 0x05 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64-none-linux-gnu", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "tbx z0.b, z1.b, z2.b"
+
+  -
+    input:
+      bytes: [ 0x20, 0x80, 0x62, 0x64 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64-none-linux-gnu", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfdot z0.s, z1.h, z2.h"

thirdparty/capstone/tests/MC/AArch64/SME/fmopa-fp64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc0, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za0.d, p0/m, p0/m, z0.d, z0.d"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xd5, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za5.d, p5/m, p2/m, z10.d, z21.d"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xc8, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za7.d, p3/m, p7/m, z13.d, z8.d"
+
+  -
+    input:
+      bytes: [ 0xe7, 0xff, 0xdf, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za7.d, p7/m, p7/m, z31.d, z31.d"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xd0, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za5.d, p3/m, p0/m, z17.d, z16.d"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xde, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.d, p1/m, p4/m, z1.d, z30.d"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0xd4, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za0.d, p5/m, p2/m, z19.d, z20.d"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xc2, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za0.d, p6/m, p0/m, z12.d, z2.d"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xda, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.d, p2/m, p6/m, z1.d, z26.d"
+
+  -
+    input:
+      bytes: [ 0xc5, 0x0a, 0xde, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za5.d, p2/m, p0/m, z22.d, z30.d"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xc1, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za2.d, p5/m, p7/m, z9.d, z1.d"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xcb, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za7.d, p2/m, p5/m, z12.d, z11.d"

thirdparty/capstone/tests/MC/AArch64/SME/fmopa.s.yaml

@@ -0,0 +1,240 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xa0, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za0.s, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x41, 0x55, 0xb5, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.s, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xa3, 0xed, 0xa8, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za3.s, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xe3, 0xff, 0xbf, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za3.s, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0x0e, 0xb0, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.s, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xbe, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.s, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0xb4, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za0.s, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xa2, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za0.s, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xba, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.s, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xc1, 0x0a, 0xbe, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.s, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xa1, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za2.s, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x83, 0xa9, 0xab, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za3.s, p2/m, p5/m, z12.h, z11.h"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x80, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za0.s, p0/m, p0/m, z0.s, z0.s"
+
+  -
+    input:
+      bytes: [ 0x41, 0x55, 0x95, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.s, p5/m, p2/m, z10.s, z21.s"
+
+  -
+    input:
+      bytes: [ 0xa3, 0xed, 0x88, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za3.s, p3/m, p7/m, z13.s, z8.s"
+
+  -
+    input:
+      bytes: [ 0xe3, 0xff, 0x9f, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za3.s, p7/m, p7/m, z31.s, z31.s"
+
+  -
+    input:
+      bytes: [ 0x21, 0x0e, 0x90, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.s, p3/m, p0/m, z17.s, z16.s"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x9e, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.s, p1/m, p4/m, z1.s, z30.s"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0x94, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za0.s, p5/m, p2/m, z19.s, z20.s"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x82, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za0.s, p6/m, p0/m, z12.s, z2.s"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x9a, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.s, p2/m, p6/m, z1.s, z26.s"
+
+  -
+    input:
+      bytes: [ 0xc1, 0x0a, 0x9e, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za1.s, p2/m, p0/m, z22.s, z30.s"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x81, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za2.s, p5/m, p7/m, z9.s, z1.s"
+
+  -
+    input:
+      bytes: [ 0x83, 0xa9, 0x8b, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmopa za3.s, p2/m, p5/m, z12.s, z11.s"

thirdparty/capstone/tests/MC/AArch64/SME/fmops-fp64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0xc0, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za0.d, p0/m, p0/m, z0.d, z0.d"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xd5, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za5.d, p5/m, p2/m, z10.d, z21.d"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xc8, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za7.d, p3/m, p7/m, z13.d, z8.d"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xff, 0xdf, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za7.d, p7/m, p7/m, z31.d, z31.d"
+
+  -
+    input:
+      bytes: [ 0x35, 0x0e, 0xd0, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za5.d, p3/m, p0/m, z17.d, z16.d"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0xde, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.d, p1/m, p4/m, z1.d, z30.d"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0xd4, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za0.d, p5/m, p2/m, z19.d, z20.d"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0xc2, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za0.d, p6/m, p0/m, z12.d, z2.d"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0xda, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.d, p2/m, p6/m, z1.d, z26.d"
+
+  -
+    input:
+      bytes: [ 0xd5, 0x0a, 0xde, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za5.d, p2/m, p0/m, z22.d, z30.d"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0xc1, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za2.d, p5/m, p7/m, z9.d, z1.d"
+
+  -
+    input:
+      bytes: [ 0x97, 0xa9, 0xcb, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-f64f64" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za7.d, p2/m, p5/m, z12.d, z11.d"

thirdparty/capstone/tests/MC/AArch64/SME/fmops.s.yaml

@@ -0,0 +1,240 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0xa0, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za0.s, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x51, 0x55, 0xb5, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.s, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xb3, 0xed, 0xa8, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za3.s, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xf3, 0xff, 0xbf, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za3.s, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0x0e, 0xb0, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.s, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0xbe, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.s, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0xb4, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za0.s, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0xa2, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za0.s, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0xba, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.s, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xd1, 0x0a, 0xbe, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.s, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0xa1, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za2.s, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x93, 0xa9, 0xab, 0x81 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za3.s, p2/m, p5/m, z12.h, z11.h"
+
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0x80, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za0.s, p0/m, p0/m, z0.s, z0.s"
+
+  -
+    input:
+      bytes: [ 0x51, 0x55, 0x95, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.s, p5/m, p2/m, z10.s, z21.s"
+
+  -
+    input:
+      bytes: [ 0xb3, 0xed, 0x88, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za3.s, p3/m, p7/m, z13.s, z8.s"
+
+  -
+    input:
+      bytes: [ 0xf3, 0xff, 0x9f, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za3.s, p7/m, p7/m, z31.s, z31.s"
+
+  -
+    input:
+      bytes: [ 0x31, 0x0e, 0x90, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.s, p3/m, p0/m, z17.s, z16.s"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0x9e, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.s, p1/m, p4/m, z1.s, z30.s"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0x94, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za0.s, p5/m, p2/m, z19.s, z20.s"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0x82, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za0.s, p6/m, p0/m, z12.s, z2.s"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0x9a, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.s, p2/m, p6/m, z1.s, z26.s"
+
+  -
+    input:
+      bytes: [ 0xd1, 0x0a, 0x9e, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za1.s, p2/m, p0/m, z22.s, z30.s"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0x81, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za2.s, p5/m, p7/m, z9.s, z1.s"
+
+  -
+    input:
+      bytes: [ 0x93, 0xa9, 0x8b, 0x80 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmops za3.s, p2/m, p5/m, z12.s, z11.s"

thirdparty/capstone/tests/MC/AArch64/SME/ld1b.s.yaml

@@ -0,0 +1,500 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x00, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w12, 0]}, p0/z, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x15, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w14, 5]}, p5/z, [x10, x21]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x08, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w15, 7]}, p3/z, [x13, x8]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0x1f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w15, 15]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0x10, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w12, 5]}, p3/z, [x17, x16]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0x1e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w12, 1]}, p1/z, [x1, x30]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0x14, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w14, 8]}, p5/z, [x19, x20]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x02, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w12, 0]}, p6/z, [x12, x2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0x1a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w14, 1]}, p2/z, [x1, x26]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0x1e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w12, 13]}, p2/z, [x22, x30]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0x01, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w15, 2]}, p5/z, [x9, x1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0x0b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w13, 7]}, p2/z, [x12, x11]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x00, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w12, 0]}, p0/z, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x15, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w14, 5]}, p5/z, [x10, x21]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x08, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w15, 7]}, p3/z, [x13, x8]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0x1f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w15, 15]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0x10, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w12, 5]}, p3/z, [x17, x16]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0x1e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w12, 1]}, p1/z, [x1, x30]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0x14, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w14, 8]}, p5/z, [x19, x20]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x02, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w12, 0]}, p6/z, [x12, x2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0x1a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w14, 1]}, p2/z, [x1, x26]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0x1e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w12, 13]}, p2/z, [x22, x30]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0x01, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w15, 2]}, p5/z, [x9, x1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0x0b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w13, 7]}, p2/z, [x12, x11]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x00, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w12, 0]}, p0/z, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0x15, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w14, 5]}, p5/z, [x10, x21]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0x08, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w15, 7]}, p3/z, [x13, x8]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0x1f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w15, 15]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0x10, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w12, 5]}, p3/z, [x17, x16]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x1e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w12, 1]}, p1/z, [x1, x30]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0x14, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w14, 8]}, p5/z, [x19, x20]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0x02, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w12, 0]}, p6/z, [x12, x2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x1a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w14, 1]}, p2/z, [x1, x26]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0x1e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w12, 13]}, p2/z, [x22, x30]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x01, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w15, 2]}, p5/z, [x9, x1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0x0b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w13, 7]}, p2/z, [x12, x11]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x00, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w12, 0]}, p0/z, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0x15, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w14, 5]}, p5/z, [x10, x21]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0x08, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w15, 7]}, p3/z, [x13, x8]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0x1f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w15, 15]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0x10, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w12, 5]}, p3/z, [x17, x16]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x1e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w12, 1]}, p1/z, [x1, x30]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0x14, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w14, 8]}, p5/z, [x19, x20]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0x02, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w12, 0]}, p6/z, [x12, x2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x1a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w14, 1]}, p2/z, [x1, x26]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0x1e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w12, 13]}, p2/z, [x22, x30]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x01, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w15, 2]}, p5/z, [x9, x1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0x0b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w13, 7]}, p2/z, [x12, x11]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x00, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0h.b[w12, 0]}, p0/z, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x00, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1b {za0v.b[w12, 0]}, p0/z, [x0, x0]"

thirdparty/capstone/tests/MC/AArch64/SME/ld1d.s.yaml

@@ -0,0 +1,480 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0h.d[w12, 0]}, p0/z, [x0, x0, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xd5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za2h.d[w14, 1]}, p5/z, [x10, x21, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0xc8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za3h.d[w15, 1]}, p3/z, [x13, x8, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xdf, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za7h.d[w15, 1]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xd0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za2h.d[w12, 1]}, p3/z, [x17, x16, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0xde, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0h.d[w12, 1]}, p1/z, [x1, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0xd4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za4h.d[w14, 0]}, p5/z, [x19, x20, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xc2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0h.d[w12, 0]}, p6/z, [x12, x2, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0xda, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0h.d[w14, 1]}, p2/z, [x1, x26, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0xde, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za6h.d[w12, 1]}, p2/z, [x22, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0xc1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za1h.d[w15, 0]}, p5/z, [x9, x1, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0xcb, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za3h.d[w13, 1]}, p2/z, [x12, x11, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0h.d[w12, 0]}, p0/z, [x0, x0, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xd5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za2h.d[w14, 1]}, p5/z, [x10, x21, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0xc8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za3h.d[w15, 1]}, p3/z, [x13, x8, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xdf, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za7h.d[w15, 1]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xd0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za2h.d[w12, 1]}, p3/z, [x17, x16, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0xde, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0h.d[w12, 1]}, p1/z, [x1, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0xd4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za4h.d[w14, 0]}, p5/z, [x19, x20, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xc2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0h.d[w12, 0]}, p6/z, [x12, x2, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0xda, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0h.d[w14, 1]}, p2/z, [x1, x26, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0xde, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za6h.d[w12, 1]}, p2/z, [x22, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0xc1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za1h.d[w15, 0]}, p5/z, [x9, x1, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0xcb, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za3h.d[w13, 1]}, p2/z, [x12, x11, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0xc0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0v.d[w12, 0]}, p0/z, [x0, x0, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0xd5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za2v.d[w14, 1]}, p5/z, [x10, x21, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xc8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za3v.d[w15, 1]}, p3/z, [x13, x8, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0xdf, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za7v.d[w15, 1]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0xd0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za2v.d[w12, 1]}, p3/z, [x17, x16, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xde, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0v.d[w12, 1]}, p1/z, [x1, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0xd4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za4v.d[w14, 0]}, p5/z, [x19, x20, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0xc2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0v.d[w12, 0]}, p6/z, [x12, x2, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xda, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0v.d[w14, 1]}, p2/z, [x1, x26, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0xde, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za6v.d[w12, 1]}, p2/z, [x22, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xc1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za1v.d[w15, 0]}, p5/z, [x9, x1, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xcb, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za3v.d[w13, 1]}, p2/z, [x12, x11, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0xc0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0v.d[w12, 0]}, p0/z, [x0, x0, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0xd5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za2v.d[w14, 1]}, p5/z, [x10, x21, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xc8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za3v.d[w15, 1]}, p3/z, [x13, x8, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0xdf, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za7v.d[w15, 1]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0xd0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za2v.d[w12, 1]}, p3/z, [x17, x16, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xde, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0v.d[w12, 1]}, p1/z, [x1, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0xd4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za4v.d[w14, 0]}, p5/z, [x19, x20, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0xc2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0v.d[w12, 0]}, p6/z, [x12, x2, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xda, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za0v.d[w14, 1]}, p2/z, [x1, x26, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0xde, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za6v.d[w12, 1]}, p2/z, [x22, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xc1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za1v.d[w15, 0]}, p5/z, [x9, x1, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xcb, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1d {za3v.d[w13, 1]}, p2/z, [x12, x11, lsl #3]"

thirdparty/capstone/tests/MC/AArch64/SME/ld1h.s.yaml

@@ -0,0 +1,480 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x40, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w12, 0]}, p0/z, [x0, x0, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x55, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w14, 5]}, p5/z, [x10, x21, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x48, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w15, 7]}, p3/z, [x13, x8, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0x5f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1h.h[w15, 7]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0x50, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w12, 5]}, p3/z, [x17, x16, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0x5e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w12, 1]}, p1/z, [x1, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0x54, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1h.h[w14, 0]}, p5/z, [x19, x20, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x42, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w12, 0]}, p6/z, [x12, x2, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0x5a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w14, 1]}, p2/z, [x1, x26, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0x5e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1h.h[w12, 5]}, p2/z, [x22, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0x41, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w15, 2]}, p5/z, [x9, x1, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0x4b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w13, 7]}, p2/z, [x12, x11, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x40, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w12, 0]}, p0/z, [x0, x0, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x55, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w14, 5]}, p5/z, [x10, x21, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x48, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w15, 7]}, p3/z, [x13, x8, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0x5f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1h.h[w15, 7]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0x50, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w12, 5]}, p3/z, [x17, x16, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0x5e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w12, 1]}, p1/z, [x1, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0x54, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1h.h[w14, 0]}, p5/z, [x19, x20, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x42, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w12, 0]}, p6/z, [x12, x2, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0x5a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w14, 1]}, p2/z, [x1, x26, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0x5e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1h.h[w12, 5]}, p2/z, [x22, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0x41, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w15, 2]}, p5/z, [x9, x1, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0x4b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0h.h[w13, 7]}, p2/z, [x12, x11, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x40, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w12, 0]}, p0/z, [x0, x0, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0x55, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w14, 5]}, p5/z, [x10, x21, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0x48, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w15, 7]}, p3/z, [x13, x8, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0x5f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1v.h[w15, 7]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0x50, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w12, 5]}, p3/z, [x17, x16, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x5e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w12, 1]}, p1/z, [x1, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0x54, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1v.h[w14, 0]}, p5/z, [x19, x20, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0x42, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w12, 0]}, p6/z, [x12, x2, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x5a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w14, 1]}, p2/z, [x1, x26, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0x5e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1v.h[w12, 5]}, p2/z, [x22, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x41, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w15, 2]}, p5/z, [x9, x1, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0x4b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w13, 7]}, p2/z, [x12, x11, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x40, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w12, 0]}, p0/z, [x0, x0, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0x55, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w14, 5]}, p5/z, [x10, x21, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0x48, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w15, 7]}, p3/z, [x13, x8, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0x5f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1v.h[w15, 7]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0x50, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w12, 5]}, p3/z, [x17, x16, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x5e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w12, 1]}, p1/z, [x1, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0x54, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1v.h[w14, 0]}, p5/z, [x19, x20, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0x42, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w12, 0]}, p6/z, [x12, x2, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x5a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w14, 1]}, p2/z, [x1, x26, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0x5e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za1v.h[w12, 5]}, p2/z, [x22, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x41, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w15, 2]}, p5/z, [x9, x1, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0x4b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1h {za0v.h[w13, 7]}, p2/z, [x12, x11, lsl #1]"

thirdparty/capstone/tests/MC/AArch64/SME/ld1q.s.yaml

@@ -0,0 +1,480 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za0h.q[w12, 0]}, p0/z, [x0, x0, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xd5, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za5h.q[w14, 0]}, p5/z, [x10, x21, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0xc8, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za7h.q[w15, 0]}, p3/z, [x13, x8, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xdf, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za15h.q[w15, 0]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xd0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za5h.q[w12, 0]}, p3/z, [x17, x16, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0xde, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za1h.q[w12, 0]}, p1/z, [x1, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0xd4, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za8h.q[w14, 0]}, p5/z, [x19, x20, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xc2, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za0h.q[w12, 0]}, p6/z, [x12, x2, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0xda, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za1h.q[w14, 0]}, p2/z, [x1, x26, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0xde, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za13h.q[w12, 0]}, p2/z, [x22, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0xc1, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za2h.q[w15, 0]}, p5/z, [x9, x1, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0xcb, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za7h.q[w13, 0]}, p2/z, [x12, x11, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za0h.q[w12, 0]}, p0/z, [x0, x0, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xd5, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za5h.q[w14, 0]}, p5/z, [x10, x21, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0xc8, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za7h.q[w15, 0]}, p3/z, [x13, x8, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xdf, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za15h.q[w15, 0]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xd0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za5h.q[w12, 0]}, p3/z, [x17, x16, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0xde, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za1h.q[w12, 0]}, p1/z, [x1, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0xd4, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za8h.q[w14, 0]}, p5/z, [x19, x20, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xc2, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za0h.q[w12, 0]}, p6/z, [x12, x2, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0xda, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za1h.q[w14, 0]}, p2/z, [x1, x26, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0xde, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za13h.q[w12, 0]}, p2/z, [x22, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0xc1, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za2h.q[w15, 0]}, p5/z, [x9, x1, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0xcb, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za7h.q[w13, 0]}, p2/z, [x12, x11, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0xc0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za0v.q[w12, 0]}, p0/z, [x0, x0, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0xd5, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za5v.q[w14, 0]}, p5/z, [x10, x21, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xc8, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za7v.q[w15, 0]}, p3/z, [x13, x8, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0xdf, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za15v.q[w15, 0]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0xd0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za5v.q[w12, 0]}, p3/z, [x17, x16, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xde, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za1v.q[w12, 0]}, p1/z, [x1, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0xd4, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za8v.q[w14, 0]}, p5/z, [x19, x20, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0xc2, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za0v.q[w12, 0]}, p6/z, [x12, x2, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xda, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za1v.q[w14, 0]}, p2/z, [x1, x26, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0xde, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za13v.q[w12, 0]}, p2/z, [x22, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xc1, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za2v.q[w15, 0]}, p5/z, [x9, x1, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xcb, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za7v.q[w13, 0]}, p2/z, [x12, x11, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0xc0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za0v.q[w12, 0]}, p0/z, [x0, x0, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0xd5, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za5v.q[w14, 0]}, p5/z, [x10, x21, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xc8, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za7v.q[w15, 0]}, p3/z, [x13, x8, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0xdf, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za15v.q[w15, 0]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0xd0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za5v.q[w12, 0]}, p3/z, [x17, x16, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xde, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za1v.q[w12, 0]}, p1/z, [x1, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0xd4, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za8v.q[w14, 0]}, p5/z, [x19, x20, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0xc2, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za0v.q[w12, 0]}, p6/z, [x12, x2, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xda, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za1v.q[w14, 0]}, p2/z, [x1, x26, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0xde, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za13v.q[w12, 0]}, p2/z, [x22, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xc1, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za2v.q[w15, 0]}, p5/z, [x9, x1, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xcb, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1q {za7v.q[w13, 0]}, p2/z, [x12, x11, lsl #4]"

thirdparty/capstone/tests/MC/AArch64/SME/ld1w.s.yaml

@@ -0,0 +1,480 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x80, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0h.s[w12, 0]}, p0/z, [x0, x0, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x95, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1h.s[w14, 1]}, p5/z, [x10, x21, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x88, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1h.s[w15, 3]}, p3/z, [x13, x8, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0x9f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za3h.s[w15, 3]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0x90, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1h.s[w12, 1]}, p3/z, [x17, x16, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0x9e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0h.s[w12, 1]}, p1/z, [x1, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0x94, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za2h.s[w14, 0]}, p5/z, [x19, x20, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x82, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0h.s[w12, 0]}, p6/z, [x12, x2, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0x9a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0h.s[w14, 1]}, p2/z, [x1, x26, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0x9e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za3h.s[w12, 1]}, p2/z, [x22, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0x81, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0h.s[w15, 2]}, p5/z, [x9, x1, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0x8b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1h.s[w13, 3]}, p2/z, [x12, x11, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x80, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0h.s[w12, 0]}, p0/z, [x0, x0, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x95, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1h.s[w14, 1]}, p5/z, [x10, x21, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x88, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1h.s[w15, 3]}, p3/z, [x13, x8, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0x9f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za3h.s[w15, 3]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0x90, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1h.s[w12, 1]}, p3/z, [x17, x16, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0x9e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0h.s[w12, 1]}, p1/z, [x1, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0x94, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za2h.s[w14, 0]}, p5/z, [x19, x20, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x82, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0h.s[w12, 0]}, p6/z, [x12, x2, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0x9a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0h.s[w14, 1]}, p2/z, [x1, x26, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0x9e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za3h.s[w12, 1]}, p2/z, [x22, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0x81, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0h.s[w15, 2]}, p5/z, [x9, x1, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0x8b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1h.s[w13, 3]}, p2/z, [x12, x11, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x80, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0v.s[w12, 0]}, p0/z, [x0, x0, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0x95, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1v.s[w14, 1]}, p5/z, [x10, x21, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0x88, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1v.s[w15, 3]}, p3/z, [x13, x8, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0x9f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za3v.s[w15, 3]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0x90, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1v.s[w12, 1]}, p3/z, [x17, x16, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x9e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0v.s[w12, 1]}, p1/z, [x1, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0x94, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za2v.s[w14, 0]}, p5/z, [x19, x20, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0x82, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0v.s[w12, 0]}, p6/z, [x12, x2, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x9a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0v.s[w14, 1]}, p2/z, [x1, x26, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0x9e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za3v.s[w12, 1]}, p2/z, [x22, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x81, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0v.s[w15, 2]}, p5/z, [x9, x1, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0x8b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1v.s[w13, 3]}, p2/z, [x12, x11, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x80, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0v.s[w12, 0]}, p0/z, [x0, x0, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0x95, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1v.s[w14, 1]}, p5/z, [x10, x21, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0x88, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1v.s[w15, 3]}, p3/z, [x13, x8, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0x9f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za3v.s[w15, 3]}, p7/z, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0x90, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1v.s[w12, 1]}, p3/z, [x17, x16, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x9e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0v.s[w12, 1]}, p1/z, [x1, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0x94, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za2v.s[w14, 0]}, p5/z, [x19, x20, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0x82, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0v.s[w12, 0]}, p6/z, [x12, x2, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x9a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0v.s[w14, 1]}, p2/z, [x1, x26, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0x9e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za3v.s[w12, 1]}, p2/z, [x22, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x81, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za0v.s[w15, 2]}, p5/z, [x9, x1, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0x8b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ld1w {za1v.s[w13, 3]}, p2/z, [x12, x11, lsl #2]"

thirdparty/capstone/tests/MC/AArch64/SME/ldr.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w12, 0], [x0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x41, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w14, 5], [x10, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x61, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w15, 7], [x13, #7, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x63, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w15, 15], [sp, #15, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x02, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w12, 5], [x17, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x00, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w12, 1], [x1, #1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x42, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w14, 8], [x19, #8, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x01, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w12, 0], [x12]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x40, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w14, 1], [x1, #1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x02, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w12, 13], [x22, #13, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x61, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w15, 2], [x9, #2, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x21, 0x00, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "ldr za[w13, 7], [x12, #7, mul vl]"

thirdparty/capstone/tests/MC/AArch64/SME/psel.s.yaml

@@ -0,0 +1,200 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x24, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p0, p0, p0.b[w12, 0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x75, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p5, p5, p10.b[w13, 6]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x6c, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p7, p11, p13.b[w12, 5]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7d, 0xff, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p15, p15, p15.b[w15, 15]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x28, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p0, p0, p0.h[w12, 0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x79, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p5, p5, p10.h[w13, 3]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x68, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p7, p11, p13.h[w12, 2]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7d, 0xfb, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p15, p15, p15.h[w15, 7]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x30, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p0, p0, p0.s[w12, 0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x71, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p5, p5, p10.s[w13, 1]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x70, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p7, p11, p13.s[w12, 1]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7d, 0xf3, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p15, p15, p15.s[w15, 3]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x60, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p0, p0, p0.d[w12, 0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x61, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p5, p5, p10.d[w13, 0]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x60, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p7, p11, p13.d[w12, 0]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7d, 0xe3, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p15, p15, p15.d[w15, 1]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7d, 0xff, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p15, p15, p15.b[w15, 15]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7d, 0xfb, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p15, p15, p15.h[w15, 7]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7d, 0xf3, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p15, p15, p15.s[w15, 3]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7d, 0xe3, 0x25 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "psel p15, p15, p15.d[w15, 1]"

thirdparty/capstone/tests/MC/AArch64/SME/rdsvl.s.yaml

@@ -0,0 +1,40 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x58, 0xbf, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "rdsvl x0, #0"
+
+  -
+    input:
+      bytes: [ 0xff, 0x5f, 0xbf, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "rdsvl xzr, #-1"
+
+  -
+    input:
+      bytes: [ 0xf7, 0x5b, 0xbf, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "rdsvl x23, #31"
+
+  -
+    input:
+      bytes: [ 0x15, 0x5c, 0xbf, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "rdsvl x21, #-32"

thirdparty/capstone/tests/MC/AArch64/SME/revd.s.yaml

@@ -0,0 +1,60 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x2e, 0x05 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "revd z0.q, p0/m, z0.q"
+
+  -
+    input:
+      bytes: [ 0x55, 0x95, 0x2e, 0x05 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "revd z21.q, p5/m, z10.q"
+
+  -
+    input:
+      bytes: [ 0xb7, 0x8d, 0x2e, 0x05 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "revd z23.q, p3/m, z13.q"
+
+  -
+    input:
+      bytes: [ 0xff, 0x9f, 0x2e, 0x05 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "revd z31.q, p7/m, z31.q"
+
+  -
+    input:
+      bytes: [ 0x35, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z21, z25"
+
+  -
+    input:
+      bytes: [ 0x55, 0x95, 0x2e, 0x05 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "revd z21.q, p5/m, z10.q"

thirdparty/capstone/tests/MC/AArch64/SME/sclamp.s.yaml

@@ -0,0 +1,240 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0xc0, 0x00, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z0.b, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0x55, 0xc1, 0x15, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z21.b, z10.b, z21.b"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc1, 0x08, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z23.b, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xc3, 0x1f, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z31.b, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xc0, 0x40, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z0.h, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x55, 0xc1, 0x55, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z21.h, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc1, 0x48, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z23.h, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xff, 0xc3, 0x5f, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z31.h, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x00, 0xc0, 0x80, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z0.s, z0.s, z0.s"
+
+  -
+    input:
+      bytes: [ 0x55, 0xc1, 0x95, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z21.s, z10.s, z21.s"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc1, 0x88, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z23.s, z13.s, z8.s"
+
+  -
+    input:
+      bytes: [ 0xff, 0xc3, 0x9f, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z31.s, z31.s, z31.s"
+
+  -
+    input:
+      bytes: [ 0x00, 0xc0, 0xc0, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z0.d, z0.d, z0.d"
+
+  -
+    input:
+      bytes: [ 0x55, 0xc1, 0xd5, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z21.d, z10.d, z21.d"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc1, 0xc8, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z23.d, z13.d, z8.d"
+
+  -
+    input:
+      bytes: [ 0xff, 0xc3, 0xdf, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z31.d, z31.d, z31.d"
+
+  -
+    input:
+      bytes: [ 0x77, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z27"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc1, 0x08, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z23.b, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0x77, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z27"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc1, 0x48, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z23.h, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0x77, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z27"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc1, 0x88, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z23.s, z13.s, z8.s"
+
+  -
+    input:
+      bytes: [ 0x77, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z27"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc1, 0xc8, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sclamp z23.d, z13.d, z8.d"

thirdparty/capstone/tests/MC/AArch64/SME/smopa-32.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x80, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za0.s, p0/m, p0/m, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0x41, 0x55, 0x95, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za1.s, p5/m, p2/m, z10.b, z21.b"
+
+  -
+    input:
+      bytes: [ 0xa3, 0xed, 0x88, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za3.s, p3/m, p7/m, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xe3, 0xff, 0x9f, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za3.s, p7/m, p7/m, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0x0e, 0x90, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za1.s, p3/m, p0/m, z17.b, z16.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x9e, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za1.s, p1/m, p4/m, z1.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0x94, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za0.s, p5/m, p2/m, z19.b, z20.b"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x82, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za0.s, p6/m, p0/m, z12.b, z2.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x9a, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za1.s, p2/m, p6/m, z1.b, z26.b"
+
+  -
+    input:
+      bytes: [ 0xc1, 0x0a, 0x9e, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za1.s, p2/m, p0/m, z22.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x81, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za2.s, p5/m, p7/m, z9.b, z1.b"
+
+  -
+    input:
+      bytes: [ 0x83, 0xa9, 0x8b, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za3.s, p2/m, p5/m, z12.b, z11.b"

thirdparty/capstone/tests/MC/AArch64/SME/smopa-64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za0.d, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xd5, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za5.d, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xc8, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za7.d, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xe7, 0xff, 0xdf, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za7.d, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xd0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za5.d, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xde, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za1.d, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0xd4, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za0.d, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xc2, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za0.d, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xda, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za1.d, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xc5, 0x0a, 0xde, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za5.d, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xc1, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za2.d, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xcb, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smopa za7.d, p2/m, p5/m, z12.h, z11.h"

thirdparty/capstone/tests/MC/AArch64/SME/smops-32.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0x80, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za0.s, p0/m, p0/m, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0x51, 0x55, 0x95, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za1.s, p5/m, p2/m, z10.b, z21.b"
+
+  -
+    input:
+      bytes: [ 0xb3, 0xed, 0x88, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za3.s, p3/m, p7/m, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xf3, 0xff, 0x9f, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za3.s, p7/m, p7/m, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0x0e, 0x90, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za1.s, p3/m, p0/m, z17.b, z16.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0x9e, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za1.s, p1/m, p4/m, z1.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0x94, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za0.s, p5/m, p2/m, z19.b, z20.b"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0x82, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za0.s, p6/m, p0/m, z12.b, z2.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0x9a, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za1.s, p2/m, p6/m, z1.b, z26.b"
+
+  -
+    input:
+      bytes: [ 0xd1, 0x0a, 0x9e, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za1.s, p2/m, p0/m, z22.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0x81, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za2.s, p5/m, p7/m, z9.b, z1.b"
+
+  -
+    input:
+      bytes: [ 0x93, 0xa9, 0x8b, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za3.s, p2/m, p5/m, z12.b, z11.b"

thirdparty/capstone/tests/MC/AArch64/SME/smops-64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0xc0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za0.d, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xd5, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za5.d, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xc8, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za7.d, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xff, 0xdf, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za7.d, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x35, 0x0e, 0xd0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za5.d, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0xde, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za1.d, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0xd4, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za0.d, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0xc2, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za0.d, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0xda, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za1.d, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xd5, 0x0a, 0xde, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za5.d, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0xc1, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za2.d, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x97, 0xa9, 0xcb, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smops za7.d, p2/m, p5/m, z12.h, z11.h"

thirdparty/capstone/tests/MC/AArch64/SME/smstart.s.yaml

@@ -0,0 +1,100 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x7f, 0x47, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x43, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart sm"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x45, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart za"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x43, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart sm"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x45, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart za"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x47, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x43, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart sm"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x45, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart za"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x43, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart sm"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x45, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart za"

thirdparty/capstone/tests/MC/AArch64/SME/smstop.s.yaml

@@ -0,0 +1,100 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x7f, 0x46, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x42, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop sm"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x44, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop za"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x42, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop sm"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x44, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop za"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x46, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x42, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop sm"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x44, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop za"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x42, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop sm"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x44, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop za"

thirdparty/capstone/tests/MC/AArch64/SME/st1b.s.yaml

@@ -0,0 +1,480 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x20, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w12, 0]}, p0, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x35, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w14, 5]}, p5, [x10, x21]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x28, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w15, 7]}, p3, [x13, x8]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0x3f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w15, 15]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0x30, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w12, 5]}, p3, [x17, x16]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0x3e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w12, 1]}, p1, [x1, x30]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0x34, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w14, 8]}, p5, [x19, x20]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x22, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w12, 0]}, p6, [x12, x2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0x3a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w14, 1]}, p2, [x1, x26]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0x3e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w12, 13]}, p2, [x22, x30]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0x21, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w15, 2]}, p5, [x9, x1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0x2b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w13, 7]}, p2, [x12, x11]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x20, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w12, 0]}, p0, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x35, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w14, 5]}, p5, [x10, x21]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x28, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w15, 7]}, p3, [x13, x8]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0x3f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w15, 15]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0x30, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w12, 5]}, p3, [x17, x16]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0x3e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w12, 1]}, p1, [x1, x30]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0x34, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w14, 8]}, p5, [x19, x20]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x22, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w12, 0]}, p6, [x12, x2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0x3a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w14, 1]}, p2, [x1, x26]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0x3e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w12, 13]}, p2, [x22, x30]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0x21, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w15, 2]}, p5, [x9, x1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0x2b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0h.b[w13, 7]}, p2, [x12, x11]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x20, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w12, 0]}, p0, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0x35, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w14, 5]}, p5, [x10, x21]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0x28, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w15, 7]}, p3, [x13, x8]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0x3f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w15, 15]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0x30, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w12, 5]}, p3, [x17, x16]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x3e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w12, 1]}, p1, [x1, x30]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0x34, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w14, 8]}, p5, [x19, x20]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0x22, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w12, 0]}, p6, [x12, x2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x3a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w14, 1]}, p2, [x1, x26]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0x3e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w12, 13]}, p2, [x22, x30]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x21, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w15, 2]}, p5, [x9, x1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0x2b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w13, 7]}, p2, [x12, x11]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x20, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w12, 0]}, p0, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0x35, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w14, 5]}, p5, [x10, x21]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0x28, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w15, 7]}, p3, [x13, x8]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0x3f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w15, 15]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0x30, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w12, 5]}, p3, [x17, x16]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x3e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w12, 1]}, p1, [x1, x30]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0x34, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w14, 8]}, p5, [x19, x20]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0x22, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w12, 0]}, p6, [x12, x2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x3a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w14, 1]}, p2, [x1, x26]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0x3e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w12, 13]}, p2, [x22, x30]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x21, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w15, 2]}, p5, [x9, x1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0x2b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b {za0v.b[w13, 7]}, p2, [x12, x11]"

thirdparty/capstone/tests/MC/AArch64/SME/st1d.s.yaml

@@ -0,0 +1,480 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xe0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0h.d[w12, 0]}, p0, [x0, x0, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xf5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za2h.d[w14, 1]}, p5, [x10, x21, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0xe8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za3h.d[w15, 1]}, p3, [x13, x8, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xff, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za7h.d[w15, 1]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xf0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za2h.d[w12, 1]}, p3, [x17, x16, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0xfe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0h.d[w12, 1]}, p1, [x1, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0xf4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za4h.d[w14, 0]}, p5, [x19, x20, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xe2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0h.d[w12, 0]}, p6, [x12, x2, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0xfa, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0h.d[w14, 1]}, p2, [x1, x26, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0xfe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za6h.d[w12, 1]}, p2, [x22, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0xe1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za1h.d[w15, 0]}, p5, [x9, x1, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0xeb, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za3h.d[w13, 1]}, p2, [x12, x11, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xe0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0h.d[w12, 0]}, p0, [x0, x0, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xf5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za2h.d[w14, 1]}, p5, [x10, x21, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0xe8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za3h.d[w15, 1]}, p3, [x13, x8, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xff, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za7h.d[w15, 1]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xf0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za2h.d[w12, 1]}, p3, [x17, x16, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0xfe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0h.d[w12, 1]}, p1, [x1, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0xf4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za4h.d[w14, 0]}, p5, [x19, x20, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xe2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0h.d[w12, 0]}, p6, [x12, x2, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0xfa, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0h.d[w14, 1]}, p2, [x1, x26, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0xfe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za6h.d[w12, 1]}, p2, [x22, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0xe1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za1h.d[w15, 0]}, p5, [x9, x1, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0xeb, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za3h.d[w13, 1]}, p2, [x12, x11, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0xe0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0v.d[w12, 0]}, p0, [x0, x0, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0xf5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za2v.d[w14, 1]}, p5, [x10, x21, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xe8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za3v.d[w15, 1]}, p3, [x13, x8, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0xff, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za7v.d[w15, 1]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0xf0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za2v.d[w12, 1]}, p3, [x17, x16, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xfe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0v.d[w12, 1]}, p1, [x1, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0xf4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za4v.d[w14, 0]}, p5, [x19, x20, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0xe2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0v.d[w12, 0]}, p6, [x12, x2, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xfa, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0v.d[w14, 1]}, p2, [x1, x26, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0xfe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za6v.d[w12, 1]}, p2, [x22, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xe1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za1v.d[w15, 0]}, p5, [x9, x1, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xeb, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za3v.d[w13, 1]}, p2, [x12, x11, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0xe0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0v.d[w12, 0]}, p0, [x0, x0, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0xf5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za2v.d[w14, 1]}, p5, [x10, x21, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xe8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za3v.d[w15, 1]}, p3, [x13, x8, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0xff, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za7v.d[w15, 1]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0xf0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za2v.d[w12, 1]}, p3, [x17, x16, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xfe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0v.d[w12, 1]}, p1, [x1, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0xf4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za4v.d[w14, 0]}, p5, [x19, x20, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0xe2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0v.d[w12, 0]}, p6, [x12, x2, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xfa, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za0v.d[w14, 1]}, p2, [x1, x26, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0xfe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za6v.d[w12, 1]}, p2, [x22, x30, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xe1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za1v.d[w15, 0]}, p5, [x9, x1, lsl #3]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xeb, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1d {za3v.d[w13, 1]}, p2, [x12, x11, lsl #3]"

thirdparty/capstone/tests/MC/AArch64/SME/st1h.s.yaml

@@ -0,0 +1,480 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x60, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w12, 0]}, p0, [x0, x0, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x75, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w14, 5]}, p5, [x10, x21, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x68, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w15, 7]}, p3, [x13, x8, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0x7f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1h.h[w15, 7]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0x70, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w12, 5]}, p3, [x17, x16, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0x7e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w12, 1]}, p1, [x1, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0x74, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1h.h[w14, 0]}, p5, [x19, x20, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x62, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w12, 0]}, p6, [x12, x2, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0x7a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w14, 1]}, p2, [x1, x26, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0x7e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1h.h[w12, 5]}, p2, [x22, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0x61, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w15, 2]}, p5, [x9, x1, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0x6b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w13, 7]}, p2, [x12, x11, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x60, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w12, 0]}, p0, [x0, x0, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0x75, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w14, 5]}, p5, [x10, x21, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0x68, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w15, 7]}, p3, [x13, x8, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0x7f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1h.h[w15, 7]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0x70, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w12, 5]}, p3, [x17, x16, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0x7e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w12, 1]}, p1, [x1, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0x74, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1h.h[w14, 0]}, p5, [x19, x20, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x62, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w12, 0]}, p6, [x12, x2, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0x7a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w14, 1]}, p2, [x1, x26, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0x7e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1h.h[w12, 5]}, p2, [x22, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0x61, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w15, 2]}, p5, [x9, x1, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0x6b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0h.h[w13, 7]}, p2, [x12, x11, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x60, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w12, 0]}, p0, [x0, x0, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0x75, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w14, 5]}, p5, [x10, x21, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0x68, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w15, 7]}, p3, [x13, x8, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0x7f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1v.h[w15, 7]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0x70, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w12, 5]}, p3, [x17, x16, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x7e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w12, 1]}, p1, [x1, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0x74, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1v.h[w14, 0]}, p5, [x19, x20, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0x62, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w12, 0]}, p6, [x12, x2, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x7a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w14, 1]}, p2, [x1, x26, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0x7e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1v.h[w12, 5]}, p2, [x22, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x61, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w15, 2]}, p5, [x9, x1, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0x6b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w13, 7]}, p2, [x12, x11, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0x60, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w12, 0]}, p0, [x0, x0, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0x75, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w14, 5]}, p5, [x10, x21, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0x68, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w15, 7]}, p3, [x13, x8, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0x7f, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1v.h[w15, 7]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0x70, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w12, 5]}, p3, [x17, x16, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x7e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w12, 1]}, p1, [x1, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0x74, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1v.h[w14, 0]}, p5, [x19, x20, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0x62, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w12, 0]}, p6, [x12, x2, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x7a, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w14, 1]}, p2, [x1, x26, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0x7e, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za1v.h[w12, 5]}, p2, [x22, x30, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x61, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w15, 2]}, p5, [x9, x1, lsl #1]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0x6b, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1h {za0v.h[w13, 7]}, p2, [x12, x11, lsl #1]"

thirdparty/capstone/tests/MC/AArch64/SME/st1q.s.yaml

@@ -0,0 +1,480 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xe0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za0h.q[w12, 0]}, p0, [x0, x0, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xf5, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za5h.q[w14, 0]}, p5, [x10, x21, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0xe8, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za7h.q[w15, 0]}, p3, [x13, x8, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xff, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za15h.q[w15, 0]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xf0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za5h.q[w12, 0]}, p3, [x17, x16, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0xfe, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za1h.q[w12, 0]}, p1, [x1, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0xf4, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za8h.q[w14, 0]}, p5, [x19, x20, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xe2, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za0h.q[w12, 0]}, p6, [x12, x2, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0xfa, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za1h.q[w14, 0]}, p2, [x1, x26, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0xfe, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za13h.q[w12, 0]}, p2, [x22, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0xe1, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za2h.q[w15, 0]}, p5, [x9, x1, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0xeb, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za7h.q[w13, 0]}, p2, [x12, x11, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xe0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za0h.q[w12, 0]}, p0, [x0, x0, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xf5, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za5h.q[w14, 0]}, p5, [x10, x21, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0xe8, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za7h.q[w15, 0]}, p3, [x13, x8, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xff, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za15h.q[w15, 0]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xf0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za5h.q[w12, 0]}, p3, [x17, x16, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0xfe, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za1h.q[w12, 0]}, p1, [x1, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0xf4, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za8h.q[w14, 0]}, p5, [x19, x20, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xe2, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za0h.q[w12, 0]}, p6, [x12, x2, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0xfa, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za1h.q[w14, 0]}, p2, [x1, x26, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0xfe, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za13h.q[w12, 0]}, p2, [x22, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0xe1, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za2h.q[w15, 0]}, p5, [x9, x1, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0xeb, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za7h.q[w13, 0]}, p2, [x12, x11, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0xe0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za0v.q[w12, 0]}, p0, [x0, x0, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0xf5, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za5v.q[w14, 0]}, p5, [x10, x21, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xe8, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za7v.q[w15, 0]}, p3, [x13, x8, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0xff, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za15v.q[w15, 0]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0xf0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za5v.q[w12, 0]}, p3, [x17, x16, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xfe, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za1v.q[w12, 0]}, p1, [x1, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0xf4, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za8v.q[w14, 0]}, p5, [x19, x20, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0xe2, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za0v.q[w12, 0]}, p6, [x12, x2, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xfa, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za1v.q[w14, 0]}, p2, [x1, x26, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0xfe, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za13v.q[w12, 0]}, p2, [x22, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xe1, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za2v.q[w15, 0]}, p5, [x9, x1, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xeb, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za7v.q[w13, 0]}, p2, [x12, x11, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0xe0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za0v.q[w12, 0]}, p0, [x0, x0, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0xf5, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za5v.q[w14, 0]}, p5, [x10, x21, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xe8, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za7v.q[w15, 0]}, p3, [x13, x8, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0xff, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za15v.q[w15, 0]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0xf0, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za5v.q[w12, 0]}, p3, [x17, x16, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xfe, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za1v.q[w12, 0]}, p1, [x1, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0xf4, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za8v.q[w14, 0]}, p5, [x19, x20, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0xe2, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za0v.q[w12, 0]}, p6, [x12, x2, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xfa, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za1v.q[w14, 0]}, p2, [x1, x26, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0xfe, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za13v.q[w12, 0]}, p2, [x22, x30, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xe1, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za2v.q[w15, 0]}, p5, [x9, x1, lsl #4]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xeb, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1q {za7v.q[w13, 0]}, p2, [x12, x11, lsl #4]"

thirdparty/capstone/tests/MC/AArch64/SME/st1w.s.yaml

@@ -0,0 +1,480 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xa0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0h.s[w12, 0]}, p0, [x0, x0, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xb5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1h.s[w14, 1]}, p5, [x10, x21, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0xa8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1h.s[w15, 3]}, p3, [x13, x8, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xbf, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za3h.s[w15, 3]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xb0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1h.s[w12, 1]}, p3, [x17, x16, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0xbe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0h.s[w12, 1]}, p1, [x1, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0xb4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za2h.s[w14, 0]}, p5, [x19, x20, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xa2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0h.s[w12, 0]}, p6, [x12, x2, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0xba, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0h.s[w14, 1]}, p2, [x1, x26, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0xbe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za3h.s[w12, 1]}, p2, [x22, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0xa1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0h.s[w15, 2]}, p5, [x9, x1, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0xab, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1h.s[w13, 3]}, p2, [x12, x11, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xa0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0h.s[w12, 0]}, p0, [x0, x0, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xb5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1h.s[w14, 1]}, p5, [x10, x21, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x6d, 0xa8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1h.s[w15, 3]}, p3, [x13, x8, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x7f, 0xbf, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za3h.s[w15, 3]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xb0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1h.s[w12, 1]}, p3, [x17, x16, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x04, 0xbe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0h.s[w12, 1]}, p1, [x1, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x56, 0xb4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za2h.s[w14, 0]}, p5, [x19, x20, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xa2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0h.s[w12, 0]}, p6, [x12, x2, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x48, 0xba, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0h.s[w14, 1]}, p2, [x1, x26, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x0a, 0xbe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za3h.s[w12, 1]}, p2, [x22, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x75, 0xa1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0h.s[w15, 2]}, p5, [x9, x1, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x29, 0xab, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1h.s[w13, 3]}, p2, [x12, x11, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0xa0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0v.s[w12, 0]}, p0, [x0, x0, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0xb5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1v.s[w14, 1]}, p5, [x10, x21, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xa8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1v.s[w15, 3]}, p3, [x13, x8, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0xbf, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za3v.s[w15, 3]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0xb0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1v.s[w12, 1]}, p3, [x17, x16, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xbe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0v.s[w12, 1]}, p1, [x1, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0xb4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za2v.s[w14, 0]}, p5, [x19, x20, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0xa2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0v.s[w12, 0]}, p6, [x12, x2, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xba, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0v.s[w14, 1]}, p2, [x1, x26, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0xbe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za3v.s[w12, 1]}, p2, [x22, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xa1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0v.s[w15, 2]}, p5, [x9, x1, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xab, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1v.s[w13, 3]}, p2, [x12, x11, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x80, 0xa0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0v.s[w12, 0]}, p0, [x0, x0, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x45, 0xd5, 0xb5, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1v.s[w14, 1]}, p5, [x10, x21, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xa8, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1v.s[w15, 3]}, p3, [x13, x8, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xef, 0xff, 0xbf, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za3v.s[w15, 3]}, p7, [sp]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x8e, 0xb0, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1v.s[w12, 1]}, p3, [x17, x16, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xbe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0v.s[w12, 1]}, p1, [x1, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x68, 0xd6, 0xb4, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za2v.s[w14, 0]}, p5, [x19, x20, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x99, 0xa2, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0v.s[w12, 0]}, p6, [x12, x2, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xba, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0v.s[w14, 1]}, p2, [x1, x26, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x8a, 0xbe, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za3v.s[w12, 1]}, p2, [x22, x30, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xa1, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za0v.s[w15, 2]}, p5, [x9, x1, lsl #2]"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xab, 0xe0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1w {za1v.s[w13, 3]}, p2, [x12, x11, lsl #2]"

thirdparty/capstone/tests/MC/AArch64/SME/str.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w12, 0], [x0]"
+
+  -
+    input:
+      bytes: [ 0x45, 0x41, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w14, 5], [x10, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xa7, 0x61, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w15, 7], [x13, #7, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xef, 0x63, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w15, 15], [sp, #15, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x25, 0x02, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w12, 5], [x17, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x00, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w12, 1], [x1, #1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x68, 0x42, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w14, 8], [x19, #8, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x80, 0x01, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w12, 0], [x12]"
+
+  -
+    input:
+      bytes: [ 0x21, 0x40, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w14, 1], [x1, #1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xcd, 0x02, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w12, 13], [x22, #13, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x22, 0x61, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w15, 2], [x9, #2, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x87, 0x21, 0x20, 0xe1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "str za[w13, 7], [x12, #7, mul vl]"

thirdparty/capstone/tests/MC/AArch64/SME/streaming-mode-neon-bf16.s.yaml

@@ -0,0 +1,10 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x65, 0x40, 0x63, 0x1e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "bfcvt h5, s3"

thirdparty/capstone/tests/MC/AArch64/SME/streaming-mode-neon-fp16.s.yaml

@@ -0,0 +1,60 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x20, 0x1c, 0x42, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+fullfp16" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmulx h0, h1, h2"
+
+  -
+    input:
+      bytes: [ 0x20, 0x3c, 0x42, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+fullfp16" ]
+    expected:
+      insns:
+        -
+          asm_text: "frecps h0, h1, h2"
+
+  -
+    input:
+      bytes: [ 0x20, 0x3c, 0xc2, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+fullfp16" ]
+    expected:
+      insns:
+        -
+          asm_text: "frsqrts h0, h1, h2"
+
+  -
+    input:
+      bytes: [ 0x20, 0xd8, 0xf9, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+fullfp16" ]
+    expected:
+      insns:
+        -
+          asm_text: "frecpe h0, h1"
+
+  -
+    input:
+      bytes: [ 0x20, 0xf8, 0xf9, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+fullfp16" ]
+    expected:
+      insns:
+        -
+          asm_text: "frecpx h0, h1"
+
+  -
+    input:
+      bytes: [ 0x20, 0xd8, 0xf9, 0x7e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+fullfp16" ]
+    expected:
+      insns:
+        -
+          asm_text: "frsqrte h0, h1"

thirdparty/capstone/tests/MC/AArch64/SME/streaming-mode-neon.s.yaml

@@ -0,0 +1,230 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x20, 0xdc, 0x22, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmulx s0, s1, s2"
+
+  -
+    input:
+      bytes: [ 0x20, 0xdc, 0x62, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "fmulx d0, d1, d2"
+
+  -
+    input:
+      bytes: [ 0x20, 0xfc, 0x22, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "frecps s0, s1, s2"
+
+  -
+    input:
+      bytes: [ 0x20, 0xfc, 0x62, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "frecps d0, d1, d2"
+
+  -
+    input:
+      bytes: [ 0x20, 0xfc, 0xa2, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "frsqrts s0, s1, s2"
+
+  -
+    input:
+      bytes: [ 0x20, 0xfc, 0xe2, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "frsqrts d0, d1, d2"
+
+  -
+    input:
+      bytes: [ 0x20, 0xd8, 0xa1, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "frecpe s0, s1"
+
+  -
+    input:
+      bytes: [ 0x20, 0xd8, 0xe1, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "frecpe d0, d1"
+
+  -
+    input:
+      bytes: [ 0x20, 0xf8, 0xa1, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "frecpx s0, s1"
+
+  -
+    input:
+      bytes: [ 0x20, 0xf8, 0xe1, 0x5e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "frecpx d0, d1"
+
+  -
+    input:
+      bytes: [ 0x20, 0xd8, 0xa1, 0x7e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "frsqrte s0, s1"
+
+  -
+    input:
+      bytes: [ 0x20, 0xd8, 0xe1, 0x7e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "frsqrte d0, d1"
+
+  -
+    input:
+      bytes: [ 0x00, 0x2c, 0x01, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smov w0, v0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x2c, 0x01, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smov x0, v0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x2c, 0x02, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smov w0, v0.h[0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x2c, 0x02, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smov x0, v0.h[0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x2c, 0x04, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smov x0, v0.s[0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x01, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umov w0, v0.b[0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x02, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umov w0, v0.h[0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x04, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mov w0, v0.s[0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x08, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mov x0, v0.d[0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x04, 0x0e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mov w0, v0.s[0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x3c, 0x08, 0x4e ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "-neon", "+sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mov x0, v0.d[0]"

thirdparty/capstone/tests/MC/AArch64/SME/sumopa-32.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xa0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za0.s, p0/m, p0/m, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0x41, 0x55, 0xb5, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za1.s, p5/m, p2/m, z10.b, z21.b"
+
+  -
+    input:
+      bytes: [ 0xa3, 0xed, 0xa8, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za3.s, p3/m, p7/m, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xe3, 0xff, 0xbf, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za3.s, p7/m, p7/m, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0x0e, 0xb0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za1.s, p3/m, p0/m, z17.b, z16.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xbe, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za1.s, p1/m, p4/m, z1.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0xb4, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za0.s, p5/m, p2/m, z19.b, z20.b"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xa2, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za0.s, p6/m, p0/m, z12.b, z2.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xba, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za1.s, p2/m, p6/m, z1.b, z26.b"
+
+  -
+    input:
+      bytes: [ 0xc1, 0x0a, 0xbe, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za1.s, p2/m, p0/m, z22.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xa1, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za2.s, p5/m, p7/m, z9.b, z1.b"
+
+  -
+    input:
+      bytes: [ 0x83, 0xa9, 0xab, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za3.s, p2/m, p5/m, z12.b, z11.b"

thirdparty/capstone/tests/MC/AArch64/SME/sumopa-64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xe0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za0.d, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xf5, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za5.d, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xe8, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za7.d, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xe7, 0xff, 0xff, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za7.d, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xf0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za5.d, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xfe, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za1.d, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0xf4, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za0.d, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xe2, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za0.d, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xfa, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za1.d, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xc5, 0x0a, 0xfe, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za5.d, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xe1, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za2.d, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xeb, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumopa za7.d, p2/m, p5/m, z12.h, z11.h"

thirdparty/capstone/tests/MC/AArch64/SME/sumops-32.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0xa0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za0.s, p0/m, p0/m, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0x51, 0x55, 0xb5, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za1.s, p5/m, p2/m, z10.b, z21.b"
+
+  -
+    input:
+      bytes: [ 0xb3, 0xed, 0xa8, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za3.s, p3/m, p7/m, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xf3, 0xff, 0xbf, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za3.s, p7/m, p7/m, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0x0e, 0xb0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za1.s, p3/m, p0/m, z17.b, z16.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0xbe, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za1.s, p1/m, p4/m, z1.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0xb4, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za0.s, p5/m, p2/m, z19.b, z20.b"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0xa2, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za0.s, p6/m, p0/m, z12.b, z2.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0xba, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za1.s, p2/m, p6/m, z1.b, z26.b"
+
+  -
+    input:
+      bytes: [ 0xd1, 0x0a, 0xbe, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za1.s, p2/m, p0/m, z22.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0xa1, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za2.s, p5/m, p7/m, z9.b, z1.b"
+
+  -
+    input:
+      bytes: [ 0x93, 0xa9, 0xab, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za3.s, p2/m, p5/m, z12.b, z11.b"

thirdparty/capstone/tests/MC/AArch64/SME/sumops-64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0xe0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za0.d, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xf5, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za5.d, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xe8, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za7.d, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xff, 0xff, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za7.d, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x35, 0x0e, 0xf0, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za5.d, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0xfe, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za1.d, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0xf4, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za0.d, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0xe2, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za0.d, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0xfa, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za1.d, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xd5, 0x0a, 0xfe, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za5.d, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0xe1, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za2.d, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x97, 0xa9, 0xeb, 0xa0 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "sumops za7.d, p2/m, p5/m, z12.h, z11.h"

thirdparty/capstone/tests/MC/AArch64/SME/system-regs-mpam.s.yaml

@@ -0,0 +1,20 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x63, 0xa5, 0x38, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+mpam" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, MPAMSM_EL1"
+
+  -
+    input:
+      bytes: [ 0x63, 0xa5, 0x18, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme", "+mpam" ]
+    expected:
+      insns:
+        -
+          asm_text: "msr MPAMSM_EL1, x3"

thirdparty/capstone/tests/MC/AArch64/SME/system-regs.s.yaml

@@ -0,0 +1,240 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0xa3, 0x04, 0x38, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, ID_AA64SMFR0_EL1"
+
+  -
+    input:
+      bytes: [ 0xc3, 0x12, 0x38, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, SMCR_EL1"
+
+  -
+    input:
+      bytes: [ 0xc3, 0x12, 0x3c, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, SMCR_EL2"
+
+  -
+    input:
+      bytes: [ 0xc3, 0x12, 0x3e, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, SMCR_EL3"
+
+  -
+    input:
+      bytes: [ 0xc3, 0x12, 0x3d, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, SMCR_EL12"
+
+  -
+    input:
+      bytes: [ 0x43, 0x42, 0x3b, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, SVCR"
+
+  -
+    input:
+      bytes: [ 0x83, 0x12, 0x38, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, SMPRI_EL1"
+
+  -
+    input:
+      bytes: [ 0xa3, 0x12, 0x3c, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, SMPRIMAP_EL2"
+
+  -
+    input:
+      bytes: [ 0xc3, 0x00, 0x39, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, SMIDR_EL1"
+
+  -
+    input:
+      bytes: [ 0xa3, 0xd0, 0x3b, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "mrs x3, TPIDR2_EL0"
+
+  -
+    input:
+      bytes: [ 0xc3, 0x12, 0x18, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "msr SMCR_EL1, x3"
+
+  -
+    input:
+      bytes: [ 0xc3, 0x12, 0x1c, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "msr SMCR_EL2, x3"
+
+  -
+    input:
+      bytes: [ 0xc3, 0x12, 0x1e, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "msr SMCR_EL3, x3"
+
+  -
+    input:
+      bytes: [ 0xc3, 0x12, 0x1d, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "msr SMCR_EL12, x3"
+
+  -
+    input:
+      bytes: [ 0x43, 0x42, 0x1b, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "msr SVCR, x3"
+
+  -
+    input:
+      bytes: [ 0x83, 0x12, 0x18, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "msr SMPRI_EL1, x3"
+
+  -
+    input:
+      bytes: [ 0xa3, 0x12, 0x1c, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "msr SMPRIMAP_EL2, x3"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x42, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop sm"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x43, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart sm"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x44, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop za"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x45, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart za"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x46, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstop"
+
+  -
+    input:
+      bytes: [ 0x7f, 0x47, 0x03, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "smstart"
+
+  -
+    input:
+      bytes: [ 0xa3, 0xd0, 0x1b, 0xd5 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "msr TPIDR2_EL0, x3"

thirdparty/capstone/tests/MC/AArch64/SME/uclamp.s.yaml

@@ -0,0 +1,240 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0xc4, 0x00, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z0.b, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0x55, 0xc5, 0x15, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z21.b, z10.b, z21.b"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc5, 0x08, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z23.b, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xff, 0xc7, 0x1f, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z31.b, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x00, 0xc4, 0x40, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z0.h, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x55, 0xc5, 0x55, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z21.h, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc5, 0x48, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z23.h, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xff, 0xc7, 0x5f, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z31.h, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x00, 0xc4, 0x80, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z0.s, z0.s, z0.s"
+
+  -
+    input:
+      bytes: [ 0x55, 0xc5, 0x95, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z21.s, z10.s, z21.s"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc5, 0x88, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z23.s, z13.s, z8.s"
+
+  -
+    input:
+      bytes: [ 0xff, 0xc7, 0x9f, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z31.s, z31.s, z31.s"
+
+  -
+    input:
+      bytes: [ 0x00, 0xc4, 0xc0, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z0.d, z0.d, z0.d"
+
+  -
+    input:
+      bytes: [ 0x55, 0xc5, 0xd5, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z21.d, z10.d, z21.d"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc5, 0xc8, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z23.d, z13.d, z8.d"
+
+  -
+    input:
+      bytes: [ 0xff, 0xc7, 0xdf, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z31.d, z31.d, z31.d"
+
+  -
+    input:
+      bytes: [ 0x77, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z27"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc5, 0x08, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z23.b, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0x77, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z27"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc5, 0x48, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z23.h, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0x77, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z27"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc5, 0x88, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z23.s, z13.s, z8.s"
+
+  -
+    input:
+      bytes: [ 0x77, 0xbf, 0x20, 0x04 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "movprfx z23, z27"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xc5, 0xc8, 0x44 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "uclamp z23.d, z13.d, z8.d"

thirdparty/capstone/tests/MC/AArch64/SME/umopa-32.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xa0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za0.s, p0/m, p0/m, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0x41, 0x55, 0xb5, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za1.s, p5/m, p2/m, z10.b, z21.b"
+
+  -
+    input:
+      bytes: [ 0xa3, 0xed, 0xa8, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za3.s, p3/m, p7/m, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xe3, 0xff, 0xbf, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za3.s, p7/m, p7/m, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0x0e, 0xb0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za1.s, p3/m, p0/m, z17.b, z16.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xbe, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za1.s, p1/m, p4/m, z1.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0xb4, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za0.s, p5/m, p2/m, z19.b, z20.b"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xa2, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za0.s, p6/m, p0/m, z12.b, z2.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xba, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za1.s, p2/m, p6/m, z1.b, z26.b"
+
+  -
+    input:
+      bytes: [ 0xc1, 0x0a, 0xbe, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za1.s, p2/m, p0/m, z22.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xa1, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za2.s, p5/m, p7/m, z9.b, z1.b"
+
+  -
+    input:
+      bytes: [ 0x83, 0xa9, 0xab, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za3.s, p2/m, p5/m, z12.b, z11.b"

thirdparty/capstone/tests/MC/AArch64/SME/umopa-64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xe0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za0.d, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xf5, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za5.d, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xe8, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za7.d, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xe7, 0xff, 0xff, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za7.d, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xf0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za5.d, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xfe, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za1.d, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0xf4, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za0.d, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xe2, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za0.d, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xfa, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za1.d, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xc5, 0x0a, 0xfe, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za5.d, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xe1, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za2.d, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xeb, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umopa za7.d, p2/m, p5/m, z12.h, z11.h"

thirdparty/capstone/tests/MC/AArch64/SME/umops-32.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0xa0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za0.s, p0/m, p0/m, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0x51, 0x55, 0xb5, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za1.s, p5/m, p2/m, z10.b, z21.b"
+
+  -
+    input:
+      bytes: [ 0xb3, 0xed, 0xa8, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za3.s, p3/m, p7/m, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xf3, 0xff, 0xbf, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za3.s, p7/m, p7/m, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0x0e, 0xb0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za1.s, p3/m, p0/m, z17.b, z16.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0xbe, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za1.s, p1/m, p4/m, z1.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0xb4, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za0.s, p5/m, p2/m, z19.b, z20.b"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0xa2, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za0.s, p6/m, p0/m, z12.b, z2.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0xba, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za1.s, p2/m, p6/m, z1.b, z26.b"
+
+  -
+    input:
+      bytes: [ 0xd1, 0x0a, 0xbe, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za1.s, p2/m, p0/m, z22.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0xa1, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za2.s, p5/m, p7/m, z9.b, z1.b"
+
+  -
+    input:
+      bytes: [ 0x93, 0xa9, 0xab, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za3.s, p2/m, p5/m, z12.b, z11.b"

thirdparty/capstone/tests/MC/AArch64/SME/umops-64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0xe0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za0.d, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xf5, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za5.d, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xe8, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za7.d, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xff, 0xff, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za7.d, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x35, 0x0e, 0xf0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za5.d, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0xfe, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za1.d, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0xf4, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za0.d, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0xe2, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za0.d, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0xfa, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za1.d, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xd5, 0x0a, 0xfe, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za5.d, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0xe1, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za2.d, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x97, 0xa9, 0xeb, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "umops za7.d, p2/m, p5/m, z12.h, z11.h"

thirdparty/capstone/tests/MC/AArch64/SME/usmopa-32.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0x80, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za0.s, p0/m, p0/m, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0x41, 0x55, 0x95, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za1.s, p5/m, p2/m, z10.b, z21.b"
+
+  -
+    input:
+      bytes: [ 0xa3, 0xed, 0x88, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za3.s, p3/m, p7/m, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xe3, 0xff, 0x9f, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za3.s, p7/m, p7/m, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0x0e, 0x90, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za1.s, p3/m, p0/m, z17.b, z16.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0x9e, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za1.s, p1/m, p4/m, z1.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0x94, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za0.s, p5/m, p2/m, z19.b, z20.b"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0x82, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za0.s, p6/m, p0/m, z12.b, z2.b"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0x9a, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za1.s, p2/m, p6/m, z1.b, z26.b"
+
+  -
+    input:
+      bytes: [ 0xc1, 0x0a, 0x9e, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za1.s, p2/m, p0/m, z22.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0x81, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za2.s, p5/m, p7/m, z9.b, z1.b"
+
+  -
+    input:
+      bytes: [ 0x83, 0xa9, 0x8b, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za3.s, p2/m, p5/m, z12.b, z11.b"

thirdparty/capstone/tests/MC/AArch64/SME/usmopa-64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0x00, 0xc0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za0.d, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x45, 0x55, 0xd5, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za5.d, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xa7, 0xed, 0xc8, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za7.d, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xe7, 0xff, 0xdf, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za7.d, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x25, 0x0e, 0xd0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za5.d, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0x84, 0xde, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za1.d, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x60, 0x56, 0xd4, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za0.d, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x80, 0x19, 0xc2, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za0.d, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x21, 0xc8, 0xda, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za1.d, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xc5, 0x0a, 0xde, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za5.d, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x22, 0xf5, 0xc1, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za2.d, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x87, 0xa9, 0xcb, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmopa za7.d, p2/m, p5/m, z12.h, z11.h"

thirdparty/capstone/tests/MC/AArch64/SME/usmops-32.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0x80, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za0.s, p0/m, p0/m, z0.b, z0.b"
+
+  -
+    input:
+      bytes: [ 0x51, 0x55, 0x95, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za1.s, p5/m, p2/m, z10.b, z21.b"
+
+  -
+    input:
+      bytes: [ 0xb3, 0xed, 0x88, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za3.s, p3/m, p7/m, z13.b, z8.b"
+
+  -
+    input:
+      bytes: [ 0xf3, 0xff, 0x9f, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za3.s, p7/m, p7/m, z31.b, z31.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0x0e, 0x90, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za1.s, p3/m, p0/m, z17.b, z16.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0x9e, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za1.s, p1/m, p4/m, z1.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0x94, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za0.s, p5/m, p2/m, z19.b, z20.b"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0x82, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za0.s, p6/m, p0/m, z12.b, z2.b"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0x9a, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za1.s, p2/m, p6/m, z1.b, z26.b"
+
+  -
+    input:
+      bytes: [ 0xd1, 0x0a, 0x9e, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za1.s, p2/m, p0/m, z22.b, z30.b"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0x81, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za2.s, p5/m, p7/m, z9.b, z1.b"
+
+  -
+    input:
+      bytes: [ 0x93, 0xa9, 0x8b, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za3.s, p2/m, p5/m, z12.b, z11.b"

thirdparty/capstone/tests/MC/AArch64/SME/usmops-64.s.yaml

@@ -0,0 +1,120 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x10, 0x00, 0xc0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za0.d, p0/m, p0/m, z0.h, z0.h"
+
+  -
+    input:
+      bytes: [ 0x55, 0x55, 0xd5, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za5.d, p5/m, p2/m, z10.h, z21.h"
+
+  -
+    input:
+      bytes: [ 0xb7, 0xed, 0xc8, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za7.d, p3/m, p7/m, z13.h, z8.h"
+
+  -
+    input:
+      bytes: [ 0xf7, 0xff, 0xdf, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za7.d, p7/m, p7/m, z31.h, z31.h"
+
+  -
+    input:
+      bytes: [ 0x35, 0x0e, 0xd0, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za5.d, p3/m, p0/m, z17.h, z16.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0x84, 0xde, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za1.d, p1/m, p4/m, z1.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x70, 0x56, 0xd4, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za0.d, p5/m, p2/m, z19.h, z20.h"
+
+  -
+    input:
+      bytes: [ 0x90, 0x19, 0xc2, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za0.d, p6/m, p0/m, z12.h, z2.h"
+
+  -
+    input:
+      bytes: [ 0x31, 0xc8, 0xda, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za1.d, p2/m, p6/m, z1.h, z26.h"
+
+  -
+    input:
+      bytes: [ 0xd5, 0x0a, 0xde, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za5.d, p2/m, p0/m, z22.h, z30.h"
+
+  -
+    input:
+      bytes: [ 0x32, 0xf5, 0xc1, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za2.d, p5/m, p7/m, z9.h, z1.h"
+
+  -
+    input:
+      bytes: [ 0x97, 0xa9, 0xcb, 0xa1 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme-i16i64" ]
+    expected:
+      insns:
+        -
+          asm_text: "usmops za7.d, p2/m, p5/m, z12.h, z11.h"