Hello_User/XenonRecomp
1
0
Fork 0
mirror of https://github.com/hedge-dev/XenonRecomp.git synced 2025-07-27 07:23:56 +00:00
Code Issues Packages Projects Releases Wiki Activity

Initial Commit

Browse Source
This commit is contained in:
Sajid
2024-09-07 18:00:09 +06:00
commit 0f9a53f75a
3352 changed files with 1563708 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

160
thirdparty/capstone/tests/MC/AArch64/SME2/ldnt1d.s.yaml vendored Normal file
View File

@@ -0,0 +1,160 @@
test_cases:
-
input:
bytes: [ 0x08, 0x60, 0x00, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z0.d, z8.d }, pn8/z, [x0, x0, lsl #3]"
-
input:
bytes: [ 0x5d, 0x75, 0x15, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z21.d, z29.d }, pn13/z, [x10, x21, lsl #3]"
-
input:
bytes: [ 0xbf, 0x6d, 0x08, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z23.d, z31.d }, pn11/z, [x13, x8, lsl #3]"
-
input:
bytes: [ 0xff, 0x7f, 0x1f, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z23.d, z31.d }, pn15/z, [sp, xzr, lsl #3]"
-
input:
bytes: [ 0x08, 0x60, 0x40, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z0.d, z8.d }, pn8/z, [x0]"
-
input:
bytes: [ 0x5d, 0x75, 0x45, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z21.d, z29.d }, pn13/z, [x10, #10, mul vl]"
-
input:
bytes: [ 0xbf, 0x6d, 0x48, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z23.d, z31.d }, pn11/z, [x13, #-16, mul vl]"
-
input:
bytes: [ 0xff, 0x7f, 0x4f, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z23.d, z31.d }, pn15/z, [sp, #-2, mul vl]"
-
input:
bytes: [ 0x08, 0xe0, 0x00, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, x0, lsl #3]"
-
input:
bytes: [ 0x59, 0xf5, 0x15, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z17.d, z21.d, z25.d, z29.d }, pn13/z, [x10, x21, lsl #3]"
-
input:
bytes: [ 0xbb, 0xed, 0x08, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z19.d, z23.d, z27.d, z31.d }, pn11/z, [x13, x8, lsl #3]"
-
input:
bytes: [ 0xfb, 0xff, 0x1f, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z19.d, z23.d, z27.d, z31.d }, pn15/z, [sp, xzr, lsl #3]"
-
input:
bytes: [ 0x08, 0xe0, 0x40, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0]"
-
input:
bytes: [ 0x59, 0xf5, 0x45, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z17.d, z21.d, z25.d, z29.d }, pn13/z, [x10, #20, mul vl]"
-
input:
bytes: [ 0xbb, 0xed, 0x48, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z19.d, z23.d, z27.d, z31.d }, pn11/z, [x13, #-32, mul vl]"
-
input:
bytes: [ 0xfb, 0xff, 0x4f, 0xa1 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme2" ]
expected:
insns:
-
asm_text: "ldnt1d { z19.d, z23.d, z27.d, z31.d }, pn15/z, [sp, #-4, mul vl]"