mirror of
https://github.com/hedge-dev/XenonRecomp.git
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Initial Commit
This commit is contained in:
Sajid
320
thirdparty/capstone/tests/MC/AArch64/SVE/insr.s.yaml
vendored
Normal file
320
thirdparty/capstone/tests/MC/AArch64/SVE/insr.s.yaml
vendored
Normal file
@@ -0,0 +1,320 @@
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test_cases:
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-
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input:
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bytes: [ 0x00, 0x38, 0x24, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z0.b, w0"
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-
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input:
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bytes: [ 0x00, 0x38, 0x64, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z0.h, w0"
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-
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input:
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bytes: [ 0x00, 0x38, 0xa4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z0.s, w0"
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-
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input:
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bytes: [ 0x00, 0x38, 0xe4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z0.d, x0"
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-
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input:
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bytes: [ 0xff, 0x3b, 0x24, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z31.b, wzr"
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-
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input:
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bytes: [ 0xff, 0x3b, 0x64, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z31.h, wzr"
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-
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input:
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bytes: [ 0xff, 0x3b, 0xa4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z31.s, wzr"
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-
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input:
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bytes: [ 0xff, 0x3b, 0xe4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z31.d, xzr"
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-
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input:
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bytes: [ 0xff, 0x3b, 0x34, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z31.b, b31"
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-
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input:
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bytes: [ 0xff, 0x3b, 0x74, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z31.h, h31"
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-
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input:
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bytes: [ 0xff, 0x3b, 0xb4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z31.s, s31"
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-
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input:
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bytes: [ 0xff, 0x3b, 0xf4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z31.d, d31"
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-
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input:
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bytes: [ 0xdf, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "movprfx z31, z6"
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-
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input:
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bytes: [ 0xff, 0x3b, 0xe4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z31.d, xzr"
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-
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input:
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bytes: [ 0xc4, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "movprfx z4, z6"
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-
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input:
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bytes: [ 0xe4, 0x3b, 0xf4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
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expected:
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insns:
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-
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asm_text: "insr z4.d, d31"
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-
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input:
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bytes: [ 0x00, 0x38, 0x24, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z0.b, w0"
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-
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input:
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bytes: [ 0x00, 0x38, 0x64, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z0.h, w0"
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-
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input:
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bytes: [ 0x00, 0x38, 0xa4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z0.s, w0"
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-
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input:
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bytes: [ 0x00, 0x38, 0xe4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z0.d, x0"
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-
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input:
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bytes: [ 0xff, 0x3b, 0x24, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z31.b, wzr"
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-
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input:
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bytes: [ 0xff, 0x3b, 0x64, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z31.h, wzr"
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-
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input:
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bytes: [ 0xff, 0x3b, 0xa4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z31.s, wzr"
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-
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input:
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bytes: [ 0xff, 0x3b, 0xe4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z31.d, xzr"
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-
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input:
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bytes: [ 0xff, 0x3b, 0x34, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z31.b, b31"
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-
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input:
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bytes: [ 0xff, 0x3b, 0x74, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z31.h, h31"
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-
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input:
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bytes: [ 0xff, 0x3b, 0xb4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z31.s, s31"
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-
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input:
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bytes: [ 0xff, 0x3b, 0xf4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z31.d, d31"
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-
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input:
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bytes: [ 0xdf, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "movprfx z31, z6"
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-
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input:
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bytes: [ 0xff, 0x3b, 0xe4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z31.d, xzr"
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-
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input:
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bytes: [ 0xc4, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "movprfx z4, z6"
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-
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input:
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bytes: [ 0xe4, 0x3b, 0xf4, 0x05 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
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expected:
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insns:
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-
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asm_text: "insr z4.d, d31"
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