mirror of
https://github.com/hedge-dev/XenonRecomp.git
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Initial Commit
This commit is contained in:
Sajid
220
thirdparty/capstone/tests/MC/AArch64/armv8.5a-specrestrict.s.yaml
vendored
Normal file
220
thirdparty/capstone/tests/MC/AArch64/armv8.5a-specrestrict.s.yaml
vendored
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@@ -0,0 +1,220 @@
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test_cases:
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-
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input:
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bytes: [ 0x89, 0x03, 0x38, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "specrestrict" ]
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expected:
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insns:
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-
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asm_text: "mrs x9, ID_PFR2_EL1"
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-
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input:
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bytes: [ 0xe8, 0xd0, 0x3b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "specrestrict" ]
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expected:
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insns:
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-
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asm_text: "mrs x8, SCXTNUM_EL0"
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-
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input:
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bytes: [ 0xe7, 0xd0, 0x38, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "specrestrict" ]
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expected:
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insns:
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-
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asm_text: "mrs x7, SCXTNUM_EL1"
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-
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input:
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bytes: [ 0xe6, 0xd0, 0x3c, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "specrestrict" ]
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expected:
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insns:
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-
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asm_text: "mrs x6, SCXTNUM_EL2"
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-
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input:
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bytes: [ 0xe5, 0xd0, 0x3e, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "specrestrict" ]
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expected:
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insns:
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-
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asm_text: "mrs x5, SCXTNUM_EL3"
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-
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input:
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bytes: [ 0xe4, 0xd0, 0x3d, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "specrestrict" ]
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expected:
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insns:
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-
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asm_text: "mrs x4, SCXTNUM_EL12"
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-
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input:
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bytes: [ 0xe8, 0xd0, 0x1b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "specrestrict" ]
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expected:
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insns:
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-
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asm_text: "msr SCXTNUM_EL0, x8"
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-
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input:
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bytes: [ 0xe7, 0xd0, 0x18, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "specrestrict" ]
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expected:
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insns:
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-
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asm_text: "msr SCXTNUM_EL1, x7"
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-
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input:
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bytes: [ 0xe6, 0xd0, 0x1c, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "specrestrict" ]
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expected:
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insns:
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-
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asm_text: "msr SCXTNUM_EL2, x6"
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-
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input:
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bytes: [ 0xe5, 0xd0, 0x1e, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "specrestrict" ]
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expected:
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insns:
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-
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asm_text: "msr SCXTNUM_EL3, x5"
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-
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input:
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bytes: [ 0xe4, 0xd0, 0x1d, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "specrestrict" ]
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expected:
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insns:
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-
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asm_text: "msr SCXTNUM_EL12, x4"
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-
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input:
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bytes: [ 0x89, 0x03, 0x38, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "mrs x9, ID_PFR2_EL1"
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-
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input:
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bytes: [ 0xe8, 0xd0, 0x3b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "mrs x8, SCXTNUM_EL0"
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-
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input:
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bytes: [ 0xe7, 0xd0, 0x38, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "mrs x7, SCXTNUM_EL1"
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-
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input:
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bytes: [ 0xe6, 0xd0, 0x3c, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "mrs x6, SCXTNUM_EL2"
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-
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input:
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bytes: [ 0xe5, 0xd0, 0x3e, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "mrs x5, SCXTNUM_EL3"
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-
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input:
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bytes: [ 0xe4, 0xd0, 0x3d, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "mrs x4, SCXTNUM_EL12"
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-
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input:
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bytes: [ 0xe8, 0xd0, 0x1b, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "msr SCXTNUM_EL0, x8"
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-
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input:
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bytes: [ 0xe7, 0xd0, 0x18, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "msr SCXTNUM_EL1, x7"
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-
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input:
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bytes: [ 0xe6, 0xd0, 0x1c, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "msr SCXTNUM_EL2, x6"
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-
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input:
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bytes: [ 0xe5, 0xd0, 0x1e, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "msr SCXTNUM_EL3, x5"
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-
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input:
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bytes: [ 0xe4, 0xd0, 0x1d, 0xd5 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "v8.5a" ]
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expected:
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insns:
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-
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asm_text: "msr SCXTNUM_EL12, x4"
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