mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-07-26 06:53:56 +00:00
Initial Commit
This commit is contained in:
7588
thirdparty/capstone/tests/MC/TriCore/ADC_Background_Scan_1_KIT_TC275_LK.s.yaml
vendored
Normal file
7588
thirdparty/capstone/tests/MC/TriCore/ADC_Background_Scan_1_KIT_TC275_LK.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
8659
thirdparty/capstone/tests/MC/TriCore/ADC_Queued_Scan_1_KIT_TC397_TFT.s.yaml
vendored
Normal file
8659
thirdparty/capstone/tests/MC/TriCore/ADC_Queued_Scan_1_KIT_TC397_TFT.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
2521
thirdparty/capstone/tests/MC/TriCore/J_Call_Loop.s.yaml
vendored
Normal file
2521
thirdparty/capstone/tests/MC/TriCore/J_Call_Loop.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
2854
thirdparty/capstone/tests/MC/TriCore/LoadStore.s.yaml
vendored
Normal file
2854
thirdparty/capstone/tests/MC/TriCore/LoadStore.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
19
thirdparty/capstone/tests/MC/TriCore/csfr.s.yaml
vendored
Normal file
19
thirdparty/capstone/tests/MC/TriCore/csfr.s.yaml
vendored
Normal file
@@ -0,0 +1,19 @@
|
||||
test_cases:
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xcd, 0x41, 0xe0, 0x0f ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_131" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "mtcr #-0x1fc, d1"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x4d, 0x40, 0xe0, 0x2f ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_131" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "mfcr d2, #0xfe04"
|
10
thirdparty/capstone/tests/MC/TriCore/debug.s.yaml
vendored
Normal file
10
thirdparty/capstone/tests/MC/TriCore/debug.s.yaml
vendored
Normal file
@@ -0,0 +1,10 @@
|
||||
test_cases:
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x4b, 0x00, 0x00, 0x00 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_131" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "cmp.f d0, d0, d0"
|
19
thirdparty/capstone/tests/MC/TriCore/extr_u.s.yaml
vendored
Normal file
19
thirdparty/capstone/tests/MC/TriCore/extr_u.s.yaml
vendored
Normal file
@@ -0,0 +1,19 @@
|
||||
test_cases:
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x17, 0x01, 0x40, 0x02 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_131" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "extr d0, d1, e2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x17, 0x01, 0x60, 0x02 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_131" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "extr.u d0, d1, e2"
|
10
thirdparty/capstone/tests/MC/TriCore/handwrite.s.yaml
vendored
Normal file
10
thirdparty/capstone/tests/MC/TriCore/handwrite.s.yaml
vendored
Normal file
@@ -0,0 +1,10 @@
|
||||
test_cases:
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x8f, 0xff, 0x83, 0x81 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "xor d8, d15, #0x3f"
|
23563
thirdparty/capstone/tests/MC/TriCore/iLLD_TC375_ADS_Bluetooth_RFCOMM.s.yaml
vendored
Normal file
23563
thirdparty/capstone/tests/MC/TriCore/iLLD_TC375_ADS_Bluetooth_RFCOMM.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
415
thirdparty/capstone/tests/MC/TriCore/ldst_br_circ.s.yaml
vendored
Normal file
415
thirdparty/capstone/tests/MC/TriCore/ldst_br_circ.s.yaml
vendored
Normal file
@@ -0,0 +1,415 @@
|
||||
test_cases:
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x00, 0x80, 0x03 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "cachea.i [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x00, 0x8a, 0x07 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "cachea.i [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x00, 0x00, 0x03 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "cachea.w [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x00, 0x0a, 0x07 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "cachea.w [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x00, 0x40, 0x03 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "cachea.wi [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x00, 0x4a, 0x07 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "cachea.wi [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x69, 0x02, 0xc0, 0x00 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "cmpswap.w [p0+r], e2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x69, 0x02, 0xca, 0x04 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "cmpswap.w [p0+c]#0xa, e2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x80, 0x01 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.a a2, [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x8a, 0x05 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.a a2, [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x00, 0x00 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.b d2, [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x0a, 0x04 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.b d2, [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x40, 0x00 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.bu d2, [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x4a, 0x04 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.bu d2, [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x40, 0x01 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.d e2, [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x4a, 0x05 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.d e2, [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0xc0, 0x01 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.da p2, [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0xca, 0x05 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.da p2, [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x80, 0x00 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.h d2, [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x8a, 0x04 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.h d2, [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0xc0, 0x00 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.hu d2, [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0xca, 0x04 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.hu d2, [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x00, 0x02 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.q d2, [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x0a, 0x06 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.q d2, [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x00, 0x01 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.w d2, [p0+r]"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x29, 0x02, 0x0a, 0x05 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ld.w d2, [p0+c]#0xa"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x69, 0x02, 0x40, 0x00 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ldmst [p0+r], e2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x69, 0x02, 0x4a, 0x04 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "ldmst [p0+c]#0xa, e2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x80, 0x01 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.a [p0+r], a2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x8a, 0x05 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.a [p0+c]#0xa, a2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x00, 0x00 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.b [p0+r], d2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x0a, 0x04 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.b [p0+c]#0xa, d2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x40, 0x01 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.d [p0+r], e2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x4a, 0x05 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.d [p0+c]#0xa, e2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0xc0, 0x01 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.da [p0+r], p2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0xca, 0x05 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.da [p0+c]#0xa, p2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x80, 0x00 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.h [p0+r], d2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x8a, 0x04 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.h [p0+c]#0xa, d2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x00, 0x02 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.q [p0+r], d2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x0a, 0x06 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.q [p0+c]#0xa, d2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x00, 0x01 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.w [p0+r], d2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0xa9, 0x02, 0x0a, 0x05 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "st.w [p0+c]#0xa, d2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x69, 0x02, 0x00, 0x00 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "swap.w [p0+r], d2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x69, 0x02, 0x0a, 0x04 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "swap.w [p0+c]#0xa, d2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x69, 0x02, 0x80, 0x00 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "swapmsk.w [p0+r], e2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x69, 0x02, 0x8a, 0x04 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_162" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "swapmsk.w [p0+c]#0xa, e2"
|
46
thirdparty/capstone/tests/MC/TriCore/rr_insn.s.yaml
vendored
Normal file
46
thirdparty/capstone/tests/MC/TriCore/rr_insn.s.yaml
vendored
Normal file
@@ -0,0 +1,46 @@
|
||||
test_cases:
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x0b, 0x20, 0xc0, 0x01 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_131" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "abs d0, d2"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x0b, 0x60, 0xc0, 0x05 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_131" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "abs.b d0, d6"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x0b, 0x40, 0xc0, 0x27 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_131" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "abs.h d2, d4"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x0b, 0x10, 0xd0, 0x01 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_131" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "abss d0, d1"
|
||||
-
|
||||
input:
|
||||
bytes: [ 0x0b, 0x10, 0xd0, 0x07 ]
|
||||
arch: "CS_ARCH_TRICORE"
|
||||
options: [ "CS_MODE_TRICORE_131" ]
|
||||
expected:
|
||||
insns:
|
||||
-
|
||||
asm_text: "abss.h d0, d1"
|
5617
thirdparty/capstone/tests/MC/TriCore/tc110.s.yaml
vendored
Normal file
5617
thirdparty/capstone/tests/MC/TriCore/tc110.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
6832
thirdparty/capstone/tests/MC/TriCore/tc120.s.yaml
vendored
Normal file
6832
thirdparty/capstone/tests/MC/TriCore/tc120.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
7066
thirdparty/capstone/tests/MC/TriCore/tc130.s.yaml
vendored
Normal file
7066
thirdparty/capstone/tests/MC/TriCore/tc130.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
7147
thirdparty/capstone/tests/MC/TriCore/tc131.s.yaml
vendored
Normal file
7147
thirdparty/capstone/tests/MC/TriCore/tc131.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
7399
thirdparty/capstone/tests/MC/TriCore/tc160.s.yaml
vendored
Normal file
7399
thirdparty/capstone/tests/MC/TriCore/tc160.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
7516
thirdparty/capstone/tests/MC/TriCore/tc161.s.yaml
vendored
Normal file
7516
thirdparty/capstone/tests/MC/TriCore/tc161.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
7579
thirdparty/capstone/tests/MC/TriCore/tc162.s.yaml
vendored
Normal file
7579
thirdparty/capstone/tests/MC/TriCore/tc162.s.yaml
vendored
Normal file
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user