Handle "r0 as 0" cases.

This commit is contained in:
Skyth
2024-09-14 23:17:51 +03:00
parent df78800c8d
commit 26122def54
2 changed files with 304 additions and 168 deletions

View File

@@ -81,7 +81,22 @@ struct PPCCRRegister
}
};
typedef float float128[4];
struct alignas(0x10) PPCVRegister
{
union
{
int8_t s8[16];
uint8_t u8[16];
int16_t s16[8];
uint16_t u16[8];
int32_t s32[4];
uint32_t u32[4];
int64_t s64[2];
uint64_t u64[2];
float f32[4];
double f64[2];
};
};
struct PPCContext
{
@@ -190,135 +205,135 @@ struct PPCContext
{
struct
{
float128 v0;
float128 v1;
float128 v2;
float128 v3;
float128 v4;
float128 v5;
float128 v6;
float128 v7;
float128 v8;
float128 v9;
float128 v10;
float128 v11;
float128 v12;
float128 v13;
float128 v14;
float128 v15;
float128 v16;
float128 v17;
float128 v18;
float128 v19;
float128 v20;
float128 v21;
float128 v22;
float128 v23;
float128 v24;
float128 v25;
float128 v26;
float128 v27;
float128 v28;
float128 v29;
float128 v30;
float128 v31;
float128 v32;
float128 v33;
float128 v34;
float128 v35;
float128 v36;
float128 v37;
float128 v38;
float128 v39;
float128 v40;
float128 v41;
float128 v42;
float128 v43;
float128 v44;
float128 v45;
float128 v46;
float128 v47;
float128 v48;
float128 v49;
float128 v50;
float128 v51;
float128 v52;
float128 v53;
float128 v54;
float128 v55;
float128 v56;
float128 v57;
float128 v58;
float128 v59;
float128 v60;
float128 v61;
float128 v62;
float128 v63;
float128 v64;
float128 v65;
float128 v66;
float128 v67;
float128 v68;
float128 v69;
float128 v70;
float128 v71;
float128 v72;
float128 v73;
float128 v74;
float128 v75;
float128 v76;
float128 v77;
float128 v78;
float128 v79;
float128 v80;
float128 v81;
float128 v82;
float128 v83;
float128 v84;
float128 v85;
float128 v86;
float128 v87;
float128 v88;
float128 v89;
float128 v90;
float128 v91;
float128 v92;
float128 v93;
float128 v94;
float128 v95;
float128 v96;
float128 v97;
float128 v98;
float128 v99;
float128 v100;
float128 v101;
float128 v102;
float128 v103;
float128 v104;
float128 v105;
float128 v106;
float128 v107;
float128 v108;
float128 v109;
float128 v110;
float128 v111;
float128 v112;
float128 v113;
float128 v114;
float128 v115;
float128 v116;
float128 v117;
float128 v118;
float128 v119;
float128 v120;
float128 v121;
float128 v122;
float128 v123;
float128 v124;
float128 v125;
float128 v126;
float128 v127;
PPCVRegister v0;
PPCVRegister v1;
PPCVRegister v2;
PPCVRegister v3;
PPCVRegister v4;
PPCVRegister v5;
PPCVRegister v6;
PPCVRegister v7;
PPCVRegister v8;
PPCVRegister v9;
PPCVRegister v10;
PPCVRegister v11;
PPCVRegister v12;
PPCVRegister v13;
PPCVRegister v14;
PPCVRegister v15;
PPCVRegister v16;
PPCVRegister v17;
PPCVRegister v18;
PPCVRegister v19;
PPCVRegister v20;
PPCVRegister v21;
PPCVRegister v22;
PPCVRegister v23;
PPCVRegister v24;
PPCVRegister v25;
PPCVRegister v26;
PPCVRegister v27;
PPCVRegister v28;
PPCVRegister v29;
PPCVRegister v30;
PPCVRegister v31;
PPCVRegister v32;
PPCVRegister v33;
PPCVRegister v34;
PPCVRegister v35;
PPCVRegister v36;
PPCVRegister v37;
PPCVRegister v38;
PPCVRegister v39;
PPCVRegister v40;
PPCVRegister v41;
PPCVRegister v42;
PPCVRegister v43;
PPCVRegister v44;
PPCVRegister v45;
PPCVRegister v46;
PPCVRegister v47;
PPCVRegister v48;
PPCVRegister v49;
PPCVRegister v50;
PPCVRegister v51;
PPCVRegister v52;
PPCVRegister v53;
PPCVRegister v54;
PPCVRegister v55;
PPCVRegister v56;
PPCVRegister v57;
PPCVRegister v58;
PPCVRegister v59;
PPCVRegister v60;
PPCVRegister v61;
PPCVRegister v62;
PPCVRegister v63;
PPCVRegister v64;
PPCVRegister v65;
PPCVRegister v66;
PPCVRegister v67;
PPCVRegister v68;
PPCVRegister v69;
PPCVRegister v70;
PPCVRegister v71;
PPCVRegister v72;
PPCVRegister v73;
PPCVRegister v74;
PPCVRegister v75;
PPCVRegister v76;
PPCVRegister v77;
PPCVRegister v78;
PPCVRegister v79;
PPCVRegister v80;
PPCVRegister v81;
PPCVRegister v82;
PPCVRegister v83;
PPCVRegister v84;
PPCVRegister v85;
PPCVRegister v86;
PPCVRegister v87;
PPCVRegister v88;
PPCVRegister v89;
PPCVRegister v90;
PPCVRegister v91;
PPCVRegister v92;
PPCVRegister v93;
PPCVRegister v94;
PPCVRegister v95;
PPCVRegister v96;
PPCVRegister v97;
PPCVRegister v98;
PPCVRegister v99;
PPCVRegister v100;
PPCVRegister v101;
PPCVRegister v102;
PPCVRegister v103;
PPCVRegister v104;
PPCVRegister v105;
PPCVRegister v106;
PPCVRegister v107;
PPCVRegister v108;
PPCVRegister v109;
PPCVRegister v110;
PPCVRegister v111;
PPCVRegister v112;
PPCVRegister v113;
PPCVRegister v114;
PPCVRegister v115;
PPCVRegister v116;
PPCVRegister v117;
PPCVRegister v118;
PPCVRegister v119;
PPCVRegister v120;
PPCVRegister v121;
PPCVRegister v122;
PPCVRegister v123;
PPCVRegister v124;
PPCVRegister v125;
PPCVRegister v126;
PPCVRegister v127;
};
float128 v[128];
PPCVRegister v[128];
};
};