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				https://github.com/hedge-dev/XenonRecomp.git
				synced 2025-11-04 06:47:09 +00:00 
			
		
		
		
	add remaining altivec instructions
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		@@ -1881,6 +1881,16 @@ bool Recompiler::Recompile(
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            println("_mm_load_ps({}.f32)));", v(insn.operands[1]));
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        break;
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    case PPC_INST_VCTUXS:
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    case PPC_INST_VCFPUXWS128:
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        printSetFlushMode(true);
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        print("\t_mm_store_si128((__m128i*){}.u32, _mm_vctuxs(", v(insn.operands[0]));
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        if (insn.operands[2] != 0)
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            println("_mm_mul_ps(_mm_load_ps({}.f32), _mm_set1_ps({}))));", v(insn.operands[1]), 1u << insn.operands[2]);
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        else
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            println("_mm_load_ps({}.f32)));", v(insn.operands[1]));
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        break;
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    case PPC_INST_VCFSX:
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    case PPC_INST_VCSXWFP128:
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    {
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@@ -2198,6 +2208,14 @@ bool Recompiler::Recompile(
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        break;
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    }
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    case PPC_INST_VRLH:
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        for (size_t i = 0; i < 8; i++)
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        {
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            println("\t{0}.u16[{1}] = ({2}.u16[{1}] << ({3}.u16[{1}] & 0xF)) | ({2}.u16[{1}] >> (16 - ({3}.u16[{1}] & 0xF)));", vTemp(), i, v(insn.operands[1]), v(insn.operands[2]));
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        }
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        println("{} = {};", v(insn.operands[0]), vTemp());
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        break;
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    case PPC_INST_VRSQRTEFP:
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    case PPC_INST_VRSQRTEFP128:
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        // TODO: see if we can use rsqrt safely
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@@ -2752,7 +2770,7 @@ void Recompiler::SaveCurrentOutData(const std::string_view& name)
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        bool shouldWrite = true;
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        // Check if an identical file already exists first to not trigger recompilation
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        std::string filePath = std::format("{}{}/{}", config.directoryPath, config.outDirectoryPath, name.empty() ? cppName : name);
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        std::string filePath = std::format("{}/{}/{}", config.directoryPath, config.outDirectoryPath, name.empty() ? cppName : name);
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        FILE* f = fopen(filePath.c_str(), "rb");
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        if (f)
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        {
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@@ -644,6 +644,19 @@ inline __m128i _mm_vctsxs(__m128 src1)
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    return _mm_andnot_si128(_mm_castps_si128(xmm2), _mm_castps_si128(dest));
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}
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inline __m128i _mm_vctuxs(__m128 src1)
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{
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    __m128 xmm0 = _mm_max_ps(src1, _mm_set1_epi32(0));
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    __m128 xmm1 = _mm_cmpge_ps(xmm0, _mm_set1_ps((float)0x80000000));
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    __m128 xmm2 = _mm_sub_ps(xmm0, _mm_set1_ps((float)0x80000000));
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    xmm0 = _mm_blendv_ps(xmm0, xmm2, xmm1);
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    __m128i dest = _mm_cvttps_epi32(xmm0);
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    xmm0 = _mm_cmpeq_epi32(dest, _mm_set1_epi32(INT_MIN));
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    xmm1 = _mm_and_si128(xmm1, _mm_set1_epi32(INT_MIN));
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    dest = _mm_add_epi32(dest, xmm1);
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    return _mm_or_si128(dest, xmm0);
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}
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inline __m128i _mm_vsr(__m128i a, __m128i b)
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{
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    b = _mm_srli_epi64(_mm_slli_epi64(b, 61), 61);
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