mirror of
				https://github.com/hedge-dev/XenonRecomp.git
				synced 2025-11-04 06:47:09 +00:00 
			
		
		
		
	Convert calls to indirect calls for the time being.
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		@@ -174,21 +174,9 @@ int main()
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                    break;
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					                    break;
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                case PPC_INST_BL:
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					                case PPC_INST_BL:
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                {
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                    std::string targetName = "";
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                    auto targetSymbol = image.symbols.find(insn.operands[0]);
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                    if (targetSymbol != image.symbols.end() && targetSymbol->type == Symbol_Function)
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                    {
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                        targetName = targetSymbol->name;
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                    }
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                    else
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                    {
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                        targetName = std::format("sub_{:X}", insn.operands[0]);
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                    }
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                    std::println(f, "\tctx.lr = 0x{:X};", base);
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					                    std::println(f, "\tctx.lr = 0x{:X};", base);
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                    std::println(f, "\t{}(ctx, base);", targetName);
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					                    std::println(f, "\tctx.fn[0x{:X}](ctx, base);", base / 4);
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                    break;
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					                    break;
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                }
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                case PPC_INST_BLE:
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					                case PPC_INST_BLE:
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                    std::println(f, "\tif (!ctx.cr{}.gt) goto loc_{:X};", insn.operands[0], insn.operands[1]);
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					                    std::println(f, "\tif (!ctx.cr{}.gt) goto loc_{:X};", insn.operands[0], insn.operands[1]);
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@@ -279,7 +267,7 @@ int main()
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                    break;
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					                    break;
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                case PPC_INST_CNTLZW:
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					                case PPC_INST_CNTLZW:
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                    std::println(f, "\tctx.r{}.u64 = __lzcnt32(ctx.r{}.u32);", insn.operands[0], insn.operands[1]);
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					                    std::println(f, "\tctx.r{}.u64 = __lzcnt(ctx.r{}.u32);", insn.operands[0], insn.operands[1]);
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                    break;
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					                    break;
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                case PPC_INST_DB16CYC:
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					                case PPC_INST_DB16CYC:
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@@ -9,6 +9,7 @@
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#define _byteswap_ushort __builtin_bswap16
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					#define _byteswap_ushort __builtin_bswap16
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#define _byteswap_ulong __builtin_bswap32
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					#define _byteswap_ulong __builtin_bswap32
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#define _byteswap_uint64 __builtin_bswap64
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					#define _byteswap_uint64 __builtin_bswap64
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					#define isnan __builtin_isnan
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#define PPC_FUNC __attribute__((weak,noinline))
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					#define PPC_FUNC __attribute__((weak,noinline))
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#else
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					#else
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#include <intrin.h>
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					#include <intrin.h>
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@@ -25,6 +26,8 @@
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#define PPC_STORE_U32(x, y) *(uint32_t*)(base + (x)) = _byteswap_ulong(y)
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					#define PPC_STORE_U32(x, y) *(uint32_t*)(base + (x)) = _byteswap_ulong(y)
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#define PPC_STORE_U64(x, y) *(uint64_t*)(base + (x)) = _byteswap_uint64(y)
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					#define PPC_STORE_U64(x, y) *(uint64_t*)(base + (x)) = _byteswap_uint64(y)
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					typedef void PPCFunc(struct PPCContext& __restrict ctx, uint8_t* base);
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struct PPCRegister
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					struct PPCRegister
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{
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					{
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    union
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					    union
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@@ -82,6 +85,7 @@ typedef float float128[4];
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struct PPCContext
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					struct PPCContext
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{
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					{
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					    PPCFunc** fn;
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    uint64_t lr;
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					    uint64_t lr;
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    uint64_t ctr;
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					    uint64_t ctr;
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    PPCXERRegister xer;
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					    PPCXERRegister xer;
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