From e2835efa722c8700dade57c4e74a2c7ca82cd84a Mon Sep 17 00:00:00 2001
From: Skyth <19259897+blueskythlikesclouds@users.noreply.github.com>
Date: Mon, 23 Sep 2024 22:27:02 +0300
Subject: [PATCH] Check for redundant operations.

---
 PowerRecomp/recompiler.cpp | 48 +++++++++++++++++++++++++++++++-------
 1 file changed, 39 insertions(+), 9 deletions(-)

diff --git a/PowerRecomp/recompiler.cpp b/PowerRecomp/recompiler.cpp
index 882a33b..360948e 100644
--- a/PowerRecomp/recompiler.cpp
+++ b/PowerRecomp/recompiler.cpp
@@ -1305,26 +1305,44 @@ bool Recompiler::Recompile(const Function& fn, uint32_t base, const ppc_insn& in
     case PPC_INST_VCTSXS:
     case PPC_INST_VCFPSXWS128:
         println("\tctx.fpscr.setFlushMode(true);");
-        println("\t_mm_store_si128((__m128i*)ctx.v{}.s32, _mm_vctsxs(_mm_mul_ps(_mm_load_ps(ctx.v{}.f32), _mm_set1_ps({}))));", insn.operands[0], insn.operands[1], 1u << insn.operands[2]);
+        print("\t_mm_store_si128((__m128i*)ctx.v{}.s32, _mm_vctsxs(", insn.operands[0]);
+        if (insn.operands[2] != 0)
+            println("_mm_mul_ps(_mm_load_ps(ctx.v{}.f32), _mm_set1_ps({}))));", insn.operands[1], 1u << insn.operands[2]);
+        else
+            println("_mm_load_ps(ctx.v{}.f32)));", insn.operands[1]);
         break;
 
     case PPC_INST_VCFSX:
     case PPC_INST_VCSXWFP128:
     {
-        const float v = ldexp(1.0f, -int32_t(insn.operands[2]));
-
         println("\tctx.fpscr.setFlushMode(true);");
-        println("\t_mm_store_ps(ctx.v{}.f32, _mm_mul_ps(_mm_cvtepi32_ps(_mm_load_si128((__m128i*)ctx.v{}.u32)), _mm_castsi128_ps(_mm_set1_epi32(int(0x{:X})))));", insn.operands[0], insn.operands[1], *reinterpret_cast<const uint32_t*>(&v));
+        print("\t_mm_store_ps(ctx.v{}.f32, ", insn.operands[0]);
+        if (insn.operands[2] != 0)
+        {
+            const float v = ldexp(1.0f, -int32_t(insn.operands[2]));
+            println("_mm_mul_ps(_mm_cvtepi32_ps(_mm_load_si128((__m128i*)ctx.v{}.u32)), _mm_castsi128_ps(_mm_set1_epi32(int(0x{:X})))));", insn.operands[1], *reinterpret_cast<const uint32_t*>(&v));
+        }
+        else
+        {
+            println("_mm_cvtepi32_ps(_mm_load_si128((__m128i*)ctx.v{}.u32)));", insn.operands[1]);
+        }
         break;
     }
 
     case PPC_INST_VCFUX:
     case PPC_INST_VCUXWFP128:
     {
-        const float v = ldexp(1.0f, -int32_t(insn.operands[2]));
-
         println("\tctx.fpscr.setFlushMode(true);");
-        println("\t_mm_store_ps(ctx.v{}.f32, _mm_mul_ps(_mm_cvtepu32_ps_(_mm_load_si128((__m128i*)ctx.v{}.u32)), _mm_castsi128_ps(_mm_set1_epi32(int(0x{:X})))));", insn.operands[0], insn.operands[1], *reinterpret_cast<const uint32_t*>(&v));
+        print("\t_mm_store_ps(ctx.v{}.f32, ", insn.operands[0]);
+        if (insn.operands[2] != 0)
+        {
+            const float v = ldexp(1.0f, -int32_t(insn.operands[2]));
+            println("_mm_mul_ps(_mm_cvtepu32_ps_(_mm_load_si128((__m128i*)ctx.v{}.u32)), _mm_castsi128_ps(_mm_set1_epi32(int(0x{:X})))));", insn.operands[1], *reinterpret_cast<const uint32_t*>(&v));
+        }
+        else
+        {
+            println("_mm_cvtepu32_ps_(_mm_load_si128((__m128i*)ctx.v{}.u32)));", insn.operands[1]);
+        }
         break;
     }
 
@@ -1467,7 +1485,13 @@ bool Recompiler::Recompile(const Function& fn, uint32_t base, const ppc_insn& in
 
     case PPC_INST_VOR:
     case PPC_INST_VOR128:
-        println("\t_mm_store_si128((__m128i*)ctx.v{}.u8, _mm_or_si128(_mm_load_si128((__m128i*)ctx.v{}.u8), _mm_load_si128((__m128i*)ctx.v{}.u8)));", insn.operands[0], insn.operands[1], insn.operands[2]);
+        print("\t_mm_store_si128((__m128i*)ctx.v{}.u8, ", insn.operands[0]);
+
+        if (insn.operands[1] != insn.operands[2])
+            println("_mm_or_si128(_mm_load_si128((__m128i*)ctx.v{}.u8), _mm_load_si128((__m128i*)ctx.v{}.u8)));", insn.operands[1], insn.operands[2]);
+        else
+            println("_mm_load_si128((__m128i*)ctx.v{}.u8));", insn.operands[1]);
+
         break;
 
     case PPC_INST_VPERM:
@@ -1706,7 +1730,13 @@ bool Recompiler::Recompile(const Function& fn, uint32_t base, const ppc_insn& in
 
     case PPC_INST_VXOR:
     case PPC_INST_VXOR128:
-        println("\t_mm_store_si128((__m128i*)ctx.v{}.u8, _mm_xor_si128(_mm_load_si128((__m128i*)ctx.v{}.u8), _mm_load_si128((__m128i*)ctx.v{}.u8)));", insn.operands[0], insn.operands[1], insn.operands[2]);
+        print("\t_mm_store_si128((__m128i*)ctx.v{}.u8, ", insn.operands[0]);
+
+        if (insn.operands[1] != insn.operands[2])
+            println("_mm_xor_si128(_mm_load_si128((__m128i*)ctx.v{}.u8), _mm_load_si128((__m128i*)ctx.v{}.u8)));", insn.operands[1], insn.operands[2]);
+        else
+            println("_mm_setzero_si128());");
+
         break;
 
     case PPC_INST_XOR: