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XenonRecomp/thirdparty/capstone/arch/PowerPC/PPCGenRegisterInfo.inc
Sajid 0f9a53f75a Initial Commit
2024-09-07 18:15:29 +06:00

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/* Capstone Disassembly Engine, http://www.capstone-engine.org */
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
/* Rot127 <unisono@quyllur.org> 2022-2023 */
/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */
/* LLVM-commit: 464bda7750a3ba9e23823fc707d7e7b6fc38438d */
/* LLVM-tag: llvmorg-16.0.2-5-g464bda7750a3 */
/* Do not edit. */
/* Capstone's LLVM TableGen Backends: */
/* https://github.com/capstone-engine/llvm-capstone */
#ifdef GET_REGINFO_ENUM
#undef GET_REGINFO_ENUM
enum {
PPC_NoRegister,
PPC_BP = 1,
PPC_CARRY = 2,
PPC_CTR = 3,
PPC_FP = 4,
PPC_LR = 5,
PPC_RM = 6,
PPC_SPEFSCR = 7,
PPC_VRSAVE = 8,
PPC_XER = 9,
PPC_ZERO = 10,
PPC_ACC0 = 11,
PPC_ACC1 = 12,
PPC_ACC2 = 13,
PPC_ACC3 = 14,
PPC_ACC4 = 15,
PPC_ACC5 = 16,
PPC_ACC6 = 17,
PPC_ACC7 = 18,
PPC_BP8 = 19,
PPC_CR0 = 20,
PPC_CR1 = 21,
PPC_CR2 = 22,
PPC_CR3 = 23,
PPC_CR4 = 24,
PPC_CR5 = 25,
PPC_CR6 = 26,
PPC_CR7 = 27,
PPC_CTR8 = 28,
PPC_DMR0 = 29,
PPC_DMR1 = 30,
PPC_DMR2 = 31,
PPC_DMR3 = 32,
PPC_DMR4 = 33,
PPC_DMR5 = 34,
PPC_DMR6 = 35,
PPC_DMR7 = 36,
PPC_DMRROW0 = 37,
PPC_DMRROW1 = 38,
PPC_DMRROW2 = 39,
PPC_DMRROW3 = 40,
PPC_DMRROW4 = 41,
PPC_DMRROW5 = 42,
PPC_DMRROW6 = 43,
PPC_DMRROW7 = 44,
PPC_DMRROW8 = 45,
PPC_DMRROW9 = 46,
PPC_DMRROW10 = 47,
PPC_DMRROW11 = 48,
PPC_DMRROW12 = 49,
PPC_DMRROW13 = 50,
PPC_DMRROW14 = 51,
PPC_DMRROW15 = 52,
PPC_DMRROW16 = 53,
PPC_DMRROW17 = 54,
PPC_DMRROW18 = 55,
PPC_DMRROW19 = 56,
PPC_DMRROW20 = 57,
PPC_DMRROW21 = 58,
PPC_DMRROW22 = 59,
PPC_DMRROW23 = 60,
PPC_DMRROW24 = 61,
PPC_DMRROW25 = 62,
PPC_DMRROW26 = 63,
PPC_DMRROW27 = 64,
PPC_DMRROW28 = 65,
PPC_DMRROW29 = 66,
PPC_DMRROW30 = 67,
PPC_DMRROW31 = 68,
PPC_DMRROW32 = 69,
PPC_DMRROW33 = 70,
PPC_DMRROW34 = 71,
PPC_DMRROW35 = 72,
PPC_DMRROW36 = 73,
PPC_DMRROW37 = 74,
PPC_DMRROW38 = 75,
PPC_DMRROW39 = 76,
PPC_DMRROW40 = 77,
PPC_DMRROW41 = 78,
PPC_DMRROW42 = 79,
PPC_DMRROW43 = 80,
PPC_DMRROW44 = 81,
PPC_DMRROW45 = 82,
PPC_DMRROW46 = 83,
PPC_DMRROW47 = 84,
PPC_DMRROW48 = 85,
PPC_DMRROW49 = 86,
PPC_DMRROW50 = 87,
PPC_DMRROW51 = 88,
PPC_DMRROW52 = 89,
PPC_DMRROW53 = 90,
PPC_DMRROW54 = 91,
PPC_DMRROW55 = 92,
PPC_DMRROW56 = 93,
PPC_DMRROW57 = 94,
PPC_DMRROW58 = 95,
PPC_DMRROW59 = 96,
PPC_DMRROW60 = 97,
PPC_DMRROW61 = 98,
PPC_DMRROW62 = 99,
PPC_DMRROW63 = 100,
PPC_DMRROWp0 = 101,
PPC_DMRROWp1 = 102,
PPC_DMRROWp2 = 103,
PPC_DMRROWp3 = 104,
PPC_DMRROWp4 = 105,
PPC_DMRROWp5 = 106,
PPC_DMRROWp6 = 107,
PPC_DMRROWp7 = 108,
PPC_DMRROWp8 = 109,
PPC_DMRROWp9 = 110,
PPC_DMRROWp10 = 111,
PPC_DMRROWp11 = 112,
PPC_DMRROWp12 = 113,
PPC_DMRROWp13 = 114,
PPC_DMRROWp14 = 115,
PPC_DMRROWp15 = 116,
PPC_DMRROWp16 = 117,
PPC_DMRROWp17 = 118,
PPC_DMRROWp18 = 119,
PPC_DMRROWp19 = 120,
PPC_DMRROWp20 = 121,
PPC_DMRROWp21 = 122,
PPC_DMRROWp22 = 123,
PPC_DMRROWp23 = 124,
PPC_DMRROWp24 = 125,
PPC_DMRROWp25 = 126,
PPC_DMRROWp26 = 127,
PPC_DMRROWp27 = 128,
PPC_DMRROWp28 = 129,
PPC_DMRROWp29 = 130,
PPC_DMRROWp30 = 131,
PPC_DMRROWp31 = 132,
PPC_DMRp0 = 133,
PPC_DMRp1 = 134,
PPC_DMRp2 = 135,
PPC_DMRp3 = 136,
PPC_F0 = 137,
PPC_F1 = 138,
PPC_F2 = 139,
PPC_F3 = 140,
PPC_F4 = 141,
PPC_F5 = 142,
PPC_F6 = 143,
PPC_F7 = 144,
PPC_F8 = 145,
PPC_F9 = 146,
PPC_F10 = 147,
PPC_F11 = 148,
PPC_F12 = 149,
PPC_F13 = 150,
PPC_F14 = 151,
PPC_F15 = 152,
PPC_F16 = 153,
PPC_F17 = 154,
PPC_F18 = 155,
PPC_F19 = 156,
PPC_F20 = 157,
PPC_F21 = 158,
PPC_F22 = 159,
PPC_F23 = 160,
PPC_F24 = 161,
PPC_F25 = 162,
PPC_F26 = 163,
PPC_F27 = 164,
PPC_F28 = 165,
PPC_F29 = 166,
PPC_F30 = 167,
PPC_F31 = 168,
PPC_FP8 = 169,
PPC_LR8 = 170,
PPC_QF0 = 171,
PPC_QF1 = 172,
PPC_QF2 = 173,
PPC_QF3 = 174,
PPC_QF4 = 175,
PPC_QF5 = 176,
PPC_QF6 = 177,
PPC_QF7 = 178,
PPC_QF8 = 179,
PPC_QF9 = 180,
PPC_QF10 = 181,
PPC_QF11 = 182,
PPC_QF12 = 183,
PPC_QF13 = 184,
PPC_QF14 = 185,
PPC_QF15 = 186,
PPC_QF16 = 187,
PPC_QF17 = 188,
PPC_QF18 = 189,
PPC_QF19 = 190,
PPC_QF20 = 191,
PPC_QF21 = 192,
PPC_QF22 = 193,
PPC_QF23 = 194,
PPC_QF24 = 195,
PPC_QF25 = 196,
PPC_QF26 = 197,
PPC_QF27 = 198,
PPC_QF28 = 199,
PPC_QF29 = 200,
PPC_QF30 = 201,
PPC_QF31 = 202,
PPC_R0 = 203,
PPC_R1 = 204,
PPC_R2 = 205,
PPC_R3 = 206,
PPC_R4 = 207,
PPC_R5 = 208,
PPC_R6 = 209,
PPC_R7 = 210,
PPC_R8 = 211,
PPC_R9 = 212,
PPC_R10 = 213,
PPC_R11 = 214,
PPC_R12 = 215,
PPC_R13 = 216,
PPC_R14 = 217,
PPC_R15 = 218,
PPC_R16 = 219,
PPC_R17 = 220,
PPC_R18 = 221,
PPC_R19 = 222,
PPC_R20 = 223,
PPC_R21 = 224,
PPC_R22 = 225,
PPC_R23 = 226,
PPC_R24 = 227,
PPC_R25 = 228,
PPC_R26 = 229,
PPC_R27 = 230,
PPC_R28 = 231,
PPC_R29 = 232,
PPC_R30 = 233,
PPC_R31 = 234,
PPC_S0 = 235,
PPC_S1 = 236,
PPC_S2 = 237,
PPC_S3 = 238,
PPC_S4 = 239,
PPC_S5 = 240,
PPC_S6 = 241,
PPC_S7 = 242,
PPC_S8 = 243,
PPC_S9 = 244,
PPC_S10 = 245,
PPC_S11 = 246,
PPC_S12 = 247,
PPC_S13 = 248,
PPC_S14 = 249,
PPC_S15 = 250,
PPC_S16 = 251,
PPC_S17 = 252,
PPC_S18 = 253,
PPC_S19 = 254,
PPC_S20 = 255,
PPC_S21 = 256,
PPC_S22 = 257,
PPC_S23 = 258,
PPC_S24 = 259,
PPC_S25 = 260,
PPC_S26 = 261,
PPC_S27 = 262,
PPC_S28 = 263,
PPC_S29 = 264,
PPC_S30 = 265,
PPC_S31 = 266,
PPC_UACC0 = 267,
PPC_UACC1 = 268,
PPC_UACC2 = 269,
PPC_UACC3 = 270,
PPC_UACC4 = 271,
PPC_UACC5 = 272,
PPC_UACC6 = 273,
PPC_UACC7 = 274,
PPC_V0 = 275,
PPC_V1 = 276,
PPC_V2 = 277,
PPC_V3 = 278,
PPC_V4 = 279,
PPC_V5 = 280,
PPC_V6 = 281,
PPC_V7 = 282,
PPC_V8 = 283,
PPC_V9 = 284,
PPC_V10 = 285,
PPC_V11 = 286,
PPC_V12 = 287,
PPC_V13 = 288,
PPC_V14 = 289,
PPC_V15 = 290,
PPC_V16 = 291,
PPC_V17 = 292,
PPC_V18 = 293,
PPC_V19 = 294,
PPC_V20 = 295,
PPC_V21 = 296,
PPC_V22 = 297,
PPC_V23 = 298,
PPC_V24 = 299,
PPC_V25 = 300,
PPC_V26 = 301,
PPC_V27 = 302,
PPC_V28 = 303,
PPC_V29 = 304,
PPC_V30 = 305,
PPC_V31 = 306,
PPC_VF0 = 307,
PPC_VF1 = 308,
PPC_VF2 = 309,
PPC_VF3 = 310,
PPC_VF4 = 311,
PPC_VF5 = 312,
PPC_VF6 = 313,
PPC_VF7 = 314,
PPC_VF8 = 315,
PPC_VF9 = 316,
PPC_VF10 = 317,
PPC_VF11 = 318,
PPC_VF12 = 319,
PPC_VF13 = 320,
PPC_VF14 = 321,
PPC_VF15 = 322,
PPC_VF16 = 323,
PPC_VF17 = 324,
PPC_VF18 = 325,
PPC_VF19 = 326,
PPC_VF20 = 327,
PPC_VF21 = 328,
PPC_VF22 = 329,
PPC_VF23 = 330,
PPC_VF24 = 331,
PPC_VF25 = 332,
PPC_VF26 = 333,
PPC_VF27 = 334,
PPC_VF28 = 335,
PPC_VF29 = 336,
PPC_VF30 = 337,
PPC_VF31 = 338,
PPC_VSL0 = 339,
PPC_VSL1 = 340,
PPC_VSL2 = 341,
PPC_VSL3 = 342,
PPC_VSL4 = 343,
PPC_VSL5 = 344,
PPC_VSL6 = 345,
PPC_VSL7 = 346,
PPC_VSL8 = 347,
PPC_VSL9 = 348,
PPC_VSL10 = 349,
PPC_VSL11 = 350,
PPC_VSL12 = 351,
PPC_VSL13 = 352,
PPC_VSL14 = 353,
PPC_VSL15 = 354,
PPC_VSL16 = 355,
PPC_VSL17 = 356,
PPC_VSL18 = 357,
PPC_VSL19 = 358,
PPC_VSL20 = 359,
PPC_VSL21 = 360,
PPC_VSL22 = 361,
PPC_VSL23 = 362,
PPC_VSL24 = 363,
PPC_VSL25 = 364,
PPC_VSL26 = 365,
PPC_VSL27 = 366,
PPC_VSL28 = 367,
PPC_VSL29 = 368,
PPC_VSL30 = 369,
PPC_VSL31 = 370,
PPC_VSRp0 = 371,
PPC_VSRp1 = 372,
PPC_VSRp2 = 373,
PPC_VSRp3 = 374,
PPC_VSRp4 = 375,
PPC_VSRp5 = 376,
PPC_VSRp6 = 377,
PPC_VSRp7 = 378,
PPC_VSRp8 = 379,
PPC_VSRp9 = 380,
PPC_VSRp10 = 381,
PPC_VSRp11 = 382,
PPC_VSRp12 = 383,
PPC_VSRp13 = 384,
PPC_VSRp14 = 385,
PPC_VSRp15 = 386,
PPC_VSRp16 = 387,
PPC_VSRp17 = 388,
PPC_VSRp18 = 389,
PPC_VSRp19 = 390,
PPC_VSRp20 = 391,
PPC_VSRp21 = 392,
PPC_VSRp22 = 393,
PPC_VSRp23 = 394,
PPC_VSRp24 = 395,
PPC_VSRp25 = 396,
PPC_VSRp26 = 397,
PPC_VSRp27 = 398,
PPC_VSRp28 = 399,
PPC_VSRp29 = 400,
PPC_VSRp30 = 401,
PPC_VSRp31 = 402,
PPC_VSX32 = 403,
PPC_VSX33 = 404,
PPC_VSX34 = 405,
PPC_VSX35 = 406,
PPC_VSX36 = 407,
PPC_VSX37 = 408,
PPC_VSX38 = 409,
PPC_VSX39 = 410,
PPC_VSX40 = 411,
PPC_VSX41 = 412,
PPC_VSX42 = 413,
PPC_VSX43 = 414,
PPC_VSX44 = 415,
PPC_VSX45 = 416,
PPC_VSX46 = 417,
PPC_VSX47 = 418,
PPC_VSX48 = 419,
PPC_VSX49 = 420,
PPC_VSX50 = 421,
PPC_VSX51 = 422,
PPC_VSX52 = 423,
PPC_VSX53 = 424,
PPC_VSX54 = 425,
PPC_VSX55 = 426,
PPC_VSX56 = 427,
PPC_VSX57 = 428,
PPC_VSX58 = 429,
PPC_VSX59 = 430,
PPC_VSX60 = 431,
PPC_VSX61 = 432,
PPC_VSX62 = 433,
PPC_VSX63 = 434,
PPC_WACC0 = 435,
PPC_WACC1 = 436,
PPC_WACC2 = 437,
PPC_WACC3 = 438,
PPC_WACC4 = 439,
PPC_WACC5 = 440,
PPC_WACC6 = 441,
PPC_WACC7 = 442,
PPC_WACC_HI0 = 443,
PPC_WACC_HI1 = 444,
PPC_WACC_HI2 = 445,
PPC_WACC_HI3 = 446,
PPC_WACC_HI4 = 447,
PPC_WACC_HI5 = 448,
PPC_WACC_HI6 = 449,
PPC_WACC_HI7 = 450,
PPC_X0 = 451,
PPC_X1 = 452,
PPC_X2 = 453,
PPC_X3 = 454,
PPC_X4 = 455,
PPC_X5 = 456,
PPC_X6 = 457,
PPC_X7 = 458,
PPC_X8 = 459,
PPC_X9 = 460,
PPC_X10 = 461,
PPC_X11 = 462,
PPC_X12 = 463,
PPC_X13 = 464,
PPC_X14 = 465,
PPC_X15 = 466,
PPC_X16 = 467,
PPC_X17 = 468,
PPC_X18 = 469,
PPC_X19 = 470,
PPC_X20 = 471,
PPC_X21 = 472,
PPC_X22 = 473,
PPC_X23 = 474,
PPC_X24 = 475,
PPC_X25 = 476,
PPC_X26 = 477,
PPC_X27 = 478,
PPC_X28 = 479,
PPC_X29 = 480,
PPC_X30 = 481,
PPC_X31 = 482,
PPC_ZERO8 = 483,
PPC_CR0EQ = 484,
PPC_CR1EQ = 485,
PPC_CR2EQ = 486,
PPC_CR3EQ = 487,
PPC_CR4EQ = 488,
PPC_CR5EQ = 489,
PPC_CR6EQ = 490,
PPC_CR7EQ = 491,
PPC_CR0GT = 492,
PPC_CR1GT = 493,
PPC_CR2GT = 494,
PPC_CR3GT = 495,
PPC_CR4GT = 496,
PPC_CR5GT = 497,
PPC_CR6GT = 498,
PPC_CR7GT = 499,
PPC_CR0LT = 500,
PPC_CR1LT = 501,
PPC_CR2LT = 502,
PPC_CR3LT = 503,
PPC_CR4LT = 504,
PPC_CR5LT = 505,
PPC_CR6LT = 506,
PPC_CR7LT = 507,
PPC_CR0UN = 508,
PPC_CR1UN = 509,
PPC_CR2UN = 510,
PPC_CR3UN = 511,
PPC_CR4UN = 512,
PPC_CR5UN = 513,
PPC_CR6UN = 514,
PPC_CR7UN = 515,
PPC_G8p0 = 516,
PPC_G8p1 = 517,
PPC_G8p2 = 518,
PPC_G8p3 = 519,
PPC_G8p4 = 520,
PPC_G8p5 = 521,
PPC_G8p6 = 522,
PPC_G8p7 = 523,
PPC_G8p8 = 524,
PPC_G8p9 = 525,
PPC_G8p10 = 526,
PPC_G8p11 = 527,
PPC_G8p12 = 528,
PPC_G8p13 = 529,
PPC_G8p14 = 530,
PPC_G8p15 = 531,
NUM_TARGET_REGS // 532
};
// Register classes
enum {
PPC_VSSRCRegClassID = 0,
PPC_GPRCRegClassID = 1,
PPC_GPRC_NOR0RegClassID = 2,
PPC_GPRC_and_GPRC_NOR0RegClassID = 3,
PPC_CRBITRCRegClassID = 4,
PPC_F4RCRegClassID = 5,
PPC_CRRCRegClassID = 6,
PPC_CARRYRCRegClassID = 7,
PPC_CTRRCRegClassID = 8,
PPC_LRRCRegClassID = 9,
PPC_VRSAVERCRegClassID = 10,
PPC_SPILLTOVSRRCRegClassID = 11,
PPC_VSFRCRegClassID = 12,
PPC_G8RCRegClassID = 13,
PPC_G8RC_NOX0RegClassID = 14,
PPC_SPILLTOVSRRC_and_VSFRCRegClassID = 15,
PPC_G8RC_and_G8RC_NOX0RegClassID = 16,
PPC_F8RCRegClassID = 17,
PPC_SPERCRegClassID = 18,
PPC_VFRCRegClassID = 19,
PPC_SPERC_with_sub_32_in_GPRC_NOR0RegClassID = 20,
PPC_SPILLTOVSRRC_and_VFRCRegClassID = 21,
PPC_SPILLTOVSRRC_and_F4RCRegClassID = 22,
PPC_CTRRC8RegClassID = 23,
PPC_LR8RCRegClassID = 24,
PPC_DMRROWRCRegClassID = 25,
PPC_VSRCRegClassID = 26,
PPC_VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID = 27,
PPC_QSRCRegClassID = 28,
PPC_VRRCRegClassID = 29,
PPC_VSLRCRegClassID = 30,
PPC_VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID = 31,
PPC_G8pRCRegClassID = 32,
PPC_G8pRC_with_sub_32_in_GPRC_NOR0RegClassID = 33,
PPC_QSRC_with_sub_64_in_SPILLTOVSRRCRegClassID = 34,
PPC_VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID = 35,
PPC_DMRROWpRCRegClassID = 36,
PPC_VSRpRCRegClassID = 37,
PPC_VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID = 38,
PPC_VSRpRC_with_sub_64_in_F4RCRegClassID = 39,
PPC_VSRpRC_with_sub_64_in_VFRCRegClassID = 40,
PPC_VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID = 41,
PPC_VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID = 42,
PPC_QBRCRegClassID = 43,
PPC_QFRCRegClassID = 44,
PPC_QBRC_with_sub_64_in_SPILLTOVSRRCRegClassID = 45,
PPC_ACCRCRegClassID = 46,
PPC_UACCRCRegClassID = 47,
PPC_WACCRCRegClassID = 48,
PPC_WACC_HIRCRegClassID = 49,
PPC_ACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID = 50,
PPC_UACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID = 51,
PPC_ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID = 52,
PPC_UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID = 53,
PPC_DMRRCRegClassID = 54,
PPC_DMRpRCRegClassID = 55,
};
// Subregister indices
enum {
PPC_NoSubRegister,
PPC_sub_32, // 1
PPC_sub_64, // 2
PPC_sub_dmr0, // 3
PPC_sub_dmr1, // 4
PPC_sub_dmrrow0, // 5
PPC_sub_dmrrow1, // 6
PPC_sub_dmrrowp0, // 7
PPC_sub_dmrrowp1, // 8
PPC_sub_eq, // 9
PPC_sub_gp8_x0, // 10
PPC_sub_gp8_x1, // 11
PPC_sub_gt, // 12
PPC_sub_lt, // 13
PPC_sub_pair0, // 14
PPC_sub_pair1, // 15
PPC_sub_un, // 16
PPC_sub_vsx0, // 17
PPC_sub_vsx1, // 18
PPC_sub_wacc_hi, // 19
PPC_sub_wacc_lo, // 20
PPC_sub_vsx1_then_sub_64, // 21
PPC_sub_pair1_then_sub_64, // 22
PPC_sub_pair1_then_sub_vsx0, // 23
PPC_sub_pair1_then_sub_vsx1, // 24
PPC_sub_pair1_then_sub_vsx1_then_sub_64, // 25
PPC_sub_dmrrowp1_then_sub_dmrrow0, // 26
PPC_sub_dmrrowp1_then_sub_dmrrow1, // 27
PPC_sub_wacc_hi_then_sub_dmrrow0, // 28
PPC_sub_wacc_hi_then_sub_dmrrow1, // 29
PPC_sub_wacc_hi_then_sub_dmrrowp0, // 30
PPC_sub_wacc_hi_then_sub_dmrrowp1, // 31
PPC_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, // 32
PPC_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, // 33
PPC_sub_dmr1_then_sub_dmrrow0, // 34
PPC_sub_dmr1_then_sub_dmrrow1, // 35
PPC_sub_dmr1_then_sub_dmrrowp0, // 36
PPC_sub_dmr1_then_sub_dmrrowp1, // 37
PPC_sub_dmr1_then_sub_wacc_hi, // 38
PPC_sub_dmr1_then_sub_wacc_lo, // 39
PPC_sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0, // 40
PPC_sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1, // 41
PPC_sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0, // 42
PPC_sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1, // 43
PPC_sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0, // 44
PPC_sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1, // 45
PPC_sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, // 46
PPC_sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, // 47
PPC_sub_gp8_x1_then_sub_32, // 48
PPC_NUM_TARGET_SUBREGS
};
#endif // GET_REGINFO_ENUM
#ifdef GET_REGINFO_MC_DESC
#undef GET_REGINFO_MC_DESC
static const MCPhysReg PPCRegDiffLists[] = {
/* 0 */ 0, 0,
/* 2 */ 74, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0,
/* 19 */ 90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0,
/* 36 */ 106, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0,
/* 53 */ 122, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0,
/* 70 */ -158, 1, 1, 1, 1, 1, 1, 1, 0,
/* 79 */ -3466, 1, 1, 1, 0,
/* 84 */ -3406, 1, 1, 1, 0,
/* 89 */ -1059, 1, 1, 1, 0,
/* 94 */ -39, 1, 1, 1, 0,
/* 99 */ -35, 1, 1, 1, 0,
/* 104 */ -893, 1, 0,
/* 107 */ -733, 1, 0,
/* 110 */ -603, 1, 0,
/* 113 */ -128, 1, 0,
/* 116 */ -64, 1, 0,
/* 119 */ -334, -64, 1, 64, -63, 1, 0,
/* 126 */ -62, 1, 0,
/* 129 */ 406, -334, -64, 1, 64, -63, 1, 403, -340, -62, 1, 62, -61, 1, 0,
/* 144 */ -60, 1, 0,
/* 147 */ -331, -60, 1, 60, -59, 1, 0,
/* 154 */ -58, 1, 0,
/* 157 */ -104, 406, -334, -64, 1, 64, -63, 1, 403, -340, -62, 1, 62, -61, 1, -14, 406, -331, -60, 1, 60, -59, 1, 396, -337, -58, 1, 58, -57, 1, 0,
/* 188 */ -56, 1, 0,
/* 191 */ -328, -56, 1, 56, -55, 1, 0,
/* 198 */ -54, 1, 0,
/* 201 */ 406, -328, -56, 1, 56, -55, 1, 389, -334, -54, 1, 54, -53, 1, 0,
/* 216 */ -52, 1, 0,
/* 219 */ -325, -52, 1, 52, -51, 1, 0,
/* 226 */ -50, 1, 0,
/* 229 */ -103, 406, -328, -56, 1, 56, -55, 1, 389, -334, -54, 1, 54, -53, 1, -28, 406, -325, -52, 1, 52, -51, 1, 382, -331, -50, 1, 50, -49, 1, 0,
/* 260 */ -48, 1, 0,
/* 263 */ -322, -48, 1, 48, -47, 1, 0,
/* 270 */ -46, 1, 0,
/* 273 */ 406, -322, -48, 1, 48, -47, 1, 375, -328, -46, 1, 46, -45, 1, 0,
/* 288 */ -44, 1, 0,
/* 291 */ -319, -44, 1, 44, -43, 1, 0,
/* 298 */ -42, 1, 0,
/* 301 */ -102, 406, -322, -48, 1, 48, -47, 1, 375, -328, -46, 1, 46, -45, 1, -42, 406, -319, -44, 1, 44, -43, 1, 368, -325, -42, 1, 42, -41, 1, 0,
/* 332 */ -40, 1, 0,
/* 335 */ -316, -40, 1, 40, -39, 1, 0,
/* 342 */ -38, 1, 0,
/* 345 */ 406, -316, -40, 1, 40, -39, 1, 361, -322, -38, 1, 38, -37, 1, 0,
/* 360 */ -36, 1, 0,
/* 363 */ -313, -36, 1, 36, -35, 1, 0,
/* 370 */ -34, 1, 0,
/* 373 */ -101, 406, -316, -40, 1, 40, -39, 1, 361, -322, -38, 1, 38, -37, 1, -56, 406, -313, -36, 1, 36, -35, 1, 354, -319, -34, 1, 34, -33, 1, 0,
/* 404 */ 3, 0,
/* 406 */ 8, 0,
/* 408 */ 18, 0,
/* 410 */ 480, -8, -8, 24, 0,
/* 415 */ -112, 32, -31, 32, 0,
/* 420 */ -111, 32, -31, 32, 0,
/* 425 */ -110, 32, -31, 32, 0,
/* 430 */ -109, 32, -31, 32, 0,
/* 435 */ -108, 32, -31, 32, 0,
/* 440 */ -107, 32, -31, 32, 0,
/* 445 */ -106, 32, -31, 32, 0,
/* 450 */ -105, 32, -31, 32, 0,
/* 455 */ -104, 32, -31, 32, 0,
/* 460 */ -103, 32, -31, 32, 0,
/* 465 */ -102, 32, -31, 32, 0,
/* 470 */ -101, 32, -31, 32, 0,
/* 475 */ -100, 32, -31, 32, 0,
/* 480 */ -99, 32, -31, 32, 0,
/* 485 */ -98, 32, -31, 32, 0,
/* 490 */ -97, 32, -31, 32, 0,
/* 495 */ 37, 0,
/* 497 */ 32, 216, 49, 0,
/* 501 */ 32, 216, 50, 0,
/* 505 */ 32, 216, 51, 0,
/* 509 */ 32, 216, 52, 0,
/* 513 */ 32, 216, 53, 0,
/* 517 */ 32, 216, 54, 0,
/* 521 */ 32, 216, 55, 0,
/* 525 */ 32, 216, 56, 0,
/* 529 */ 32, 216, 57, 0,
/* 533 */ 32, 216, 58, 0,
/* 537 */ 32, 216, 59, 0,
/* 541 */ 32, 216, 60, 0,
/* 545 */ 32, 216, 61, 0,
/* 549 */ 32, 216, 62, 0,
/* 553 */ 32, 216, 63, 0,
/* 557 */ 32, 216, 64, 0,
/* 561 */ 32, 216, 65, 0,
/* 565 */ 202, 16, -368, 184, 72, 0,
/* 571 */ 202, 17, -368, 183, 73, 0,
/* 577 */ 202, 17, -367, 182, 74, 0,
/* 583 */ 202, 18, -367, 181, 75, 0,
/* 589 */ 202, 19, -367, 180, 76, 0,
/* 595 */ 202, 19, -366, 179, 77, 0,
/* 601 */ 202, 20, -366, 178, 78, 0,
/* 607 */ 202, 21, -366, 177, 79, 0,
/* 613 */ 202, 21, -365, 176, 80, 0,
/* 619 */ 202, 22, -365, 175, 81, 0,
/* 625 */ 202, 23, -365, 174, 82, 0,
/* 631 */ 202, 23, -364, 173, 83, 0,
/* 637 */ 202, 24, -364, 172, 84, 0,
/* 643 */ 202, 25, -364, 171, 85, 0,
/* 649 */ 202, 25, -363, 170, 86, 0,
/* 655 */ 202, 26, -363, 169, 87, 0,
/* 661 */ 202, 27, -363, 168, 88, 0,
/* 667 */ 202, 27, -362, 167, 89, 0,
/* 673 */ 202, 28, -362, 166, 90, 0,
/* 679 */ 202, 29, -362, 165, 91, 0,
/* 685 */ 202, 29, -361, 164, 92, 0,
/* 691 */ 202, 30, -361, 163, 93, 0,
/* 697 */ 202, 31, -361, 162, 94, 0,
/* 703 */ 202, 31, -360, 161, 95, 0,
/* 709 */ 202, 32, -360, 160, 96, 0,
/* 715 */ -32, 96, 0,
/* 718 */ -32, 97, 0,
/* 721 */ -32, 98, 0,
/* 724 */ -32, 99, 0,
/* 727 */ 32, 318, -414, 100, 0,
/* 732 */ 33, 318, -414, 100, 0,
/* 737 */ 33, 319, -414, 100, 0,
/* 742 */ 34, 319, -414, 100, 0,
/* 747 */ 34, 312, -406, 100, 0,
/* 752 */ 35, 312, -406, 100, 0,
/* 757 */ 35, 313, -406, 100, 0,
/* 762 */ 36, 313, -406, 100, 0,
/* 767 */ -32, 100, 0,
/* 770 */ 36, 321, -414, 101, 0,
/* 775 */ 37, 321, -414, 101, 0,
/* 780 */ 37, 322, -414, 101, 0,
/* 785 */ 38, 322, -414, 101, 0,
/* 790 */ 40, 324, -414, 101, 0,
/* 795 */ 41, 324, -414, 101, 0,
/* 800 */ 41, 325, -414, 101, 0,
/* 805 */ 42, 325, -414, 101, 0,
/* 810 */ 38, 315, -406, 101, 0,
/* 815 */ 39, 315, -406, 101, 0,
/* 820 */ 39, 316, -406, 101, 0,
/* 825 */ 40, 316, -406, 101, 0,
/* 830 */ 42, 318, -406, 101, 0,
/* 835 */ 43, 318, -406, 101, 0,
/* 840 */ 43, 319, -406, 101, 0,
/* 845 */ 44, 319, -406, 101, 0,
/* 850 */ -32, 101, 0,
/* 853 */ 44, 327, -414, 102, 0,
/* 858 */ 45, 327, -414, 102, 0,
/* 863 */ 45, 328, -414, 102, 0,
/* 868 */ 46, 328, -414, 102, 0,
/* 873 */ 48, 330, -414, 102, 0,
/* 878 */ 49, 330, -414, 102, 0,
/* 883 */ 49, 331, -414, 102, 0,
/* 888 */ 50, 331, -414, 102, 0,
/* 893 */ 46, 321, -406, 102, 0,
/* 898 */ 47, 321, -406, 102, 0,
/* 903 */ 47, 322, -406, 102, 0,
/* 908 */ 48, 322, -406, 102, 0,
/* 913 */ 50, 324, -406, 102, 0,
/* 918 */ 51, 324, -406, 102, 0,
/* 923 */ 51, 325, -406, 102, 0,
/* 928 */ 52, 325, -406, 102, 0,
/* 933 */ -32, 102, 0,
/* 936 */ 52, 333, -414, 103, 0,
/* 941 */ 53, 333, -414, 103, 0,
/* 946 */ 53, 334, -414, 103, 0,
/* 951 */ 54, 334, -414, 103, 0,
/* 956 */ 56, 336, -414, 103, 0,
/* 961 */ 57, 336, -414, 103, 0,
/* 966 */ 57, 337, -414, 103, 0,
/* 971 */ 58, 337, -414, 103, 0,
/* 976 */ 54, 327, -406, 103, 0,
/* 981 */ 55, 327, -406, 103, 0,
/* 986 */ 55, 328, -406, 103, 0,
/* 991 */ 56, 328, -406, 103, 0,
/* 996 */ 58, 330, -406, 103, 0,
/* 1001 */ 59, 330, -406, 103, 0,
/* 1006 */ 59, 331, -406, 103, 0,
/* 1011 */ 60, 331, -406, 103, 0,
/* 1016 */ -32, 103, 0,
/* 1019 */ 60, 339, -414, 104, 0,
/* 1024 */ 61, 339, -414, 104, 0,
/* 1029 */ 61, 340, -414, 104, 0,
/* 1034 */ 62, 340, -414, 104, 0,
/* 1039 */ 62, 333, -406, 104, 0,
/* 1044 */ 63, 333, -406, 104, 0,
/* 1049 */ 63, 334, -406, 104, 0,
/* 1054 */ 64, 334, -406, 104, 0,
/* 1059 */ -32, 104, 0,
/* 1062 */ -32, 105, 0,
/* 1065 */ -32, 106, 0,
/* 1068 */ -32, 107, 0,
/* 1071 */ -32, 108, 0,
/* 1074 */ -32, 109, 0,
/* 1077 */ -32, 110, 0,
/* 1080 */ -32, 111, 0,
/* 1083 */ -32, 112, 0,
/* 1086 */ 138, 0,
/* 1088 */ 165, 0,
/* 1090 */ 16, -368, 256, 0,
/* 1094 */ 17, -368, 256, 0,
/* 1098 */ 17, -367, 256, 0,
/* 1102 */ 18, -367, 256, 0,
/* 1106 */ 19, -367, 256, 0,
/* 1110 */ 19, -366, 256, 0,
/* 1114 */ 20, -366, 256, 0,
/* 1118 */ 21, -366, 256, 0,
/* 1122 */ 21, -365, 256, 0,
/* 1126 */ 22, -365, 256, 0,
/* 1130 */ 23, -365, 256, 0,
/* 1134 */ 23, -364, 256, 0,
/* 1138 */ 24, -364, 256, 0,
/* 1142 */ 25, -364, 256, 0,
/* 1146 */ 25, -363, 256, 0,
/* 1150 */ 26, -363, 256, 0,
/* 1154 */ 27, -363, 256, 0,
/* 1158 */ 27, -362, 256, 0,
/* 1162 */ 28, -362, 256, 0,
/* 1166 */ 29, -362, 256, 0,
/* 1170 */ 29, -361, 256, 0,
/* 1174 */ 30, -361, 256, 0,
/* 1178 */ 31, -361, 256, 0,
/* 1182 */ 31, -360, 256, 0,
/* 1186 */ 32, -360, 256, 0,
/* 1190 */ 473, 0,
/* 1192 */ -1988, 0,
/* 1194 */ -1959, 0,
/* 1196 */ -1926, 0,
/* 1198 */ -1893, 0,
/* 1200 */ -488, 0,
/* 1202 */ -480, 0,
/* 1204 */ -473, 0,
/* 1206 */ -472, 0,
/* 1208 */ -464, 0,
/* 1210 */ -330, 0,
/* 1212 */ -312, 0,
/* 1214 */ -65, -248, 249, -248, 0,
/* 1219 */ -64, -248, 249, -248, 0,
/* 1224 */ -63, -248, 249, -248, 0,
/* 1229 */ -62, -248, 249, -248, 0,
/* 1234 */ -61, -248, 249, -248, 0,
/* 1239 */ -60, -248, 249, -248, 0,
/* 1244 */ -59, -248, 249, -248, 0,
/* 1249 */ -58, -248, 249, -248, 0,
/* 1254 */ -57, -248, 249, -248, 0,
/* 1259 */ -56, -248, 249, -248, 0,
/* 1264 */ -55, -248, 249, -248, 0,
/* 1269 */ -54, -248, 249, -248, 0,
/* 1274 */ -53, -248, 249, -248, 0,
/* 1279 */ -52, -248, 249, -248, 0,
/* 1284 */ -51, -248, 249, -248, 0,
/* 1289 */ -50, -248, 249, -248, 0,
/* 1294 */ -32, -202, 203, -202, 0,
/* 1299 */ 104, -32, -202, 203, -202, 234, -31, -202, 203, -202, 0,
/* 1310 */ 360, -32, -202, 203, -202, 234, -31, -202, 203, -202, 0,
/* 1321 */ -30, -202, 203, -202, 0,
/* 1326 */ 105, -30, -202, 203, -202, 232, -29, -202, 203, -202, 0,
/* 1337 */ 361, -30, -202, 203, -202, 232, -29, -202, 203, -202, 0,
/* 1348 */ -28, -202, 203, -202, 0,
/* 1353 */ 106, -28, -202, 203, -202, 230, -27, -202, 203, -202, 0,
/* 1364 */ 362, -28, -202, 203, -202, 230, -27, -202, 203, -202, 0,
/* 1375 */ -26, -202, 203, -202, 0,
/* 1380 */ 107, -26, -202, 203, -202, 228, -25, -202, 203, -202, 0,
/* 1391 */ 363, -26, -202, 203, -202, 228, -25, -202, 203, -202, 0,
/* 1402 */ -24, -202, 203, -202, 0,
/* 1407 */ 108, -24, -202, 203, -202, 226, -23, -202, 203, -202, 0,
/* 1418 */ 364, -24, -202, 203, -202, 226, -23, -202, 203, -202, 0,
/* 1429 */ -22, -202, 203, -202, 0,
/* 1434 */ 109, -22, -202, 203, -202, 224, -21, -202, 203, -202, 0,
/* 1445 */ 365, -22, -202, 203, -202, 224, -21, -202, 203, -202, 0,
/* 1456 */ -20, -202, 203, -202, 0,
/* 1461 */ 110, -20, -202, 203, -202, 222, -19, -202, 203, -202, 0,
/* 1472 */ 366, -20, -202, 203, -202, 222, -19, -202, 203, -202, 0,
/* 1483 */ -18, -202, 203, -202, 0,
/* 1488 */ 111, -18, -202, 203, -202, 220, -17, -202, 203, -202, 0,
/* 1499 */ 367, -18, -202, 203, -202, 220, -17, -202, 203, -202, 0,
/* 1510 */ -200, 0,
/* 1512 */ -165, 0,
/* 1514 */ -162, 0,
/* 1516 */ -136, 0,
/* 1518 */ -128, 0,
/* 1520 */ -104, 0,
/* 1522 */ -96, 0,
/* 1524 */ -64, 0,
/* 1526 */ -62, 0,
/* 1528 */ -34, 0,
/* 1530 */ -32, 0,
/* 1532 */ -18, 0,
/* 1534 */ -1, 0,
};
static const uint16_t PPCSubRegIdxLists[] = {
/* 0 */ 1, 0,
/* 2 */ 2, 0,
/* 4 */ 5, 6, 0,
/* 7 */ 13, 12, 9, 16, 0,
/* 12 */ 17, 2, 18, 21, 0,
/* 17 */ 14, 17, 2, 18, 21, 15, 23, 22, 24, 25, 0,
/* 28 */ 7, 5, 6, 8, 26, 27, 0,
/* 35 */ 20, 7, 5, 6, 8, 26, 27, 19, 30, 28, 29, 31, 32, 33, 0,
/* 50 */ 3, 20, 7, 5, 6, 8, 26, 27, 19, 30, 28, 29, 31, 32, 33, 4, 39, 36, 34, 35, 37, 40, 41, 38, 44, 42, 43, 45, 46, 47, 0,
/* 81 */ 10, 1, 11, 48, 0,
};
static const MCRegisterDesc PPCRegDesc[] = { // Descriptors
{ 4, 0, 0, 0, 0, 0 },
{ 2645, 1, 408, 1, 24545, 0 },
{ 2814, 1, 1, 1, 24545, 0 },
{ 2714, 1, 1, 1, 24545, 0 },
{ 2648, 1, 1088, 1, 24545, 0 },
{ 2711, 1, 1, 1, 24545, 0 },
{ 2589, 1, 1, 1, 24545, 0 },
{ 2699, 1, 1, 1, 24545, 0 },
{ 2582, 1, 1, 1, 24545, 0 },
{ 2707, 1, 1, 1, 24423, 0 },
{ 2640, 1, 1190, 1, 24423, 0 },
{ 226, 1310, 1, 17, 1588, 17 },
{ 537, 1337, 1, 17, 1588, 17 },
{ 805, 1364, 1, 17, 1588, 17 },
{ 1073, 1391, 1, 17, 1588, 17 },
{ 1326, 1418, 1, 17, 1588, 17 },
{ 1573, 1445, 1, 17, 1588, 17 },
{ 1814, 1472, 1, 17, 1588, 17 },
{ 2055, 1499, 1, 17, 1588, 17 },
{ 2314, 1532, 1, 0, 0, 2 },
{ 259, 410, 1, 7, 1508, 9 },
{ 570, 410, 1, 7, 1508, 9 },
{ 838, 410, 1, 7, 1508, 9 },
{ 1106, 410, 1, 7, 1508, 9 },
{ 1359, 410, 1, 7, 1508, 9 },
{ 1606, 410, 1, 7, 1508, 9 },
{ 1847, 410, 1, 7, 1508, 9 },
{ 2088, 410, 1, 7, 1508, 9 },
{ 2326, 1, 1, 1, 9200, 0 },
{ 263, 129, 1022, 35, 1128, 27 },
{ 574, 173, 939, 35, 1128, 27 },
{ 842, 201, 939, 35, 1128, 27 },
{ 1110, 245, 856, 35, 1128, 27 },
{ 1363, 273, 856, 35, 1128, 27 },
{ 1610, 317, 773, 35, 1128, 27 },
{ 1851, 345, 773, 35, 1128, 27 },
{ 2092, 389, 730, 35, 1128, 27 },
{ 274, 1, 1054, 1, 7921, 0 },
{ 585, 1, 1049, 1, 7921, 0 },
{ 853, 1, 1044, 1, 7921, 0 },
{ 1121, 1, 1039, 1, 7921, 0 },
{ 1374, 1, 1034, 1, 7921, 0 },
{ 1621, 1, 1029, 1, 7921, 0 },
{ 1862, 1, 1024, 1, 7921, 0 },
{ 2103, 1, 1019, 1, 7921, 0 },
{ 2337, 1, 1011, 1, 7921, 0 },
{ 2551, 1, 1006, 1, 7921, 0 },
{ 28, 1, 1001, 1, 7921, 0 },
{ 339, 1, 996, 1, 7921, 0 },
{ 650, 1, 971, 1, 7921, 0 },
{ 918, 1, 966, 1, 7921, 0 },
{ 1186, 1, 961, 1, 7921, 0 },
{ 1433, 1, 956, 1, 7921, 0 },
{ 1680, 1, 991, 1, 7921, 0 },
{ 1921, 1, 986, 1, 7921, 0 },
{ 2162, 1, 981, 1, 7921, 0 },
{ 2396, 1, 976, 1, 7921, 0 },
{ 92, 1, 951, 1, 7921, 0 },
{ 403, 1, 946, 1, 7921, 0 },
{ 714, 1, 941, 1, 7921, 0 },
{ 982, 1, 936, 1, 7921, 0 },
{ 1250, 1, 928, 1, 7921, 0 },
{ 1497, 1, 923, 1, 7921, 0 },
{ 1738, 1, 918, 1, 7921, 0 },
{ 1979, 1, 913, 1, 7921, 0 },
{ 2220, 1, 888, 1, 7921, 0 },
{ 2454, 1, 883, 1, 7921, 0 },
{ 150, 1, 878, 1, 7921, 0 },
{ 461, 1, 873, 1, 7921, 0 },
{ 744, 1, 908, 1, 7921, 0 },
{ 1012, 1, 903, 1, 7921, 0 },
{ 1280, 1, 898, 1, 7921, 0 },
{ 1527, 1, 893, 1, 7921, 0 },
{ 1768, 1, 868, 1, 7921, 0 },
{ 2009, 1, 863, 1, 7921, 0 },
{ 2250, 1, 858, 1, 7921, 0 },
{ 2484, 1, 853, 1, 7921, 0 },
{ 180, 1, 845, 1, 7921, 0 },
{ 491, 1, 840, 1, 7921, 0 },
{ 759, 1, 835, 1, 7921, 0 },
{ 1027, 1, 830, 1, 7921, 0 },
{ 1295, 1, 805, 1, 7921, 0 },
{ 1542, 1, 800, 1, 7921, 0 },
{ 1783, 1, 795, 1, 7921, 0 },
{ 2024, 1, 790, 1, 7921, 0 },
{ 2265, 1, 825, 1, 7921, 0 },
{ 2499, 1, 820, 1, 7921, 0 },
{ 195, 1, 815, 1, 7921, 0 },
{ 506, 1, 810, 1, 7921, 0 },
{ 774, 1, 785, 1, 7921, 0 },
{ 1042, 1, 780, 1, 7921, 0 },
{ 1310, 1, 775, 1, 7921, 0 },
{ 1557, 1, 770, 1, 7921, 0 },
{ 1798, 1, 762, 1, 7921, 0 },
{ 2039, 1, 757, 1, 7921, 0 },
{ 2280, 1, 752, 1, 7921, 0 },
{ 2514, 1, 747, 1, 7921, 0 },
{ 210, 1, 742, 1, 7921, 0 },
{ 521, 1, 737, 1, 7921, 0 },
{ 789, 1, 732, 1, 7921, 0 },
{ 1057, 1, 727, 1, 7921, 0 },
{ 302, 116, 1050, 4, 1810, 6 },
{ 613, 123, 1040, 4, 1810, 6 },
{ 881, 126, 1030, 4, 1810, 6 },
{ 1149, 141, 1020, 4, 1810, 6 },
{ 1396, 144, 1007, 4, 1810, 6 },
{ 1643, 151, 997, 4, 1810, 6 },
{ 1884, 154, 967, 4, 1810, 6 },
{ 2125, 185, 957, 4, 1810, 6 },
{ 2359, 188, 987, 4, 1810, 6 },
{ 2573, 195, 977, 4, 1810, 6 },
{ 54, 198, 947, 4, 1810, 6 },
{ 365, 213, 937, 4, 1810, 6 },
{ 676, 216, 924, 4, 1810, 6 },
{ 944, 223, 914, 4, 1810, 6 },
{ 1212, 226, 884, 4, 1810, 6 },
{ 1459, 257, 874, 4, 1810, 6 },
{ 1700, 260, 904, 4, 1810, 6 },
{ 1941, 267, 894, 4, 1810, 6 },
{ 2182, 270, 864, 4, 1810, 6 },
{ 2416, 285, 854, 4, 1810, 6 },
{ 112, 288, 841, 4, 1810, 6 },
{ 423, 295, 831, 4, 1810, 6 },
{ 734, 298, 801, 4, 1810, 6 },
{ 1002, 329, 791, 4, 1810, 6 },
{ 1270, 332, 821, 4, 1810, 6 },
{ 1517, 339, 811, 4, 1810, 6 },
{ 1758, 342, 781, 4, 1810, 6 },
{ 1999, 357, 771, 4, 1810, 6 },
{ 2240, 360, 758, 4, 1810, 6 },
{ 2474, 367, 748, 4, 1810, 6 },
{ 170, 370, 738, 4, 1810, 6 },
{ 481, 401, 728, 4, 1810, 6 },
{ 290, 157, 1, 50, 32, 36 },
{ 601, 229, 1, 50, 304, 36 },
{ 869, 301, 1, 50, 576, 36 },
{ 1137, 373, 1, 50, 848, 36 },
{ 238, 1, 709, 1, 24289, 0 },
{ 549, 1, 703, 1, 24289, 0 },
{ 817, 1, 697, 1, 24289, 0 },
{ 1085, 1, 691, 1, 24289, 0 },
{ 1338, 1, 691, 1, 24289, 0 },
{ 1585, 1, 685, 1, 24289, 0 },
{ 1826, 1, 679, 1, 24289, 0 },
{ 2067, 1, 673, 1, 24289, 0 },
{ 2296, 1, 673, 1, 24289, 0 },
{ 2530, 1, 667, 1, 24289, 0 },
{ 1, 1, 661, 1, 24289, 0 },
{ 312, 1, 655, 1, 24289, 0 },
{ 623, 1, 655, 1, 24289, 0 },
{ 891, 1, 649, 1, 24289, 0 },
{ 1159, 1, 643, 1, 24289, 0 },
{ 1406, 1, 637, 1, 24289, 0 },
{ 1653, 1, 637, 1, 24289, 0 },
{ 1894, 1, 631, 1, 24289, 0 },
{ 2135, 1, 625, 1, 24289, 0 },
{ 2369, 1, 619, 1, 24289, 0 },
{ 65, 1, 619, 1, 24289, 0 },
{ 376, 1, 613, 1, 24289, 0 },
{ 687, 1, 607, 1, 24289, 0 },
{ 955, 1, 601, 1, 24289, 0 },
{ 1223, 1, 601, 1, 24289, 0 },
{ 1470, 1, 595, 1, 24289, 0 },
{ 1711, 1, 589, 1, 24289, 0 },
{ 1952, 1, 583, 1, 24289, 0 },
{ 2193, 1, 583, 1, 24289, 0 },
{ 2427, 1, 577, 1, 24289, 0 },
{ 123, 1, 571, 1, 24289, 0 },
{ 434, 1, 565, 1, 24289, 0 },
{ 2318, 1512, 1, 0, 6464, 2 },
{ 2322, 1, 1, 1, 17376, 0 },
{ 237, 1528, 1, 2, 24225, 4 },
{ 548, 1528, 1, 2, 24225, 4 },
{ 816, 1528, 1, 2, 24225, 4 },
{ 1084, 1528, 1, 2, 24225, 4 },
{ 1337, 1528, 1, 2, 24225, 4 },
{ 1584, 1528, 1, 2, 24225, 4 },
{ 1825, 1528, 1, 2, 24225, 4 },
{ 2066, 1528, 1, 2, 24225, 4 },
{ 2295, 1528, 1, 2, 24225, 4 },
{ 2529, 1528, 1, 2, 24225, 4 },
{ 0, 1528, 1, 2, 24225, 4 },
{ 311, 1528, 1, 2, 24225, 4 },
{ 622, 1528, 1, 2, 24225, 4 },
{ 890, 1528, 1, 2, 24225, 4 },
{ 1158, 1528, 1, 2, 24225, 4 },
{ 1405, 1528, 1, 2, 24225, 4 },
{ 1652, 1528, 1, 2, 24225, 4 },
{ 1893, 1528, 1, 2, 24225, 4 },
{ 2134, 1528, 1, 2, 24225, 4 },
{ 2368, 1528, 1, 2, 24225, 4 },
{ 64, 1528, 1, 2, 24225, 4 },
{ 375, 1528, 1, 2, 24225, 4 },
{ 686, 1528, 1, 2, 24225, 4 },
{ 954, 1528, 1, 2, 24225, 4 },
{ 1222, 1528, 1, 2, 24225, 4 },
{ 1469, 1528, 1, 2, 24225, 4 },
{ 1710, 1528, 1, 2, 24225, 4 },
{ 1951, 1528, 1, 2, 24225, 4 },
{ 2192, 1528, 1, 2, 24225, 4 },
{ 2426, 1528, 1, 2, 24225, 4 },
{ 122, 1528, 1, 2, 24225, 4 },
{ 433, 1528, 1, 2, 24225, 4 },
{ 260, 1, 561, 1, 24385, 0 },
{ 571, 1, 557, 1, 24385, 0 },
{ 839, 1, 557, 1, 24385, 0 },
{ 1107, 1, 553, 1, 24385, 0 },
{ 1360, 1, 553, 1, 24385, 0 },
{ 1607, 1, 549, 1, 24385, 0 },
{ 1848, 1, 549, 1, 24385, 0 },
{ 2089, 1, 545, 1, 24385, 0 },
{ 2323, 1, 545, 1, 24385, 0 },
{ 2542, 1, 541, 1, 24385, 0 },
{ 16, 1, 541, 1, 24385, 0 },
{ 327, 1, 537, 1, 24385, 0 },
{ 638, 1, 537, 1, 24385, 0 },
{ 906, 1, 533, 1, 24385, 0 },
{ 1174, 1, 533, 1, 24385, 0 },
{ 1421, 1, 529, 1, 24385, 0 },
{ 1668, 1, 529, 1, 24385, 0 },
{ 1909, 1, 525, 1, 24385, 0 },
{ 2150, 1, 525, 1, 24385, 0 },
{ 2384, 1, 521, 1, 24385, 0 },
{ 80, 1, 521, 1, 24385, 0 },
{ 391, 1, 517, 1, 24385, 0 },
{ 702, 1, 517, 1, 24385, 0 },
{ 970, 1, 513, 1, 24385, 0 },
{ 1238, 1, 513, 1, 24385, 0 },
{ 1485, 1, 509, 1, 24385, 0 },
{ 1726, 1, 509, 1, 24385, 0 },
{ 1967, 1, 505, 1, 24385, 0 },
{ 2208, 1, 505, 1, 24385, 0 },
{ 2442, 1, 501, 1, 24385, 0 },
{ 138, 1, 501, 1, 24385, 0 },
{ 449, 1, 497, 1, 24385, 0 },
{ 268, 1530, 1, 0, 24353, 2 },
{ 579, 1530, 1, 0, 24353, 2 },
{ 847, 1530, 1, 0, 24353, 2 },
{ 1115, 1530, 1, 0, 24353, 2 },
{ 1368, 1530, 1, 0, 24353, 2 },
{ 1615, 1530, 1, 0, 24353, 2 },
{ 1856, 1530, 1, 0, 24353, 2 },
{ 2097, 1530, 1, 0, 24353, 2 },
{ 2331, 1530, 1, 0, 24353, 2 },
{ 2545, 1530, 1, 0, 24353, 2 },
{ 20, 1530, 1, 0, 24353, 2 },
{ 331, 1530, 1, 0, 24353, 2 },
{ 642, 1530, 1, 0, 24353, 2 },
{ 910, 1530, 1, 0, 24353, 2 },
{ 1178, 1530, 1, 0, 24353, 2 },
{ 1425, 1530, 1, 0, 24353, 2 },
{ 1672, 1530, 1, 0, 24353, 2 },
{ 1913, 1530, 1, 0, 24353, 2 },
{ 2154, 1530, 1, 0, 24353, 2 },
{ 2388, 1530, 1, 0, 24353, 2 },
{ 84, 1530, 1, 0, 24353, 2 },
{ 395, 1530, 1, 0, 24353, 2 },
{ 706, 1530, 1, 0, 24353, 2 },
{ 974, 1530, 1, 0, 24353, 2 },
{ 1242, 1530, 1, 0, 24353, 2 },
{ 1489, 1530, 1, 0, 24353, 2 },
{ 1730, 1530, 1, 0, 24353, 2 },
{ 1971, 1530, 1, 0, 24353, 2 },
{ 2212, 1530, 1, 0, 24353, 2 },
{ 2446, 1530, 1, 0, 24353, 2 },
{ 142, 1530, 1, 0, 24353, 2 },
{ 453, 1530, 1, 0, 24353, 2 },
{ 225, 1299, 1, 17, 1428, 17 },
{ 536, 1326, 1, 17, 1428, 17 },
{ 804, 1353, 1, 17, 1428, 17 },
{ 1072, 1380, 1, 17, 1428, 17 },
{ 1325, 1407, 1, 17, 1428, 17 },
{ 1572, 1434, 1, 17, 1428, 17 },
{ 1813, 1461, 1, 17, 1428, 17 },
{ 2054, 1488, 1, 17, 1428, 17 },
{ 271, 418, 1084, 2, 24321, 4 },
{ 582, 418, 1081, 2, 24321, 4 },
{ 850, 418, 1081, 2, 24321, 4 },
{ 1118, 418, 1078, 2, 24321, 4 },
{ 1371, 418, 1078, 2, 24321, 4 },
{ 1618, 418, 1075, 2, 24321, 4 },
{ 1859, 418, 1075, 2, 24321, 4 },
{ 2100, 418, 1072, 2, 24321, 4 },
{ 2334, 418, 1072, 2, 24321, 4 },
{ 2548, 418, 1069, 2, 24321, 4 },
{ 24, 418, 1069, 2, 24321, 4 },
{ 335, 418, 1066, 2, 24321, 4 },
{ 646, 418, 1066, 2, 24321, 4 },
{ 914, 418, 1063, 2, 24321, 4 },
{ 1182, 418, 1063, 2, 24321, 4 },
{ 1429, 418, 1022, 2, 24321, 4 },
{ 1676, 418, 1022, 2, 24321, 4 },
{ 1917, 418, 939, 2, 24321, 4 },
{ 2158, 418, 939, 2, 24321, 4 },
{ 2392, 418, 856, 2, 24321, 4 },
{ 88, 418, 856, 2, 24321, 4 },
{ 399, 418, 773, 2, 24321, 4 },
{ 710, 418, 773, 2, 24321, 4 },
{ 978, 418, 730, 2, 24321, 4 },
{ 1246, 418, 730, 2, 24321, 4 },
{ 1493, 418, 725, 2, 24321, 4 },
{ 1734, 418, 725, 2, 24321, 4 },
{ 1975, 418, 722, 2, 24321, 4 },
{ 2216, 418, 722, 2, 24321, 4 },
{ 2450, 418, 719, 2, 24321, 4 },
{ 146, 418, 719, 2, 24321, 4 },
{ 457, 418, 713, 2, 24321, 4 },
{ 241, 1, 1083, 1, 24257, 0 },
{ 552, 1, 1080, 1, 24257, 0 },
{ 820, 1, 1080, 1, 24257, 0 },
{ 1088, 1, 1077, 1, 24257, 0 },
{ 1341, 1, 1077, 1, 24257, 0 },
{ 1588, 1, 1074, 1, 24257, 0 },
{ 1829, 1, 1074, 1, 24257, 0 },
{ 2070, 1, 1071, 1, 24257, 0 },
{ 2299, 1, 1071, 1, 24257, 0 },
{ 2533, 1, 1068, 1, 24257, 0 },
{ 5, 1, 1068, 1, 24257, 0 },
{ 316, 1, 1065, 1, 24257, 0 },
{ 627, 1, 1065, 1, 24257, 0 },
{ 895, 1, 1062, 1, 24257, 0 },
{ 1163, 1, 1062, 1, 24257, 0 },
{ 1410, 1, 1059, 1, 24257, 0 },
{ 1657, 1, 1059, 1, 24257, 0 },
{ 1898, 1, 1016, 1, 24257, 0 },
{ 2139, 1, 1016, 1, 24257, 0 },
{ 2373, 1, 933, 1, 24257, 0 },
{ 69, 1, 933, 1, 24257, 0 },
{ 380, 1, 850, 1, 24257, 0 },
{ 691, 1, 850, 1, 24257, 0 },
{ 959, 1, 767, 1, 24257, 0 },
{ 1227, 1, 767, 1, 24257, 0 },
{ 1474, 1, 724, 1, 24257, 0 },
{ 1715, 1, 724, 1, 24257, 0 },
{ 1956, 1, 721, 1, 24257, 0 },
{ 2197, 1, 721, 1, 24257, 0 },
{ 2431, 1, 718, 1, 24257, 0 },
{ 127, 1, 718, 1, 24257, 0 },
{ 438, 1, 715, 1, 24257, 0 },
{ 254, 1297, 1186, 2, 19361, 4 },
{ 565, 1297, 1182, 2, 19361, 4 },
{ 833, 1297, 1178, 2, 19361, 4 },
{ 1101, 1297, 1174, 2, 19361, 4 },
{ 1354, 1297, 1174, 2, 19361, 4 },
{ 1601, 1297, 1170, 2, 19361, 4 },
{ 1842, 1297, 1166, 2, 19361, 4 },
{ 2083, 1297, 1162, 2, 19361, 4 },
{ 2303, 1297, 1162, 2, 19361, 4 },
{ 2537, 1297, 1158, 2, 19361, 4 },
{ 10, 1297, 1154, 2, 19361, 4 },
{ 321, 1297, 1150, 2, 19361, 4 },
{ 632, 1297, 1150, 2, 19361, 4 },
{ 900, 1297, 1146, 2, 19361, 4 },
{ 1168, 1297, 1142, 2, 19361, 4 },
{ 1415, 1297, 1138, 2, 19361, 4 },
{ 1662, 1297, 1138, 2, 19361, 4 },
{ 1903, 1297, 1134, 2, 19361, 4 },
{ 2144, 1297, 1130, 2, 19361, 4 },
{ 2378, 1297, 1126, 2, 19361, 4 },
{ 74, 1297, 1126, 2, 19361, 4 },
{ 385, 1297, 1122, 2, 19361, 4 },
{ 696, 1297, 1118, 2, 19361, 4 },
{ 964, 1297, 1114, 2, 19361, 4 },
{ 1232, 1297, 1114, 2, 19361, 4 },
{ 1479, 1297, 1110, 2, 19361, 4 },
{ 1720, 1297, 1106, 2, 19361, 4 },
{ 1961, 1297, 1102, 2, 19361, 4 },
{ 2202, 1297, 1102, 2, 19361, 4 },
{ 2436, 1297, 1098, 2, 19361, 4 },
{ 132, 1297, 1094, 2, 19361, 4 },
{ 443, 1297, 1090, 2, 19361, 4 },
{ 296, 1294, 1183, 12, 1714, 14 },
{ 607, 1305, 1171, 12, 1714, 14 },
{ 875, 1321, 1171, 12, 1714, 14 },
{ 1143, 1332, 1159, 12, 1714, 14 },
{ 1390, 1348, 1159, 12, 1714, 14 },
{ 1637, 1359, 1147, 12, 1714, 14 },
{ 1878, 1375, 1147, 12, 1714, 14 },
{ 2119, 1386, 1135, 12, 1714, 14 },
{ 2353, 1402, 1135, 12, 1714, 14 },
{ 2567, 1413, 1123, 12, 1714, 14 },
{ 47, 1429, 1123, 12, 1714, 14 },
{ 358, 1440, 1111, 12, 1714, 14 },
{ 669, 1456, 1111, 12, 1714, 14 },
{ 937, 1467, 1099, 12, 1714, 14 },
{ 1205, 1483, 1099, 12, 1714, 14 },
{ 1452, 1494, 1091, 12, 1714, 14 },
{ 1693, 415, 1, 12, 1762, 14 },
{ 1934, 420, 1, 12, 1762, 14 },
{ 2175, 425, 1, 12, 1762, 14 },
{ 2409, 430, 1, 12, 1762, 14 },
{ 105, 435, 1, 12, 1762, 14 },
{ 416, 440, 1, 12, 1762, 14 },
{ 727, 445, 1, 12, 1762, 14 },
{ 995, 450, 1, 12, 1762, 14 },
{ 1263, 455, 1, 12, 1762, 14 },
{ 1510, 460, 1, 12, 1762, 14 },
{ 1751, 465, 1, 12, 1762, 14 },
{ 1992, 470, 1, 12, 1762, 14 },
{ 2233, 475, 1, 12, 1762, 14 },
{ 2467, 480, 1, 12, 1762, 14 },
{ 163, 485, 1, 12, 1762, 14 },
{ 474, 490, 1, 12, 1762, 14 },
{ 753, 1, 1, 1, 24161, 0 },
{ 1021, 1, 1, 1, 24161, 0 },
{ 1289, 1, 1, 1, 24161, 0 },
{ 1536, 1, 1, 1, 24161, 0 },
{ 1777, 1, 1, 1, 24161, 0 },
{ 2018, 1, 1, 1, 24161, 0 },
{ 2259, 1, 1, 1, 24161, 0 },
{ 2493, 1, 1, 1, 24161, 0 },
{ 189, 1, 1, 1, 24161, 0 },
{ 500, 1, 1, 1, 24161, 0 },
{ 768, 1, 1, 1, 24161, 0 },
{ 1036, 1, 1, 1, 24161, 0 },
{ 1304, 1, 1, 1, 24161, 0 },
{ 1551, 1, 1, 1, 24161, 0 },
{ 1792, 1, 1, 1, 24161, 0 },
{ 2033, 1, 1, 1, 24161, 0 },
{ 2274, 1, 1, 1, 24161, 0 },
{ 2508, 1, 1, 1, 24161, 0 },
{ 204, 1, 1, 1, 24161, 0 },
{ 515, 1, 1, 1, 24161, 0 },
{ 783, 1, 1, 1, 24161, 0 },
{ 1051, 1, 1, 1, 24161, 0 },
{ 1319, 1, 1, 1, 24161, 0 },
{ 1566, 1, 1, 1, 24161, 0 },
{ 1807, 1, 1, 1, 24161, 0 },
{ 2048, 1, 1, 1, 24161, 0 },
{ 2289, 1, 1, 1, 24161, 0 },
{ 2523, 1, 1, 1, 24161, 0 },
{ 219, 1, 1, 1, 24161, 0 },
{ 530, 1, 1, 1, 24161, 0 },
{ 798, 1, 1, 1, 24161, 0 },
{ 1066, 1, 1, 1, 24161, 0 },
{ 231, 119, 1041, 28, 1352, 22 },
{ 542, 147, 978, 28, 1352, 22 },
{ 810, 191, 978, 28, 1352, 22 },
{ 1078, 219, 895, 28, 1352, 22 },
{ 1331, 263, 895, 28, 1352, 22 },
{ 1578, 291, 812, 28, 1352, 22 },
{ 1819, 335, 812, 28, 1352, 22 },
{ 2060, 363, 749, 28, 1352, 22 },
{ 245, 137, 1021, 28, 1272, 22 },
{ 556, 181, 938, 28, 1272, 22 },
{ 824, 209, 938, 28, 1272, 22 },
{ 1092, 253, 855, 28, 1272, 22 },
{ 1345, 281, 855, 28, 1272, 22 },
{ 1592, 325, 772, 28, 1272, 22 },
{ 1833, 353, 772, 28, 1272, 22 },
{ 2074, 397, 729, 28, 1272, 22 },
{ 282, 1217, 563, 0, 19393, 2 },
{ 593, 1217, 559, 0, 19393, 2 },
{ 861, 1217, 559, 0, 19393, 2 },
{ 1129, 1217, 555, 0, 19393, 2 },
{ 1382, 1217, 555, 0, 19393, 2 },
{ 1629, 1217, 551, 0, 19393, 2 },
{ 1870, 1217, 551, 0, 19393, 2 },
{ 2111, 1217, 547, 0, 19393, 2 },
{ 2345, 1217, 547, 0, 19393, 2 },
{ 2559, 1217, 543, 0, 19393, 2 },
{ 37, 1217, 543, 0, 19393, 2 },
{ 348, 1217, 539, 0, 19393, 2 },
{ 659, 1217, 539, 0, 19393, 2 },
{ 927, 1217, 535, 0, 19393, 2 },
{ 1195, 1217, 535, 0, 19393, 2 },
{ 1442, 1217, 531, 0, 19393, 2 },
{ 1689, 1217, 531, 0, 19393, 2 },
{ 1930, 1217, 527, 0, 19393, 2 },
{ 2171, 1217, 527, 0, 19393, 2 },
{ 2405, 1217, 523, 0, 19393, 2 },
{ 101, 1217, 523, 0, 19393, 2 },
{ 412, 1217, 519, 0, 19393, 2 },
{ 723, 1217, 519, 0, 19393, 2 },
{ 991, 1217, 515, 0, 19393, 2 },
{ 1259, 1217, 515, 0, 19393, 2 },
{ 1506, 1217, 511, 0, 19393, 2 },
{ 1747, 1217, 511, 0, 19393, 2 },
{ 1988, 1217, 507, 0, 19393, 2 },
{ 2229, 1217, 507, 0, 19393, 2 },
{ 2463, 1217, 503, 0, 19393, 2 },
{ 159, 1217, 503, 0, 19393, 2 },
{ 470, 1217, 499, 0, 19393, 2 },
{ 2308, 1204, 1, 0, 6496, 2 },
{ 2651, 1, 1208, 1, 19172, 0 },
{ 2657, 1, 1208, 1, 19172, 0 },
{ 2663, 1, 1208, 1, 19172, 0 },
{ 2669, 1, 1208, 1, 19172, 0 },
{ 2675, 1, 1208, 1, 19172, 0 },
{ 2681, 1, 1208, 1, 19172, 0 },
{ 2687, 1, 1208, 1, 19172, 0 },
{ 2693, 1, 1208, 1, 19172, 0 },
{ 2718, 1, 1206, 1, 19140, 0 },
{ 2724, 1, 1206, 1, 19140, 0 },
{ 2730, 1, 1206, 1, 19140, 0 },
{ 2736, 1, 1206, 1, 19140, 0 },
{ 2742, 1, 1206, 1, 19140, 0 },
{ 2748, 1, 1206, 1, 19140, 0 },
{ 2754, 1, 1206, 1, 19140, 0 },
{ 2760, 1, 1206, 1, 19140, 0 },
{ 2766, 1, 1202, 1, 19108, 0 },
{ 2772, 1, 1202, 1, 19108, 0 },
{ 2778, 1, 1202, 1, 19108, 0 },
{ 2784, 1, 1202, 1, 19108, 0 },
{ 2790, 1, 1202, 1, 19108, 0 },
{ 2796, 1, 1202, 1, 19108, 0 },
{ 2802, 1, 1202, 1, 19108, 0 },
{ 2808, 1, 1202, 1, 19108, 0 },
{ 2592, 1, 1200, 1, 19076, 0 },
{ 2598, 1, 1200, 1, 19076, 0 },
{ 2604, 1, 1200, 1, 19076, 0 },
{ 2610, 1, 1200, 1, 19076, 0 },
{ 2616, 1, 1200, 1, 19076, 0 },
{ 2622, 1, 1200, 1, 19076, 0 },
{ 2628, 1, 1200, 1, 19076, 0 },
{ 2634, 1, 1200, 1, 19076, 0 },
{ 285, 1214, 1, 81, 1666, 53 },
{ 596, 1219, 1, 81, 1666, 53 },
{ 864, 1224, 1, 81, 1666, 53 },
{ 1132, 1229, 1, 81, 1666, 53 },
{ 1385, 1234, 1, 81, 1666, 53 },
{ 1632, 1239, 1, 81, 1666, 53 },
{ 1873, 1244, 1, 81, 1666, 53 },
{ 2114, 1249, 1, 81, 1666, 53 },
{ 2348, 1254, 1, 81, 1666, 53 },
{ 2562, 1259, 1, 81, 1666, 53 },
{ 41, 1264, 1, 81, 1666, 53 },
{ 352, 1269, 1, 81, 1666, 53 },
{ 663, 1274, 1, 81, 1666, 53 },
{ 931, 1279, 1, 81, 1666, 53 },
{ 1199, 1284, 1, 81, 1666, 53 },
{ 1446, 1289, 1, 81, 1666, 53 },
};
// VSSRC Register Class...
static const MCPhysReg VSSRC[] = {
PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F31, PPC_F30, PPC_F29, PPC_F28, PPC_F27, PPC_F26, PPC_F25, PPC_F24, PPC_F23, PPC_F22, PPC_F21, PPC_F20, PPC_F19, PPC_F18, PPC_F17, PPC_F16, PPC_F15, PPC_F14, PPC_VF2, PPC_VF3, PPC_VF4, PPC_VF5, PPC_VF0, PPC_VF1, PPC_VF6, PPC_VF7, PPC_VF8, PPC_VF9, PPC_VF10, PPC_VF11, PPC_VF12, PPC_VF13, PPC_VF14, PPC_VF15, PPC_VF16, PPC_VF17, PPC_VF18, PPC_VF19, PPC_VF31, PPC_VF30, PPC_VF29, PPC_VF28, PPC_VF27, PPC_VF26, PPC_VF25, PPC_VF24, PPC_VF23, PPC_VF22, PPC_VF21, PPC_VF20,
};
// VSSRC Bit set.
static const uint8_t VSSRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// GPRC Register Class...
static const MCPhysReg GPRC[] = {
PPC_R2, PPC_R3, PPC_R4, PPC_R5, PPC_R6, PPC_R7, PPC_R8, PPC_R9, PPC_R10, PPC_R11, PPC_R12, PPC_R30, PPC_R29, PPC_R28, PPC_R27, PPC_R26, PPC_R25, PPC_R24, PPC_R23, PPC_R22, PPC_R21, PPC_R20, PPC_R19, PPC_R18, PPC_R17, PPC_R16, PPC_R15, PPC_R14, PPC_R13, PPC_R31, PPC_R0, PPC_R1, PPC_FP, PPC_BP,
};
// GPRC Bit set.
static const uint8_t GPRCBits[] = {
0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// GPRC_NOR0 Register Class...
static const MCPhysReg GPRC_NOR0[] = {
PPC_R2, PPC_R3, PPC_R4, PPC_R5, PPC_R6, PPC_R7, PPC_R8, PPC_R9, PPC_R10, PPC_R11, PPC_R12, PPC_R30, PPC_R29, PPC_R28, PPC_R27, PPC_R26, PPC_R25, PPC_R24, PPC_R23, PPC_R22, PPC_R21, PPC_R20, PPC_R19, PPC_R18, PPC_R17, PPC_R16, PPC_R15, PPC_R14, PPC_R13, PPC_R31, PPC_R1, PPC_FP, PPC_BP, PPC_ZERO,
};
// GPRC_NOR0 Bit set.
static const uint8_t GPRC_NOR0Bits[] = {
0x12, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x07,
};
// GPRC_and_GPRC_NOR0 Register Class...
static const MCPhysReg GPRC_and_GPRC_NOR0[] = {
PPC_R2, PPC_R3, PPC_R4, PPC_R5, PPC_R6, PPC_R7, PPC_R8, PPC_R9, PPC_R10, PPC_R11, PPC_R12, PPC_R30, PPC_R29, PPC_R28, PPC_R27, PPC_R26, PPC_R25, PPC_R24, PPC_R23, PPC_R22, PPC_R21, PPC_R20, PPC_R19, PPC_R18, PPC_R17, PPC_R16, PPC_R15, PPC_R14, PPC_R13, PPC_R31, PPC_R1, PPC_FP, PPC_BP,
};
// GPRC_and_GPRC_NOR0 Bit set.
static const uint8_t GPRC_and_GPRC_NOR0Bits[] = {
0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x07,
};
// CRBITRC Register Class...
static const MCPhysReg CRBITRC[] = {
PPC_CR2LT, PPC_CR2GT, PPC_CR2EQ, PPC_CR2UN, PPC_CR3LT, PPC_CR3GT, PPC_CR3EQ, PPC_CR3UN, PPC_CR4LT, PPC_CR4GT, PPC_CR4EQ, PPC_CR4UN, PPC_CR5LT, PPC_CR5GT, PPC_CR5EQ, PPC_CR5UN, PPC_CR6LT, PPC_CR6GT, PPC_CR6EQ, PPC_CR6UN, PPC_CR7LT, PPC_CR7GT, PPC_CR7EQ, PPC_CR7UN, PPC_CR1LT, PPC_CR1GT, PPC_CR1EQ, PPC_CR1UN, PPC_CR0LT, PPC_CR0GT, PPC_CR0EQ, PPC_CR0UN,
};
// CRBITRC Bit set.
static const uint8_t CRBITRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f,
};
// F4RC Register Class...
static const MCPhysReg F4RC[] = {
PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F31, PPC_F30, PPC_F29, PPC_F28, PPC_F27, PPC_F26, PPC_F25, PPC_F24, PPC_F23, PPC_F22, PPC_F21, PPC_F20, PPC_F19, PPC_F18, PPC_F17, PPC_F16, PPC_F15, PPC_F14,
};
// F4RC Bit set.
static const uint8_t F4RCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01,
};
// CRRC Register Class...
static const MCPhysReg CRRC[] = {
PPC_CR0, PPC_CR1, PPC_CR5, PPC_CR6, PPC_CR7, PPC_CR2, PPC_CR3, PPC_CR4,
};
// CRRC Bit set.
static const uint8_t CRRCBits[] = {
0x00, 0x00, 0xf0, 0x0f,
};
// CARRYRC Register Class...
static const MCPhysReg CARRYRC[] = {
PPC_CARRY, PPC_XER,
};
// CARRYRC Bit set.
static const uint8_t CARRYRCBits[] = {
0x04, 0x02,
};
// CTRRC Register Class...
static const MCPhysReg CTRRC[] = {
PPC_CTR,
};
// CTRRC Bit set.
static const uint8_t CTRRCBits[] = {
0x08,
};
// LRRC Register Class...
static const MCPhysReg LRRC[] = {
PPC_LR,
};
// LRRC Bit set.
static const uint8_t LRRCBits[] = {
0x20,
};
// VRSAVERC Register Class...
static const MCPhysReg VRSAVERC[] = {
PPC_VRSAVE,
};
// VRSAVERC Bit set.
static const uint8_t VRSAVERCBits[] = {
0x00, 0x01,
};
// SPILLTOVSRRC Register Class...
static const MCPhysReg SPILLTOVSRRC[] = {
PPC_X2, PPC_X3, PPC_X4, PPC_X5, PPC_X6, PPC_X7, PPC_X8, PPC_X9, PPC_X10, PPC_X11, PPC_X12, PPC_X30, PPC_X29, PPC_X28, PPC_X27, PPC_X26, PPC_X25, PPC_X24, PPC_X23, PPC_X22, PPC_X21, PPC_X20, PPC_X19, PPC_X18, PPC_X17, PPC_X16, PPC_X15, PPC_X14, PPC_X31, PPC_X13, PPC_X0, PPC_X1, PPC_FP8, PPC_BP8, PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_VF2, PPC_VF3, PPC_VF4, PPC_VF5, PPC_VF0, PPC_VF1, PPC_VF6, PPC_VF7, PPC_VF8, PPC_VF9, PPC_VF10, PPC_VF11, PPC_VF12, PPC_VF13, PPC_VF14, PPC_VF15, PPC_VF16, PPC_VF17, PPC_VF18, PPC_VF19,
};
// SPILLTOVSRRC Bit set.
static const uint8_t SPILLTOVSRRCBits[] = {
0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x7f, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// VSFRC Register Class...
static const MCPhysReg VSFRC[] = {
PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F31, PPC_F30, PPC_F29, PPC_F28, PPC_F27, PPC_F26, PPC_F25, PPC_F24, PPC_F23, PPC_F22, PPC_F21, PPC_F20, PPC_F19, PPC_F18, PPC_F17, PPC_F16, PPC_F15, PPC_F14, PPC_VF2, PPC_VF3, PPC_VF4, PPC_VF5, PPC_VF0, PPC_VF1, PPC_VF6, PPC_VF7, PPC_VF8, PPC_VF9, PPC_VF10, PPC_VF11, PPC_VF12, PPC_VF13, PPC_VF14, PPC_VF15, PPC_VF16, PPC_VF17, PPC_VF18, PPC_VF19, PPC_VF31, PPC_VF30, PPC_VF29, PPC_VF28, PPC_VF27, PPC_VF26, PPC_VF25, PPC_VF24, PPC_VF23, PPC_VF22, PPC_VF21, PPC_VF20,
};
// VSFRC Bit set.
static const uint8_t VSFRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// G8RC Register Class...
static const MCPhysReg G8RC[] = {
PPC_X2, PPC_X3, PPC_X4, PPC_X5, PPC_X6, PPC_X7, PPC_X8, PPC_X9, PPC_X10, PPC_X11, PPC_X12, PPC_X30, PPC_X29, PPC_X28, PPC_X27, PPC_X26, PPC_X25, PPC_X24, PPC_X23, PPC_X22, PPC_X21, PPC_X20, PPC_X19, PPC_X18, PPC_X17, PPC_X16, PPC_X15, PPC_X14, PPC_X31, PPC_X13, PPC_X0, PPC_X1, PPC_FP8, PPC_BP8,
};
// G8RC Bit set.
static const uint8_t G8RCBits[] = {
0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// G8RC_NOX0 Register Class...
static const MCPhysReg G8RC_NOX0[] = {
PPC_X2, PPC_X3, PPC_X4, PPC_X5, PPC_X6, PPC_X7, PPC_X8, PPC_X9, PPC_X10, PPC_X11, PPC_X12, PPC_X30, PPC_X29, PPC_X28, PPC_X27, PPC_X26, PPC_X25, PPC_X24, PPC_X23, PPC_X22, PPC_X21, PPC_X20, PPC_X19, PPC_X18, PPC_X17, PPC_X16, PPC_X15, PPC_X14, PPC_X31, PPC_X13, PPC_X1, PPC_FP8, PPC_BP8, PPC_ZERO8,
};
// G8RC_NOX0 Bit set.
static const uint8_t G8RC_NOX0Bits[] = {
0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f,
};
// SPILLTOVSRRC_and_VSFRC Register Class...
static const MCPhysReg SPILLTOVSRRC_and_VSFRC[] = {
PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_VF2, PPC_VF3, PPC_VF4, PPC_VF5, PPC_VF0, PPC_VF1, PPC_VF6, PPC_VF7, PPC_VF8, PPC_VF9, PPC_VF10, PPC_VF11, PPC_VF12, PPC_VF13, PPC_VF14, PPC_VF15, PPC_VF16, PPC_VF17, PPC_VF18, PPC_VF19,
};
// SPILLTOVSRRC_and_VSFRC Bit set.
static const uint8_t SPILLTOVSRRC_and_VSFRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x7f,
};
// G8RC_and_G8RC_NOX0 Register Class...
static const MCPhysReg G8RC_and_G8RC_NOX0[] = {
PPC_X2, PPC_X3, PPC_X4, PPC_X5, PPC_X6, PPC_X7, PPC_X8, PPC_X9, PPC_X10, PPC_X11, PPC_X12, PPC_X30, PPC_X29, PPC_X28, PPC_X27, PPC_X26, PPC_X25, PPC_X24, PPC_X23, PPC_X22, PPC_X21, PPC_X20, PPC_X19, PPC_X18, PPC_X17, PPC_X16, PPC_X15, PPC_X14, PPC_X31, PPC_X13, PPC_X1, PPC_FP8, PPC_BP8,
};
// G8RC_and_G8RC_NOX0 Bit set.
static const uint8_t G8RC_and_G8RC_NOX0Bits[] = {
0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x07,
};
// F8RC Register Class...
static const MCPhysReg F8RC[] = {
PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F31, PPC_F30, PPC_F29, PPC_F28, PPC_F27, PPC_F26, PPC_F25, PPC_F24, PPC_F23, PPC_F22, PPC_F21, PPC_F20, PPC_F19, PPC_F18, PPC_F17, PPC_F16, PPC_F15, PPC_F14,
};
// F8RC Bit set.
static const uint8_t F8RCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01,
};
// SPERC Register Class...
static const MCPhysReg SPERC[] = {
PPC_S2, PPC_S3, PPC_S4, PPC_S5, PPC_S6, PPC_S7, PPC_S8, PPC_S9, PPC_S10, PPC_S11, PPC_S12, PPC_S30, PPC_S29, PPC_S28, PPC_S27, PPC_S26, PPC_S25, PPC_S24, PPC_S23, PPC_S22, PPC_S21, PPC_S20, PPC_S19, PPC_S18, PPC_S17, PPC_S16, PPC_S15, PPC_S14, PPC_S13, PPC_S31, PPC_S0, PPC_S1,
};
// SPERC Bit set.
static const uint8_t SPERCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// VFRC Register Class...
static const MCPhysReg VFRC[] = {
PPC_VF2, PPC_VF3, PPC_VF4, PPC_VF5, PPC_VF0, PPC_VF1, PPC_VF6, PPC_VF7, PPC_VF8, PPC_VF9, PPC_VF10, PPC_VF11, PPC_VF12, PPC_VF13, PPC_VF14, PPC_VF15, PPC_VF16, PPC_VF17, PPC_VF18, PPC_VF19, PPC_VF31, PPC_VF30, PPC_VF29, PPC_VF28, PPC_VF27, PPC_VF26, PPC_VF25, PPC_VF24, PPC_VF23, PPC_VF22, PPC_VF21, PPC_VF20,
};
// VFRC Bit set.
static const uint8_t VFRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// SPERC_with_sub_32_in_GPRC_NOR0 Register Class...
static const MCPhysReg SPERC_with_sub_32_in_GPRC_NOR0[] = {
PPC_S2, PPC_S3, PPC_S4, PPC_S5, PPC_S6, PPC_S7, PPC_S8, PPC_S9, PPC_S10, PPC_S11, PPC_S12, PPC_S30, PPC_S29, PPC_S28, PPC_S27, PPC_S26, PPC_S25, PPC_S24, PPC_S23, PPC_S22, PPC_S21, PPC_S20, PPC_S19, PPC_S18, PPC_S17, PPC_S16, PPC_S15, PPC_S14, PPC_S13, PPC_S31, PPC_S1,
};
// SPERC_with_sub_32_in_GPRC_NOR0 Bit set.
static const uint8_t SPERC_with_sub_32_in_GPRC_NOR0Bits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x07,
};
// SPILLTOVSRRC_and_VFRC Register Class...
static const MCPhysReg SPILLTOVSRRC_and_VFRC[] = {
PPC_VF2, PPC_VF3, PPC_VF4, PPC_VF5, PPC_VF0, PPC_VF1, PPC_VF6, PPC_VF7, PPC_VF8, PPC_VF9, PPC_VF10, PPC_VF11, PPC_VF12, PPC_VF13, PPC_VF14, PPC_VF15, PPC_VF16, PPC_VF17, PPC_VF18, PPC_VF19,
};
// SPILLTOVSRRC_and_VFRC Bit set.
static const uint8_t SPILLTOVSRRC_and_VFRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x7f,
};
// SPILLTOVSRRC_and_F4RC Register Class...
static const MCPhysReg SPILLTOVSRRC_and_F4RC[] = {
PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13,
};
// SPILLTOVSRRC_and_F4RC Bit set.
static const uint8_t SPILLTOVSRRC_and_F4RCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x7f,
};
// CTRRC8 Register Class...
static const MCPhysReg CTRRC8[] = {
PPC_CTR8,
};
// CTRRC8 Bit set.
static const uint8_t CTRRC8Bits[] = {
0x00, 0x00, 0x00, 0x10,
};
// LR8RC Register Class...
static const MCPhysReg LR8RC[] = {
PPC_LR8,
};
// LR8RC Bit set.
static const uint8_t LR8RCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04,
};
// DMRROWRC Register Class...
static const MCPhysReg DMRROWRC[] = {
PPC_DMRROW0, PPC_DMRROW1, PPC_DMRROW2, PPC_DMRROW3, PPC_DMRROW4, PPC_DMRROW5, PPC_DMRROW6, PPC_DMRROW7, PPC_DMRROW8, PPC_DMRROW9, PPC_DMRROW10, PPC_DMRROW11, PPC_DMRROW12, PPC_DMRROW13, PPC_DMRROW14, PPC_DMRROW15, PPC_DMRROW16, PPC_DMRROW17, PPC_DMRROW18, PPC_DMRROW19, PPC_DMRROW20, PPC_DMRROW21, PPC_DMRROW22, PPC_DMRROW23, PPC_DMRROW24, PPC_DMRROW25, PPC_DMRROW26, PPC_DMRROW27, PPC_DMRROW28, PPC_DMRROW29, PPC_DMRROW30, PPC_DMRROW31, PPC_DMRROW32, PPC_DMRROW33, PPC_DMRROW34, PPC_DMRROW35, PPC_DMRROW36, PPC_DMRROW37, PPC_DMRROW38, PPC_DMRROW39, PPC_DMRROW40, PPC_DMRROW41, PPC_DMRROW42, PPC_DMRROW43, PPC_DMRROW44, PPC_DMRROW45, PPC_DMRROW46, PPC_DMRROW47, PPC_DMRROW48, PPC_DMRROW49, PPC_DMRROW50, PPC_DMRROW51, PPC_DMRROW52, PPC_DMRROW53, PPC_DMRROW54, PPC_DMRROW55, PPC_DMRROW56, PPC_DMRROW57, PPC_DMRROW58, PPC_DMRROW59, PPC_DMRROW60, PPC_DMRROW61, PPC_DMRROW62, PPC_DMRROW63,
};
// DMRROWRC Bit set.
static const uint8_t DMRROWRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f,
};
// VSRC Register Class...
static const MCPhysReg VSRC[] = {
PPC_VSL0, PPC_VSL1, PPC_VSL2, PPC_VSL3, PPC_VSL4, PPC_VSL5, PPC_VSL6, PPC_VSL7, PPC_VSL8, PPC_VSL9, PPC_VSL10, PPC_VSL11, PPC_VSL12, PPC_VSL13, PPC_VSL31, PPC_VSL30, PPC_VSL29, PPC_VSL28, PPC_VSL27, PPC_VSL26, PPC_VSL25, PPC_VSL24, PPC_VSL23, PPC_VSL22, PPC_VSL21, PPC_VSL20, PPC_VSL19, PPC_VSL18, PPC_VSL17, PPC_VSL16, PPC_VSL15, PPC_VSL14, PPC_V2, PPC_V3, PPC_V4, PPC_V5, PPC_V0, PPC_V1, PPC_V6, PPC_V7, PPC_V8, PPC_V9, PPC_V10, PPC_V11, PPC_V12, PPC_V13, PPC_V14, PPC_V15, PPC_V16, PPC_V17, PPC_V18, PPC_V19, PPC_V31, PPC_V30, PPC_V29, PPC_V28, PPC_V27, PPC_V26, PPC_V25, PPC_V24, PPC_V23, PPC_V22, PPC_V21, PPC_V20,
};
// VSRC Bit set.
static const uint8_t VSRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// VSRC_with_sub_64_in_SPILLTOVSRRC Register Class...
static const MCPhysReg VSRC_with_sub_64_in_SPILLTOVSRRC[] = {
PPC_VSL0, PPC_VSL1, PPC_VSL2, PPC_VSL3, PPC_VSL4, PPC_VSL5, PPC_VSL6, PPC_VSL7, PPC_VSL8, PPC_VSL9, PPC_VSL10, PPC_VSL11, PPC_VSL12, PPC_VSL13, PPC_V2, PPC_V3, PPC_V4, PPC_V5, PPC_V0, PPC_V1, PPC_V6, PPC_V7, PPC_V8, PPC_V9, PPC_V10, PPC_V11, PPC_V12, PPC_V13, PPC_V14, PPC_V15, PPC_V16, PPC_V17, PPC_V18, PPC_V19,
};
// VSRC_with_sub_64_in_SPILLTOVSRRC Bit set.
static const uint8_t VSRC_with_sub_64_in_SPILLTOVSRRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01,
};
// QSRC Register Class...
static const MCPhysReg QSRC[] = {
PPC_QF0, PPC_QF1, PPC_QF2, PPC_QF3, PPC_QF4, PPC_QF5, PPC_QF6, PPC_QF7, PPC_QF8, PPC_QF9, PPC_QF10, PPC_QF11, PPC_QF12, PPC_QF13, PPC_QF31, PPC_QF30, PPC_QF29, PPC_QF28, PPC_QF27, PPC_QF26, PPC_QF25, PPC_QF24, PPC_QF23, PPC_QF22, PPC_QF21, PPC_QF20, PPC_QF19, PPC_QF18, PPC_QF17, PPC_QF16, PPC_QF15, PPC_QF14,
};
// QSRC Bit set.
static const uint8_t QSRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// VRRC Register Class...
static const MCPhysReg VRRC[] = {
PPC_V2, PPC_V3, PPC_V4, PPC_V5, PPC_V0, PPC_V1, PPC_V6, PPC_V7, PPC_V8, PPC_V9, PPC_V10, PPC_V11, PPC_V12, PPC_V13, PPC_V14, PPC_V15, PPC_V16, PPC_V17, PPC_V18, PPC_V19, PPC_V31, PPC_V30, PPC_V29, PPC_V28, PPC_V27, PPC_V26, PPC_V25, PPC_V24, PPC_V23, PPC_V22, PPC_V21, PPC_V20,
};
// VRRC Bit set.
static const uint8_t VRRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// VSLRC Register Class...
static const MCPhysReg VSLRC[] = {
PPC_VSL0, PPC_VSL1, PPC_VSL2, PPC_VSL3, PPC_VSL4, PPC_VSL5, PPC_VSL6, PPC_VSL7, PPC_VSL8, PPC_VSL9, PPC_VSL10, PPC_VSL11, PPC_VSL12, PPC_VSL13, PPC_VSL31, PPC_VSL30, PPC_VSL29, PPC_VSL28, PPC_VSL27, PPC_VSL26, PPC_VSL25, PPC_VSL24, PPC_VSL23, PPC_VSL22, PPC_VSL21, PPC_VSL20, PPC_VSL19, PPC_VSL18, PPC_VSL17, PPC_VSL16, PPC_VSL15, PPC_VSL14,
};
// VSLRC Bit set.
static const uint8_t VSLRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// VRRC_with_sub_64_in_SPILLTOVSRRC Register Class...
static const MCPhysReg VRRC_with_sub_64_in_SPILLTOVSRRC[] = {
PPC_V2, PPC_V3, PPC_V4, PPC_V5, PPC_V0, PPC_V1, PPC_V6, PPC_V7, PPC_V8, PPC_V9, PPC_V10, PPC_V11, PPC_V12, PPC_V13, PPC_V14, PPC_V15, PPC_V16, PPC_V17, PPC_V18, PPC_V19,
};
// VRRC_with_sub_64_in_SPILLTOVSRRC Bit set.
static const uint8_t VRRC_with_sub_64_in_SPILLTOVSRRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x7f,
};
// G8pRC Register Class...
static const MCPhysReg G8pRC[] = {
PPC_G8p1, PPC_G8p2, PPC_G8p3, PPC_G8p4, PPC_G8p5, PPC_G8p14, PPC_G8p13, PPC_G8p12, PPC_G8p11, PPC_G8p10, PPC_G8p9, PPC_G8p8, PPC_G8p7, PPC_G8p15, PPC_G8p6, PPC_G8p0,
};
// G8pRC Bit set.
static const uint8_t G8pRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f,
};
// G8pRC_with_sub_32_in_GPRC_NOR0 Register Class...
static const MCPhysReg G8pRC_with_sub_32_in_GPRC_NOR0[] = {
PPC_G8p1, PPC_G8p2, PPC_G8p3, PPC_G8p4, PPC_G8p5, PPC_G8p14, PPC_G8p13, PPC_G8p12, PPC_G8p11, PPC_G8p10, PPC_G8p9, PPC_G8p8, PPC_G8p7, PPC_G8p15, PPC_G8p6,
};
// G8pRC_with_sub_32_in_GPRC_NOR0 Bit set.
static const uint8_t G8pRC_with_sub_32_in_GPRC_NOR0Bits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x0f,
};
// QSRC_with_sub_64_in_SPILLTOVSRRC Register Class...
static const MCPhysReg QSRC_with_sub_64_in_SPILLTOVSRRC[] = {
PPC_QF0, PPC_QF1, PPC_QF2, PPC_QF3, PPC_QF4, PPC_QF5, PPC_QF6, PPC_QF7, PPC_QF8, PPC_QF9, PPC_QF10, PPC_QF11, PPC_QF12, PPC_QF13,
};
// QSRC_with_sub_64_in_SPILLTOVSRRC Bit set.
static const uint8_t QSRC_with_sub_64_in_SPILLTOVSRRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01,
};
// VSLRC_with_sub_64_in_SPILLTOVSRRC Register Class...
static const MCPhysReg VSLRC_with_sub_64_in_SPILLTOVSRRC[] = {
PPC_VSL0, PPC_VSL1, PPC_VSL2, PPC_VSL3, PPC_VSL4, PPC_VSL5, PPC_VSL6, PPC_VSL7, PPC_VSL8, PPC_VSL9, PPC_VSL10, PPC_VSL11, PPC_VSL12, PPC_VSL13,
};
// VSLRC_with_sub_64_in_SPILLTOVSRRC Bit set.
static const uint8_t VSLRC_with_sub_64_in_SPILLTOVSRRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01,
};
// DMRROWpRC Register Class...
static const MCPhysReg DMRROWpRC[] = {
PPC_DMRROWp0, PPC_DMRROWp1, PPC_DMRROWp2, PPC_DMRROWp3, PPC_DMRROWp4, PPC_DMRROWp5, PPC_DMRROWp6, PPC_DMRROWp7, PPC_DMRROWp8, PPC_DMRROWp9, PPC_DMRROWp10, PPC_DMRROWp11, PPC_DMRROWp12, PPC_DMRROWp13, PPC_DMRROWp14, PPC_DMRROWp15, PPC_DMRROWp16, PPC_DMRROWp17, PPC_DMRROWp18, PPC_DMRROWp19, PPC_DMRROWp20, PPC_DMRROWp21, PPC_DMRROWp22, PPC_DMRROWp23, PPC_DMRROWp24, PPC_DMRROWp25, PPC_DMRROWp26, PPC_DMRROWp27, PPC_DMRROWp28, PPC_DMRROWp29, PPC_DMRROWp30, PPC_DMRROWp31,
};
// DMRROWpRC Bit set.
static const uint8_t DMRROWpRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x1f,
};
// VSRpRC Register Class...
static const MCPhysReg VSRpRC[] = {
PPC_VSRp17, PPC_VSRp18, PPC_VSRp16, PPC_VSRp19, PPC_VSRp20, PPC_VSRp21, PPC_VSRp22, PPC_VSRp23, PPC_VSRp24, PPC_VSRp25, PPC_VSRp31, PPC_VSRp30, PPC_VSRp29, PPC_VSRp28, PPC_VSRp27, PPC_VSRp26, PPC_VSRp0, PPC_VSRp1, PPC_VSRp2, PPC_VSRp3, PPC_VSRp4, PPC_VSRp5, PPC_VSRp6, PPC_VSRp15, PPC_VSRp14, PPC_VSRp13, PPC_VSRp12, PPC_VSRp11, PPC_VSRp10, PPC_VSRp9, PPC_VSRp8, PPC_VSRp7,
};
// VSRpRC Bit set.
static const uint8_t VSRpRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// VSRpRC_with_sub_64_in_SPILLTOVSRRC Register Class...
static const MCPhysReg VSRpRC_with_sub_64_in_SPILLTOVSRRC[] = {
PPC_VSRp17, PPC_VSRp18, PPC_VSRp16, PPC_VSRp19, PPC_VSRp20, PPC_VSRp21, PPC_VSRp22, PPC_VSRp23, PPC_VSRp24, PPC_VSRp25, PPC_VSRp0, PPC_VSRp1, PPC_VSRp2, PPC_VSRp3, PPC_VSRp4, PPC_VSRp5, PPC_VSRp6,
};
// VSRpRC_with_sub_64_in_SPILLTOVSRRC Bit set.
static const uint8_t VSRpRC_with_sub_64_in_SPILLTOVSRRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 0xf8, 0x1f,
};
// VSRpRC_with_sub_64_in_F4RC Register Class...
static const MCPhysReg VSRpRC_with_sub_64_in_F4RC[] = {
PPC_VSRp0, PPC_VSRp1, PPC_VSRp2, PPC_VSRp3, PPC_VSRp4, PPC_VSRp5, PPC_VSRp6, PPC_VSRp15, PPC_VSRp14, PPC_VSRp13, PPC_VSRp12, PPC_VSRp11, PPC_VSRp10, PPC_VSRp9, PPC_VSRp8, PPC_VSRp7,
};
// VSRpRC_with_sub_64_in_F4RC Bit set.
static const uint8_t VSRpRC_with_sub_64_in_F4RCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x07,
};
// VSRpRC_with_sub_64_in_VFRC Register Class...
static const MCPhysReg VSRpRC_with_sub_64_in_VFRC[] = {
PPC_VSRp17, PPC_VSRp18, PPC_VSRp16, PPC_VSRp19, PPC_VSRp20, PPC_VSRp21, PPC_VSRp22, PPC_VSRp23, PPC_VSRp24, PPC_VSRp25, PPC_VSRp31, PPC_VSRp30, PPC_VSRp29, PPC_VSRp28, PPC_VSRp27, PPC_VSRp26,
};
// VSRpRC_with_sub_64_in_VFRC Bit set.
static const uint8_t VSRpRC_with_sub_64_in_VFRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x07,
};
// VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC Register Class...
static const MCPhysReg VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC[] = {
PPC_VSRp17, PPC_VSRp18, PPC_VSRp16, PPC_VSRp19, PPC_VSRp20, PPC_VSRp21, PPC_VSRp22, PPC_VSRp23, PPC_VSRp24, PPC_VSRp25,
};
// VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC Bit set.
static const uint8_t VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x1f,
};
// VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC Register Class...
static const MCPhysReg VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC[] = {
PPC_VSRp0, PPC_VSRp1, PPC_VSRp2, PPC_VSRp3, PPC_VSRp4, PPC_VSRp5, PPC_VSRp6,
};
// VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC Bit set.
static const uint8_t VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03,
};
// QBRC Register Class...
static const MCPhysReg QBRC[] = {
PPC_QF0, PPC_QF1, PPC_QF2, PPC_QF3, PPC_QF4, PPC_QF5, PPC_QF6, PPC_QF7, PPC_QF8, PPC_QF9, PPC_QF10, PPC_QF11, PPC_QF12, PPC_QF13, PPC_QF31, PPC_QF30, PPC_QF29, PPC_QF28, PPC_QF27, PPC_QF26, PPC_QF25, PPC_QF24, PPC_QF23, PPC_QF22, PPC_QF21, PPC_QF20, PPC_QF19, PPC_QF18, PPC_QF17, PPC_QF16, PPC_QF15, PPC_QF14,
};
// QBRC Bit set.
static const uint8_t QBRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// QFRC Register Class...
static const MCPhysReg QFRC[] = {
PPC_QF0, PPC_QF1, PPC_QF2, PPC_QF3, PPC_QF4, PPC_QF5, PPC_QF6, PPC_QF7, PPC_QF8, PPC_QF9, PPC_QF10, PPC_QF11, PPC_QF12, PPC_QF13, PPC_QF31, PPC_QF30, PPC_QF29, PPC_QF28, PPC_QF27, PPC_QF26, PPC_QF25, PPC_QF24, PPC_QF23, PPC_QF22, PPC_QF21, PPC_QF20, PPC_QF19, PPC_QF18, PPC_QF17, PPC_QF16, PPC_QF15, PPC_QF14,
};
// QFRC Bit set.
static const uint8_t QFRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07,
};
// QBRC_with_sub_64_in_SPILLTOVSRRC Register Class...
static const MCPhysReg QBRC_with_sub_64_in_SPILLTOVSRRC[] = {
PPC_QF0, PPC_QF1, PPC_QF2, PPC_QF3, PPC_QF4, PPC_QF5, PPC_QF6, PPC_QF7, PPC_QF8, PPC_QF9, PPC_QF10, PPC_QF11, PPC_QF12, PPC_QF13,
};
// QBRC_with_sub_64_in_SPILLTOVSRRC Bit set.
static const uint8_t QBRC_with_sub_64_in_SPILLTOVSRRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01,
};
// ACCRC Register Class...
static const MCPhysReg ACCRC[] = {
PPC_ACC0, PPC_ACC1, PPC_ACC2, PPC_ACC3, PPC_ACC4, PPC_ACC5, PPC_ACC6, PPC_ACC7,
};
// ACCRC Bit set.
static const uint8_t ACCRCBits[] = {
0x00, 0xf8, 0x07,
};
// UACCRC Register Class...
static const MCPhysReg UACCRC[] = {
PPC_UACC0, PPC_UACC1, PPC_UACC2, PPC_UACC3, PPC_UACC4, PPC_UACC5, PPC_UACC6, PPC_UACC7,
};
// UACCRC Bit set.
static const uint8_t UACCRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07,
};
// WACCRC Register Class...
static const MCPhysReg WACCRC[] = {
PPC_WACC0, PPC_WACC1, PPC_WACC2, PPC_WACC3, PPC_WACC4, PPC_WACC5, PPC_WACC6, PPC_WACC7,
};
// WACCRC Bit set.
static const uint8_t WACCRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07,
};
// WACC_HIRC Register Class...
static const MCPhysReg WACC_HIRC[] = {
PPC_WACC_HI0, PPC_WACC_HI1, PPC_WACC_HI2, PPC_WACC_HI3, PPC_WACC_HI4, PPC_WACC_HI5, PPC_WACC_HI6, PPC_WACC_HI7,
};
// WACC_HIRC Bit set.
static const uint8_t WACC_HIRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07,
};
// ACCRC_with_sub_64_in_SPILLTOVSRRC Register Class...
static const MCPhysReg ACCRC_with_sub_64_in_SPILLTOVSRRC[] = {
PPC_ACC0, PPC_ACC1, PPC_ACC2, PPC_ACC3,
};
// ACCRC_with_sub_64_in_SPILLTOVSRRC Bit set.
static const uint8_t ACCRC_with_sub_64_in_SPILLTOVSRRCBits[] = {
0x00, 0x78,
};
// UACCRC_with_sub_64_in_SPILLTOVSRRC Register Class...
static const MCPhysReg UACCRC_with_sub_64_in_SPILLTOVSRRC[] = {
PPC_UACC0, PPC_UACC1, PPC_UACC2, PPC_UACC3,
};
// UACCRC_with_sub_64_in_SPILLTOVSRRC Bit set.
static const uint8_t UACCRC_with_sub_64_in_SPILLTOVSRRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78,
};
// ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC Register Class...
static const MCPhysReg ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC[] = {
PPC_ACC0, PPC_ACC1, PPC_ACC2,
};
// ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC Bit set.
static const uint8_t ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCBits[] = {
0x00, 0x38,
};
// UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC Register Class...
static const MCPhysReg UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC[] = {
PPC_UACC0, PPC_UACC1, PPC_UACC2,
};
// UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC Bit set.
static const uint8_t UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38,
};
// DMRRC Register Class...
static const MCPhysReg DMRRC[] = {
PPC_DMR0, PPC_DMR1, PPC_DMR2, PPC_DMR3, PPC_DMR4, PPC_DMR5, PPC_DMR6, PPC_DMR7,
};
// DMRRC Bit set.
static const uint8_t DMRRCBits[] = {
0x00, 0x00, 0x00, 0xe0, 0x1f,
};
// DMRpRC Register Class...
static const MCPhysReg DMRpRC[] = {
PPC_DMRp0, PPC_DMRp1, PPC_DMRp2, PPC_DMRp3,
};
// DMRpRC Bit set.
static const uint8_t DMRpRCBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01,
};
static const MCRegisterClass PPCMCRegisterClasses[] = {
{ VSSRC, VSSRCBits, sizeof(VSSRCBits) },
{ GPRC, GPRCBits, sizeof(GPRCBits) },
{ GPRC_NOR0, GPRC_NOR0Bits, sizeof(GPRC_NOR0Bits) },
{ GPRC_and_GPRC_NOR0, GPRC_and_GPRC_NOR0Bits, sizeof(GPRC_and_GPRC_NOR0Bits) },
{ CRBITRC, CRBITRCBits, sizeof(CRBITRCBits) },
{ F4RC, F4RCBits, sizeof(F4RCBits) },
{ CRRC, CRRCBits, sizeof(CRRCBits) },
{ CARRYRC, CARRYRCBits, sizeof(CARRYRCBits) },
{ CTRRC, CTRRCBits, sizeof(CTRRCBits) },
{ LRRC, LRRCBits, sizeof(LRRCBits) },
{ VRSAVERC, VRSAVERCBits, sizeof(VRSAVERCBits) },
{ SPILLTOVSRRC, SPILLTOVSRRCBits, sizeof(SPILLTOVSRRCBits) },
{ VSFRC, VSFRCBits, sizeof(VSFRCBits) },
{ G8RC, G8RCBits, sizeof(G8RCBits) },
{ G8RC_NOX0, G8RC_NOX0Bits, sizeof(G8RC_NOX0Bits) },
{ SPILLTOVSRRC_and_VSFRC, SPILLTOVSRRC_and_VSFRCBits, sizeof(SPILLTOVSRRC_and_VSFRCBits) },
{ G8RC_and_G8RC_NOX0, G8RC_and_G8RC_NOX0Bits, sizeof(G8RC_and_G8RC_NOX0Bits) },
{ F8RC, F8RCBits, sizeof(F8RCBits) },
{ SPERC, SPERCBits, sizeof(SPERCBits) },
{ VFRC, VFRCBits, sizeof(VFRCBits) },
{ SPERC_with_sub_32_in_GPRC_NOR0, SPERC_with_sub_32_in_GPRC_NOR0Bits, sizeof(SPERC_with_sub_32_in_GPRC_NOR0Bits) },
{ SPILLTOVSRRC_and_VFRC, SPILLTOVSRRC_and_VFRCBits, sizeof(SPILLTOVSRRC_and_VFRCBits) },
{ SPILLTOVSRRC_and_F4RC, SPILLTOVSRRC_and_F4RCBits, sizeof(SPILLTOVSRRC_and_F4RCBits) },
{ CTRRC8, CTRRC8Bits, sizeof(CTRRC8Bits) },
{ LR8RC, LR8RCBits, sizeof(LR8RCBits) },
{ DMRROWRC, DMRROWRCBits, sizeof(DMRROWRCBits) },
{ VSRC, VSRCBits, sizeof(VSRCBits) },
{ VSRC_with_sub_64_in_SPILLTOVSRRC, VSRC_with_sub_64_in_SPILLTOVSRRCBits, sizeof(VSRC_with_sub_64_in_SPILLTOVSRRCBits) },
{ QSRC, QSRCBits, sizeof(QSRCBits) },
{ VRRC, VRRCBits, sizeof(VRRCBits) },
{ VSLRC, VSLRCBits, sizeof(VSLRCBits) },
{ VRRC_with_sub_64_in_SPILLTOVSRRC, VRRC_with_sub_64_in_SPILLTOVSRRCBits, sizeof(VRRC_with_sub_64_in_SPILLTOVSRRCBits) },
{ G8pRC, G8pRCBits, sizeof(G8pRCBits) },
{ G8pRC_with_sub_32_in_GPRC_NOR0, G8pRC_with_sub_32_in_GPRC_NOR0Bits, sizeof(G8pRC_with_sub_32_in_GPRC_NOR0Bits) },
{ QSRC_with_sub_64_in_SPILLTOVSRRC, QSRC_with_sub_64_in_SPILLTOVSRRCBits, sizeof(QSRC_with_sub_64_in_SPILLTOVSRRCBits) },
{ VSLRC_with_sub_64_in_SPILLTOVSRRC, VSLRC_with_sub_64_in_SPILLTOVSRRCBits, sizeof(VSLRC_with_sub_64_in_SPILLTOVSRRCBits) },
{ DMRROWpRC, DMRROWpRCBits, sizeof(DMRROWpRCBits) },
{ VSRpRC, VSRpRCBits, sizeof(VSRpRCBits) },
{ VSRpRC_with_sub_64_in_SPILLTOVSRRC, VSRpRC_with_sub_64_in_SPILLTOVSRRCBits, sizeof(VSRpRC_with_sub_64_in_SPILLTOVSRRCBits) },
{ VSRpRC_with_sub_64_in_F4RC, VSRpRC_with_sub_64_in_F4RCBits, sizeof(VSRpRC_with_sub_64_in_F4RCBits) },
{ VSRpRC_with_sub_64_in_VFRC, VSRpRC_with_sub_64_in_VFRCBits, sizeof(VSRpRC_with_sub_64_in_VFRCBits) },
{ VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC, VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCBits, sizeof(VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCBits) },
{ VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC, VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCBits, sizeof(VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCBits) },
{ QBRC, QBRCBits, sizeof(QBRCBits) },
{ QFRC, QFRCBits, sizeof(QFRCBits) },
{ QBRC_with_sub_64_in_SPILLTOVSRRC, QBRC_with_sub_64_in_SPILLTOVSRRCBits, sizeof(QBRC_with_sub_64_in_SPILLTOVSRRCBits) },
{ ACCRC, ACCRCBits, sizeof(ACCRCBits) },
{ UACCRC, UACCRCBits, sizeof(UACCRCBits) },
{ WACCRC, WACCRCBits, sizeof(WACCRCBits) },
{ WACC_HIRC, WACC_HIRCBits, sizeof(WACC_HIRCBits) },
{ ACCRC_with_sub_64_in_SPILLTOVSRRC, ACCRC_with_sub_64_in_SPILLTOVSRRCBits, sizeof(ACCRC_with_sub_64_in_SPILLTOVSRRCBits) },
{ UACCRC_with_sub_64_in_SPILLTOVSRRC, UACCRC_with_sub_64_in_SPILLTOVSRRCBits, sizeof(UACCRC_with_sub_64_in_SPILLTOVSRRCBits) },
{ ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC, ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCBits, sizeof(ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCBits) },
{ UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC, UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCBits, sizeof(UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCBits) },
{ DMRRC, DMRRCBits, sizeof(DMRRCBits) },
{ DMRpRC, DMRpRCBits, sizeof(DMRpRCBits) },
};
const uint16_t PPCRegEncodingTable[] = {
0,
0,
1,
9,
0,
8,
0,
512,
256,
1,
0,
0,
1,
2,
3,
4,
5,
6,
7,
0,
0,
1,
2,
3,
4,
5,
6,
7,
9,
0,
1,
2,
3,
4,
5,
6,
7,
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
31,
32,
33,
34,
35,
36,
37,
38,
39,
40,
41,
42,
43,
44,
45,
46,
47,
48,
49,
50,
51,
52,
53,
54,
55,
56,
57,
58,
59,
60,
61,
62,
63,
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
31,
0,
1,
2,
3,
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
31,
0,
8,
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
31,
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
31,
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
31,
0,
1,
2,
3,
4,
5,
6,
7,
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
31,
32,
33,
34,
35,
36,
37,
38,
39,
40,
41,
42,
43,
44,
45,
46,
47,
48,
49,
50,
51,
52,
53,
54,
55,
56,
57,
58,
59,
60,
61,
62,
63,
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
31,
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
31,
32,
33,
34,
35,
36,
37,
38,
39,
40,
41,
42,
43,
44,
45,
46,
47,
48,
49,
50,
51,
52,
53,
54,
55,
56,
57,
58,
59,
60,
61,
62,
63,
0,
1,
2,
3,
4,
5,
6,
7,
0,
1,
2,
3,
4,
5,
6,
7,
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
31,
0,
2,
6,
10,
14,
18,
22,
26,
30,
1,
5,
9,
13,
17,
21,
25,
29,
0,
4,
8,
12,
16,
20,
24,
28,
3,
7,
11,
15,
19,
23,
27,
31,
0,
2,
4,
6,
8,
10,
12,
14,
16,
18,
20,
22,
24,
26,
28,
30,
};
#endif // GET_REGINFO_MC_DESC
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