linux-vfio/i915-vga-arbiter.patch

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From ff4ebf882ce844b78d61ff350fe16aef09eb9e33 Mon Sep 17 00:00:00 2001
From: Mark Weiman <mark.weiman@markzz.com>
2017-03-10 22:29:12 +00:00
Date: Sun, 5 Mar 2017 14:50:17 -0500
Subject: [PATCH] i915: Add module option to support VGA arbiter on HD devices
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---
drivers/gpu/drm/i915/i915_drv.c | 22 +++++++++++++++++++---
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drivers/gpu/drm/i915/i915_params.c | 5 +++++
drivers/gpu/drm/i915/i915_params.h | 1 +
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drivers/gpu/drm/i915/intel_display.c | 34 ++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_drv.h | 1 +
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5 files changed, 60 insertions(+), 3 deletions(-)
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diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
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index 728ca3ea74d2..41f971599688 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
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@@ -574,10 +574,20 @@ static int i915_load_modeset_init(struct drm_device *dev)
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* If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
* then we do not take part in VGA arbitration and the
* vga_client_register() fails with -ENODEV.
+ *
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+ * NB. The set_decode callback here actually works on GMCH
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+ * devices, on newer HD devices we can only disable VGA MMIO space.
+ * Disabling VGA I/O space requires disabling I/O in the PCI command
+ * register. Nonetheless, we like to pretend that we participate in
+ * VGA arbitration and can dynamically disable VGA I/O space because
+ * this makes X happy, even though it's a complete lie.
*/
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- ret = vga_client_register(pdev, dev, NULL, i915_vga_set_decode);
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- if (ret && ret != -ENODEV)
- goto out;
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+ if (!i915.enable_hd_vgaarb || !HAS_PCH_SPLIT(dev_priv)) {
+ ret = vga_client_register(pdev, dev, NULL,
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+ i915_vga_set_decode);
+ if (ret && ret != -ENODEV)
+ goto out;
+ }
intel_register_dsm_handler();
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@@ -619,6 +629,12 @@ static int i915_load_modeset_init(struct drm_device *dev)
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if (ret)
goto cleanup_gem;
+ /*
+ * Must do this after fbcon init so that
+ * vgacon_save_screen() works during the handover.
+ */
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+ i915_disable_vga_mem(dev_priv);
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+
/* Only enable hotplug handling once the fbdev is fully set up. */
intel_hpd_init(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
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index d46ffe7086bc..6967d6d356c8 100644
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--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
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@@ -51,6 +51,7 @@ struct i915_params i915 __read_mostly = {
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.invert_brightness = 0,
.disable_display = 0,
.enable_cmd_parser = 1,
+ .enable_hd_vgaarb = false,
.use_mmio_flip = 0,
.mmio_debug = 0,
.verbose_state_checks = 1,
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@@ -192,6 +193,10 @@ module_param_named_unsafe(enable_cmd_parser, i915.enable_cmd_parser, int, 0600);
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MODULE_PARM_DESC(enable_cmd_parser,
"Enable command parsing (1=enabled [default], 0=disabled)");
+module_param_named(enable_hd_vgaarb, i915.enable_hd_vgaarb, bool, 0444);
+MODULE_PARM_DESC(enable_hd_vgaarb,
+ "Enable support for VGA arbitration on Intel HD IGD. (default: false)");
+
module_param_named_unsafe(use_mmio_flip, i915.use_mmio_flip, int, 0600);
MODULE_PARM_DESC(use_mmio_flip,
"use MMIO flips (-1=never, 0=driver discretion [default], 1=always)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
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index 817ad959941e..6375f768f16e 100644
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--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
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@@ -61,6 +61,7 @@ struct i915_params {
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bool reset;
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bool error_capture;
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bool disable_display;
+ bool enable_hd_vgaarb;
bool verbose_state_checks;
bool nuclear_pageflip;
bool enable_dp_mst;
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diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
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index 891c86aef99d..e0574960aa0d 100644
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--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
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@@ -16305,6 +16305,37 @@ static void i915_disable_vga(struct drm_i915_private *dev_priv)
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POSTING_READ(vga_reg);
}
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+static void i915_enable_vga_mem(struct drm_i915_private *dev_priv)
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+{
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+ struct pci_dev *pdev = dev_priv->drm.pdev;
+
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+ /* Enable VGA memory on Intel HD */
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+ if (i915.enable_hd_vgaarb && HAS_PCH_SPLIT(dev_priv)) {
+ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
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+ outb(inb(VGA_MSR_READ) | VGA_MSR_MEM_EN, VGA_MSR_WRITE);
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+ vga_set_legacy_decoding(pdev, VGA_RSRC_LEGACY_IO |
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+ VGA_RSRC_LEGACY_MEM |
+ VGA_RSRC_NORMAL_IO |
+ VGA_RSRC_NORMAL_MEM);
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+ vga_put(pdev, VGA_RSRC_LEGACY_IO);
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+ }
+}
+
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+void i915_disable_vga_mem(struct drm_i915_private *dev_priv)
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+{
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+ struct pci_dev *pdev = dev_priv->drm.pdev;
+
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+ /* Disable VGA memory on Intel HD */
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+ if (i915.enable_hd_vgaarb && HAS_PCH_SPLIT(dev_priv)) {
+ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
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+ outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
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+ vga_set_legacy_decoding(pdev, VGA_RSRC_LEGACY_IO |
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+ VGA_RSRC_NORMAL_IO |
+ VGA_RSRC_NORMAL_MEM);
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+ vga_put(pdev, VGA_RSRC_LEGACY_IO);
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+ }
+}
+
void intel_modeset_init_hw(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
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@@ -16760,6 +16791,7 @@ void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
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if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
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i915_disable_vga(dev_priv);
+ i915_disable_vga_mem(dev_priv);
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}
}
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@@ -17089,6 +17121,8 @@ void intel_modeset_cleanup(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
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+ i915_enable_vga_mem(dev_priv);
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+
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flush_work(&dev_priv->atomic_helper.free_work);
WARN_ON(!llist_empty(&dev_priv->atomic_helper.free_list));
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diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
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index 03a2112004f9..4db71cbe62ca 100644
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--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
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@@ -1206,6 +1206,7 @@ int vlv_get_cck_clock(struct drm_i915_private *dev_priv,
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void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv);
void lpt_disable_iclkip(struct drm_i915_private *dev_priv);
extern const struct drm_plane_funcs intel_plane_funcs;
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+extern void i915_disable_vga_mem(struct drm_i915_private *dev_priv);
void intel_init_display_hooks(struct drm_i915_private *dev_priv);
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unsigned int intel_fb_xy_to_linear(int x, int y,
const struct intel_plane_state *state,
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--
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2.12.0
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