forked from AUR/linux-vfio
58 lines
2.8 KiB
Diff
58 lines
2.8 KiB
Diff
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From patchwork Wed Apr 25 20:27:37 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 8bit
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Subject: PCI: Add Intel 7th & 8th Gen mobile to ACS quirks
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From: Alex Williamson <alex.williamson@redhat.com>
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X-Patchwork-Id: 10364243
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Message-Id: <152468799766.12449.11245066753252100117.stgit@w520.home>
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To: bhelgaas@google.com
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Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
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Date: Wed, 25 Apr 2018 14:27:37 -0600
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The specification update indicates these have the same errate for
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implementing non-standard ACS capabilities.
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Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
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---
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drivers/pci/quirks.c | 14 ++++++++++++++
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1 file changed, 14 insertions(+)
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diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
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index 2990ad1e7c99..6d0dee40dbe5 100644
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--- a/drivers/pci/quirks.c
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+++ b/drivers/pci/quirks.c
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@@ -4230,11 +4230,24 @@ static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags)
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* 0xa290-0xa29f PCI Express Root port #{0-16}
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* 0xa2e7-0xa2ee PCI Express Root port #{17-24}
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*
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+ * Mobile chipsets are also affected, 7th & 8th Generation
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+ * Specification update confirms ACS errata 22, status no fix: (7th Generation
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+ * Intel Processor Family I/O for U/Y Platforms and 8th Generation Intel
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+ * Processor Family I/O for U Quad Core Platforms Specification Update,
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+ * August 2017, Revision 002, Document#: 334660-002)[6]
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+ * Device IDs from I/O datasheet: (7th Generation Intel Processor Family I/O
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+ * for U/Y Platforms and 8th Generation Intel ® Processor Family I/O for U
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+ * Quad Core Platforms, Vol 1 of 2, August 2017, Document#: 334658-003)[7]
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+ *
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+ * 0x9d10-0x9d1b PCI Express Root port #{1-12}
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+ *
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* [1] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-2.html
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* [2] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-1.html
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* [3] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-spec-update.html
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* [4] http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-spec-update.html
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* [5] http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-datasheet-vol-1.html
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+ * [6] https://www.intel.com/content/www/us/en/processors/core/7th-gen-core-family-mobile-u-y-processor-lines-i-o-spec-update.html
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+ * [7] https://www.intel.com/content/www/us/en/processors/core/7th-gen-core-family-mobile-u-y-processor-lines-i-o-datasheet-vol-1.html
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*/
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static bool pci_quirk_intel_spt_pch_acs_match(struct pci_dev *dev)
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{
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@@ -4244,6 +4257,7 @@ static bool pci_quirk_intel_spt_pch_acs_match(struct pci_dev *dev)
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switch (dev->device) {
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case 0xa110 ... 0xa11f: case 0xa167 ... 0xa16a: /* Sunrise Point */
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case 0xa290 ... 0xa29f: case 0xa2e7 ... 0xa2ee: /* Union Point */
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+ case 0x9d10 ... 0x9d1b: /* 7th & 8th Gen Mobile */
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return true;
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}
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