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Update to 5.5.3.arch1-1: i915 patch rewrite for new intel_vga, acs patch rebase, PKGBUILD changes to match upstream

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This commit is contained in:
Katelyn Schiesser
2020-02-15 19:17:31 -08:00
parent 1ec4cb0753
commit efbfaead51
4 changed files with 81 additions and 78 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
.SRCINFO
View File

@@ -1,8 +1,8 @@
pkgbase = linux-vfio
pkgdesc = Linux
pkgver = 5.3.13.1
pkgver = 5.5.3.arch1
pkgrel = 1
url = https://git.archlinux.org/linux.git/log/?h=v5.3.13-arch1
url = https://git.archlinux.org/linux.git/log/?h=v5.5.3-arch1
arch = x86_64
license = GPL2
makedepends = xmlto
@@ -16,7 +16,7 @@ pkgbase = linux-vfio
makedepends = imagemagick
makedepends = git
options = !strip
source = archlinux-linux::git+https://git.archlinux.org/linux.git?signed#tag=v5.3.13-arch1
source = archlinux-linux::git+https://git.archlinux.org/linux.git?signed#tag=v5.5.3-arch1
source = config
source = add-acs-overrides.patch
source = i915-vga-arbiter.patch
@@ -25,8 +25,8 @@ pkgbase = linux-vfio
validpgpkeys = 8218F88849AAC522E94CF470A5E9288C4FA415FA
sha256sums = SKIP
sha256sums = 10ee7800902b1d82f9c184b367c9d904f4dc48f6d9ce3277327e825d7ab690d1
sha256sums = dbf4ac4b873ce6972e63b78d74ddba18f2701716163bb7f4b4fe5e909346a6e1
sha256sums = 3d711ad5eda51c42b20575a66683cd416fe7a02a3162d8a7107f2b2c82d328ce
sha256sums = 31ae60837b90feba277b182a9015e4df6e74fd660aba1a2841f49ecd57617559
sha256sums = 334f3472adc0280614b278ead7375d3a982dc1b9310c1fc62bc8b8e96eb2b6d4
pkgname = linux-vfio
pkgdesc = The Linux kernel and modules

10
PKGBUILD
View File

@@ -1,10 +1,10 @@
# Maintainer: Jan Alexander Steffens (heftig) <jan.steffens@gmail.com>
pkgbase=linux-vfio
pkgver=5.3.13.1
pkgver=5.5.3.arch1
pkgrel=1
pkgdesc='Linux'
_srctag=v${pkgver%.*}-arch${pkgver##*.}
_srctag=v${pkgver%.*}-${pkgver##*.}
url="https://git.archlinux.org/linux.git/log/?h=$_srctag"
arch=(x86_64)
license=(GPL2)
@@ -28,8 +28,10 @@ validpgpkeys=(
)
sha256sums=('SKIP'
'10ee7800902b1d82f9c184b367c9d904f4dc48f6d9ce3277327e825d7ab690d1'
'dbf4ac4b873ce6972e63b78d74ddba18f2701716163bb7f4b4fe5e909346a6e1'
'3d711ad5eda51c42b20575a66683cd416fe7a02a3162d8a7107f2b2c82d328ce')
'31ae60837b90feba277b182a9015e4df6e74fd660aba1a2841f49ecd57617559'
'334f3472adc0280614b278ead7375d3a982dc1b9310c1fc62bc8b8e96eb2b6d4'
)
export KBUILD_BUILD_HOST=archlinux
export KBUILD_BUILD_USER=$pkgbase

18
add-acs-overrides.patch
View File

@@ -53,7 +53,7 @@ diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/adm
index 0c404cda531a..0d45f0014f4a 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -3165,6 +3165,14 @@
@@ -3423,6 +3423,14 @@
nomsi [MSI] If the PCI_MSI kernel config parameter is
enabled, this kernel boot option can be used to
disable the use of MSI interrupts system-wide.
@@ -69,10 +69,10 @@ index 0c404cda531a..0d45f0014f4a 100644
Safety option to keep boot IRQs enabled. This
should never be necessary.
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index c0673a717239..695d99b390f7 100644
index fbeb9f73ef28..3bf409c65609 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -194,6 +194,106 @@ static int __init pci_apply_final_quirks(void)
@@ -192,6 +192,106 @@ static int __init pci_apply_final_quirks(void)
}
fs_initcall_sync(pci_apply_final_quirks);
@@ -179,15 +179,15 @@ index c0673a717239..695d99b390f7 100644
/*
* Decoding should be disabled for a PCI device during BAR sizing to avoid
* conflict. But doing so may cause problems on host bridge and perhaps other
@@ -4513,6 +4613,8 @@ static const struct pci_dev_acs_enabled {
{ PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
{ PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
{ PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
@@ -4711,6 +4811,8 @@ static const struct pci_dev_acs_enabled {
{ PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs },
/* Amazon Annapurna Labs */
{ PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031, pci_quirk_al_acs },
+ /* allow acs for any */
+ { PCI_ANY_ID, PCI_ANY_ID, pcie_acs_overrides },
{ 0 }
};
--
2.20.0
--
2.21.0

121
i915-vga-arbiter.patch
View File

@@ -35,22 +35,29 @@ This also rolls in reverted commit 6e1b4fda, which corrected an
ordering issue with 81b5c7bc by delaying the disabling of VGA memory
until after vgacon->fbcon handoff.
---
drivers/gpu/drm/i915/display/intel_display.c | 33 ++++++++++++++++++++
drivers/gpu/drm/i915/i915_drv.c | 23 +++++++++++---
drivers/gpu/drm/i915/i915_params.c | 3 ++
drivers/gpu/drm/i915/i915_params.h | 1 +
drivers/gpu/drm/i915/intel_drv.h | 1 +
5 files changed, 57 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 592b92782fab..cafd1396bfcf 100644
index b670239a293b..edb11715de56 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15751,6 +15751,36 @@ static void i915_disable_vga(struct drm_i915_private *dev_priv)
POSTING_READ(vga_reg);
@@ -17719,6 +17719,7 @@ static void intel_hpd_poll_fini(struct drm_i915_private *i915)
void intel_modeset_driver_remove(struct drm_i915_private *i915)
{
+ intel_vga_enable_mem(i915);
flush_workqueue(i915->flip_wq);
flush_workqueue(i915->modeset_wq);
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
index 2ff7293986d4..6591d88d9563 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -40,6 +40,37 @@ void intel_vga_disable(struct drm_i915_private *dev_priv)
POSTING_READ(vga_reg);
}
+static void i915_enable_vga_mem(struct drm_i915_private *dev_priv)
+
+void intel_vga_enable_mem(struct drm_i915_private *dev_priv)
+{
+ struct pci_dev *pdev = dev_priv->drm.pdev;
+
@@ -66,7 +73,7 @@ index 592b92782fab..cafd1396bfcf 100644
+ }
+}
+
+void i915_disable_vga_mem(struct drm_i915_private *dev_priv)
+void intel_vga_disable_mem(struct drm_i915_private *dev_priv)
+{
+ struct pci_dev *pdev = dev_priv->drm.pdev;
+ /* Disable VGA memory on Intel HD */
@@ -80,56 +87,50 @@ index 592b92782fab..cafd1396bfcf 100644
+ }
+}
+
void intel_modeset_init_hw(struct drm_device *dev)
void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
{
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -16395,6 +16425,7 @@ void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
@@ -47,6 +78,7 @@ void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
i915_disable_vga(dev_priv);
+ i915_disable_vga_mem(dev_priv);
intel_vga_disable(dev_priv);
+ intel_vga_disable_mem(dev_priv);
}
}
@@ -16870,6 +16901,8 @@ void intel_modeset_cleanup(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
diff --git a/drivers/gpu/drm/i915/display/intel_vga.h b/drivers/gpu/drm/i915/display/intel_vga.h
index ba5b55b917f0..198887f4e78f 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.h
+++ b/drivers/gpu/drm/i915/display/intel_vga.h
@@ -15,4 +15,8 @@ void intel_vga_redisable_power_on(struct drm_i915_private *i915);
int intel_vga_register(struct drm_i915_private *i915);
void intel_vga_unregister(struct drm_i915_private *i915);
+ i915_enable_vga_mem(dev_priv);
+/* i915 vga arb patch */
+void intel_vga_enable_mem(struct drm_i915_private *i915);
+void intel_vga_disable_mem(struct drm_i915_private *i915);
+
flush_workqueue(dev_priv->modeset_wq);
flush_work(&dev_priv->atomic_helper.free_work);
#endif /* __INTEL_VGA_H__ */
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index bac1ee94f63f..5b10c950b70d 100644
index 3c512c571e60..742e138e894f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -697,11 +697,20 @@ static int i915_load_modeset_init(struct drm_device *dev)
* If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
* then we do not take part in VGA arbitration and the
* vga_client_register() fails with -ENODEV.
+ *
+ * NB. The set_decode callback here actually works on GMCH
+ * devices, on newer HD devices we can only disable VGA MMIO space.
+ * Disabling VGA I/O space requires disabling I/O in the PCI command
+ * register. Nonetheless, we like to pretend that we participate in
+ * VGA arbitration and can dynamically disable VGA I/O space because
+ * this makes X happy, even though it's a complete lie.
*/
- ret = vga_client_register(pdev, dev_priv, NULL, i915_vga_set_decode);
- if (ret && ret != -ENODEV)
@@ -287,9 +287,11 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915)
intel_bios_init(i915);
- ret = intel_vga_register(i915);
- if (ret)
- goto out;
-
+ if (!i915_modparams.enable_hd_vgaarb || !HAS_PCH_SPLIT(dev_priv)) {
+ ret = vga_client_register(pdev, dev, NULL,
+ i915_vga_set_decode);
+ if (ret && ret != -ENODEV)
+ if (!i915_modparams.enable_hd_vgaarb || !HAS_PCH_SPLIT(i915)) {
+ ret = intel_vga_register(i915);
+ if (ret)
+ goto out;
+ }
intel_register_dsm_handler();
ret = vga_switcheroo_register_client(pdev, &i915_switcheroo_ops, false);
@@ -740,6 +749,12 @@ static int i915_load_modeset_init(struct drm_device *dev)
@@ -324,6 +326,12 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915)
if (ret)
goto cleanup_gem;
@@ -137,16 +138,16 @@ index bac1ee94f63f..5b10c950b70d 100644
+ * Must do this after fbcon init so that
+ * vgacon_save_screen() works during the handover.
+ */
+ i915_disable_vga_mem(dev_priv);
+ intel_vga_disable_mem(i915);
+
/* Only enable hotplug handling once the fbdev is fully set up. */
intel_hpd_init(dev_priv);
intel_hpd_init(i915);
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 5b07766a1c26..fb63f4c863db 100644
index 1dd1f3652795..cc9490a46c0e 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -127,6 +127,9 @@ i915_param_named_unsafe(invert_brightness, int, 0600,
@@ -128,6 +128,9 @@ i915_param_named_unsafe(invert_brightness, int, 0600,
i915_param_named(disable_display, bool, 0400,
"Disable display (default: false)");
@@ -157,29 +158,29 @@ index 5b07766a1c26..fb63f4c863db 100644
"Enable the MMIO debug code for the first N failures (default: off). "
"This may negatively affect performance.");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index a4770ce46bd2..8f836ff6e2e8 100644
index 31b88f297fbc..1d7c69da54d8 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -67,6 +67,7 @@ struct drm_printer;
param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE) \
@@ -69,6 +69,7 @@ struct drm_printer;
param(unsigned long, fake_lmem_start, 0) \
/* leave bools at the end to not create holes */ \
param(bool, alpha_support, IS_ENABLED(CONFIG_DRM_I915_ALPHA_SUPPORT)) \
+ param(bool, enable_hd_vgaarb, false) \
param(bool, enable_hangcheck, true) \
param(bool, prefault_disable, false) \
param(bool, load_detect_test, false) \
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f11979879e7b..06cefd0218a5 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1457,6 +1457,7 @@ int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index f417e0948001..6e865b86db09 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -477,6 +477,7 @@ int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv,
const char *name, u32 reg);
void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv);
void lpt_disable_iclkip(struct drm_i915_private *dev_priv);
+extern void i915_disable_vga_mem(struct drm_i915_private *dev_priv);
+extern void intel_vga_disable_mem(struct drm_i915_private *dev_priv);
void intel_init_display_hooks(struct drm_i915_private *dev_priv);
unsigned int intel_fb_xy_to_linear(int x, int y,
const struct intel_plane_state *state,
--
2.23.0
--
2.24.0