forked from AUR/linux-vfio
164 lines
6.1 KiB
Diff
164 lines
6.1 KiB
Diff
From c3466f73ee88a129b5955d4f2049e79688183e96 Mon Sep 17 00:00:00 2001
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From: Mark Weiman <mark.weiman@markzz.com>
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Date: Thu, 22 Jun 2017 21:27:07 -0400
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Subject: [PATCH] i915: Add module option to support VGA arbiter on HD devices
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---
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drivers/gpu/drm/i915/i915_drv.c | 22 +++++++++++++++++++---
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drivers/gpu/drm/i915/i915_params.c | 5 +++++
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drivers/gpu/drm/i915/i915_params.h | 1 +
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drivers/gpu/drm/i915/intel_display.c | 34 ++++++++++++++++++++++++++++++++++
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drivers/gpu/drm/i915/intel_drv.h | 1 +
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5 files changed, 60 insertions(+), 3 deletions(-)
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diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
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index edacd31ae1a1..c45b8c6e5883 100644
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--- a/drivers/gpu/drm/i915/i915_drv.c
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+++ b/drivers/gpu/drm/i915/i915_drv.c
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@@ -573,10 +573,20 @@ static int i915_load_modeset_init(struct drm_device *dev)
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* If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
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* then we do not take part in VGA arbitration and the
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* vga_client_register() fails with -ENODEV.
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+ *
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+ * NB. The set_decode callback here actually works on GMCH
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+ * devices, on newer HD devices we can only disable VGA MMIO space.
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+ * Disabling VGA I/O space requires disabling I/O in the PCI command
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+ * register. Nonetheless, we like to pretend that we participate in
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+ * VGA arbitration and can dynamically disable VGA I/O space because
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+ * this makes X happy, even though it's a complete lie.
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*/
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- ret = vga_client_register(pdev, dev_priv, NULL, i915_vga_set_decode);
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- if (ret && ret != -ENODEV)
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- goto out;
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+ if (!i915.enable_hd_vgaarb || !HAS_PCH_SPLIT(dev_priv)) {
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+ ret = vga_client_register(pdev, dev, NULL,
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+ i915_vga_set_decode);
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+ if (ret && ret != -ENODEV)
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+ goto out;
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+ }
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intel_register_dsm_handler();
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@@ -619,6 +629,12 @@ static int i915_load_modeset_init(struct drm_device *dev)
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if (ret)
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goto cleanup_gem;
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+ /*
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+ * Must do this after fbcon init so that
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+ * vgacon_save_screen() works during the handover.
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+ */
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+ i915_disable_vga_mem(dev_priv);
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+
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/* Only enable hotplug handling once the fbdev is fully set up. */
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intel_hpd_init(dev_priv);
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diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
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index 0e280fbd52f1..f47675d24bf8 100644
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--- a/drivers/gpu/drm/i915/i915_params.c
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+++ b/drivers/gpu/drm/i915/i915_params.c
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@@ -51,6 +51,7 @@ struct i915_params i915 __read_mostly = {
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.invert_brightness = 0,
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.disable_display = 0,
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.enable_cmd_parser = true,
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+ .enable_hd_vgaarb = false,
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.use_mmio_flip = 0,
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.mmio_debug = 0,
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.verbose_state_checks = 1,
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@@ -192,6 +193,10 @@ module_param_named_unsafe(enable_cmd_parser, i915.enable_cmd_parser, bool, 0400)
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MODULE_PARM_DESC(enable_cmd_parser,
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"Enable command parsing (true=enabled [default], false=disabled)");
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+module_param_named(enable_hd_vgaarb, i915.enable_hd_vgaarb, bool, 0444);
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+MODULE_PARM_DESC(enable_hd_vgaarb,
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+ "Enable support for VGA arbitration on Intel HD IGD. (default: false)");
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+
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module_param_named_unsafe(use_mmio_flip, i915.use_mmio_flip, int, 0600);
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MODULE_PARM_DESC(use_mmio_flip,
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"use MMIO flips (-1=never, 0=driver discretion [default], 1=always)");
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diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
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index 8e433de04679..e3c294cdfebf 100644
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--- a/drivers/gpu/drm/i915/i915_params.h
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+++ b/drivers/gpu/drm/i915/i915_params.h
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@@ -61,6 +61,7 @@ struct i915_params {
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bool reset;
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bool error_capture;
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bool disable_display;
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+ bool enable_hd_vgaarb;
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bool verbose_state_checks;
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bool nuclear_pageflip;
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bool enable_dp_mst;
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diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
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index 5370dbec7a7d..f25eb8eea591 100644
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--- a/drivers/gpu/drm/i915/intel_display.c
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+++ b/drivers/gpu/drm/i915/intel_display.c
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@@ -16525,6 +16525,37 @@ static void i915_disable_vga(struct drm_i915_private *dev_priv)
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POSTING_READ(vga_reg);
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}
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+static void i915_enable_vga_mem(struct drm_i915_private *dev_priv)
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+{
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+ struct pci_dev *pdev = dev_priv->drm.pdev;
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+
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+ /* Enable VGA memory on Intel HD */
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+ if (i915.enable_hd_vgaarb && HAS_PCH_SPLIT(dev_priv)) {
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+ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
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+ outb(inb(VGA_MSR_READ) | VGA_MSR_MEM_EN, VGA_MSR_WRITE);
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+ vga_set_legacy_decoding(pdev, VGA_RSRC_LEGACY_IO |
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+ VGA_RSRC_LEGACY_MEM |
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+ VGA_RSRC_NORMAL_IO |
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+ VGA_RSRC_NORMAL_MEM);
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+ vga_put(pdev, VGA_RSRC_LEGACY_IO);
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+ }
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+}
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+
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+void i915_disable_vga_mem(struct drm_i915_private *dev_priv)
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+{
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+ struct pci_dev *pdev = dev_priv->drm.pdev;
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+
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+ /* Disable VGA memory on Intel HD */
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+ if (i915.enable_hd_vgaarb && HAS_PCH_SPLIT(dev_priv)) {
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+ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
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+ outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
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+ vga_set_legacy_decoding(pdev, VGA_RSRC_LEGACY_IO |
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+ VGA_RSRC_NORMAL_IO |
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+ VGA_RSRC_NORMAL_MEM);
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+ vga_put(pdev, VGA_RSRC_LEGACY_IO);
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+ }
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+}
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+
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void intel_modeset_init_hw(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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@@ -16967,6 +16998,7 @@ void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
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if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
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DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
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i915_disable_vga(dev_priv);
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+ i915_disable_vga_mem(dev_priv);
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}
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}
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@@ -17296,6 +17328,8 @@ void intel_modeset_cleanup(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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+ i915_enable_vga_mem(dev_priv);
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+
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flush_work(&dev_priv->atomic_helper.free_work);
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WARN_ON(!llist_empty(&dev_priv->atomic_helper.free_list));
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diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
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index 344f238b283f..f70cab001517 100644
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--- a/drivers/gpu/drm/i915/intel_drv.h
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+++ b/drivers/gpu/drm/i915/intel_drv.h
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@@ -1240,6 +1240,7 @@ int vlv_get_cck_clock(struct drm_i915_private *dev_priv,
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void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv);
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void lpt_disable_iclkip(struct drm_i915_private *dev_priv);
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extern const struct drm_plane_funcs intel_plane_funcs;
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+extern void i915_disable_vga_mem(struct drm_i915_private *dev_priv);
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void intel_init_display_hooks(struct drm_i915_private *dev_priv);
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unsigned int intel_fb_xy_to_linear(int x, int y,
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const struct intel_plane_state *state,
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--
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2.13.1
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